git: 91867042ec2d - main - arm64: Fix the indentation of ID_AA64ISAR2_EL1

From: Andrew Turner <andrew_at_FreeBSD.org>
Date: Tue, 25 Aug 2026 13:55:39 UTC
The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=91867042ec2d0cb00bec87201d30772f9d79bd30

commit 91867042ec2d0cb00bec87201d30772f9d79bd30
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2025-06-06 10:29:59 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2026-08-25 13:47:53 +0000

    arm64: Fix the indentation of ID_AA64ISAR2_EL1
    
    Some ID_AA64ISAR2_EL1 fields values are incorrectly indented. Values
    have an extra space before the macro to make scanning for them easier.
    
    Add this extra space to the two fields that were missing it.
    
    Sponsored by:   Arm Ltd
---
 sys/arm64/include/armreg.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index cd79bed39406..587c05b39856 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -1290,14 +1290,14 @@
 #define	ID_AA64ISAR2_PRFMSLC_WIDTH	4
 #define	ID_AA64ISAR2_PRFMSLC_MASK	(UL(0xf) << ID_AA64ISAR2_PRFMSLC_SHIFT)
 #define	ID_AA64ISAR2_PRFMSLC_VAL(x)	((x) & ID_AA64ISAR2_PRFMSLC_MASK)
-#define	ID_AA64ISAR2_PRFMSLC_NONE	(UL(0x0) << ID_AA64ISAR2_PRFMSLC_SHIFT)
-#define	ID_AA64ISAR2_PRFMSLC_IMPL	(UL(0x1) << ID_AA64ISAR2_PRFMSLC_SHIFT)
+#define	 ID_AA64ISAR2_PRFMSLC_NONE	(UL(0x0) << ID_AA64ISAR2_PRFMSLC_SHIFT)
+#define	 ID_AA64ISAR2_PRFMSLC_IMPL	(UL(0x1) << ID_AA64ISAR2_PRFMSLC_SHIFT)
 #define	ID_AA64ISAR2_RPRFM_SHIFT	48
 #define	ID_AA64ISAR2_RPRFM_WIDTH	4
 #define	ID_AA64ISAR2_RPRFM_MASK		(UL(0xf) << ID_AA64ISAR2_RPRFM_SHIFT)
 #define	ID_AA64ISAR2_RPRFM_VAL(x)	((x) & ID_AA64ISAR2_RPRFM_MASK)
-#define	ID_AA64ISAR2_RPRFM_NONE		(UL(0x0) << ID_AA64ISAR2_RPRFM_SHIFT)
-#define	ID_AA64ISAR2_RPRFM_IMPL		(UL(0x1) << ID_AA64ISAR2_RPRFM_SHIFT)
+#define	 ID_AA64ISAR2_RPRFM_NONE	(UL(0x0) << ID_AA64ISAR2_RPRFM_SHIFT)
+#define	 ID_AA64ISAR2_RPRFM_IMPL	(UL(0x1) << ID_AA64ISAR2_RPRFM_SHIFT)
 #define	ID_AA64ISAR2_CSSC_SHIFT		52
 #define	ID_AA64ISAR2_CSSC_WIDTH		4
 #define	ID_AA64ISAR2_CSSC_MASK		(UL(0xf) << ID_AA64ISAR2_CSSC_SHIFT)