git: 4b337dff0152 - main - arm64: Fix CNTHCTL_EL1PCTEN field definitions

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=4b337dff01528754648ae03a7cee8e94966ec1b5

commit 4b337dff01528754648ae03a7cee8e94966ec1b5
Author:     Kajetan Puchalski <kajetan.puchalski@arm.com>
AuthorDate: 2026-08-19 11:19:38 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2026-08-24 14:45:19 +0000

    arm64: Fix CNTHCTL_EL1PCTEN field definitions
    
    Fix the non-VHE register field definition of CNTHCTL_EL1PCTEN to use the
    correct non-VHE shift.
    
    Signed-off-by: Kajetan Puchalski <kajetan.puchalski@arm.com>
    Sponsored by:   Arm Ltd
    Pull Request:   https://github.com/freebsd/freebsd-src/pull/2378
---
 sys/arm64/include/hypervisor.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sys/arm64/include/hypervisor.h b/sys/arm64/include/hypervisor.h
index 0b6492785a0a..4fd6cb2bab55 100644
--- a/sys/arm64/include/hypervisor.h
+++ b/sys/arm64/include/hypervisor.h
@@ -40,8 +40,8 @@
 /* CNTHCTL_EL2 - Counter-timer Hypervisor Control register */
 /* Valid if HCR_EL2.E2H == 0 */
 #define	CNTHCTL_EL1PCTEN_SHIFT		0
-#define	CNTHCTL_EL1PCTEN_MASK		(0x1ul << CNTHCTL_E2H_EL1PCTEN_SHIFT)
-#define	 CNTHCTL_EL1PCTEN_TRAP		(0x0ul << CNTHCTL_E2H_EL1PCTEN_SHIFT)
+#define	CNTHCTL_EL1PCTEN_MASK		(0x1ul << CNTHCTL_EL1PCTEN_SHIFT)
+#define	 CNTHCTL_EL1PCTEN_TRAP		(0x0ul << CNTHCTL_EL1PCTEN_SHIFT)
 #define	 CNTHCTL_EL1PCTEN_NOTRAP	(0x1ul << CNTHCTL_EL1PCTEN_SHIFT)
 #define	CNTHCTL_EL1PCEN_SHIFT		1
 #define	CNTHCTL_EL1PCEN_MASK		(0x1ul << CNTHCTL_EL1PCEN_SHIFT)