git: 34518292a3e0 - main - ufshci: correct the crypto/config register offsets and HCMID fields

The branch main has been updated by jaeyoon:

URL: https://cgit.FreeBSD.org/src/commit/?id=34518292a3e077efe239b61f64b9d860bbfb2960

commit 34518292a3e077efe239b61f64b9d860bbfb2960
Author:     Jaeyoon Choi <jaeyoon@FreeBSD.org>
AuthorDate: 2026-08-18 05:06:54 +0000
Commit:     Jaeyoon Choi <jaeyoon@FreeBSD.org>
CommitDate: 2026-08-18 05:06:54 +0000

    ufshci: correct the crypto/config register offsets and HCMID fields
    
    The reserved array after CCAP must be 508, but it was 511.
    This pushed the config, MCQ config, and ESI registers from 0x300 and
    0x380 up to 0x900. None of these registers are used yet, so nothing
    broke.
    
    Also fix the HCMID bank index field. The spec places it at bits
    [23:16], but it was defined on top of the manufacturer code at [15:0].
    
    Reviewed by:            imp (mentor)
    Sponsored by:           Samsung Electronics
    Differential Revision:  https://reviews.freebsd.org/D58819
---
 sys/dev/ufshci/ufshci_reg.h | 23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/sys/dev/ufshci/ufshci_reg.h b/sys/dev/ufshci/ufshci_reg.h
index 6d5768505102..87b4bee64b0a 100644
--- a/sys/dev/ufshci/ufshci_reg.h
+++ b/sys/dev/ufshci/ufshci_reg.h
@@ -61,7 +61,7 @@ struct ufshci_registers {
 	uint8_t vendor[64]; /* Vendor Specific Registers */
 	/* Crypto (100h) */
 	uint32_t ccap; /* Crypto Capability */
-	uint32_t reserved7[511];
+	uint8_t reserved7[508];
 	/* Config (300h) */
 	uint32_t config; /* Global Configuration */
 	uint8_t reserved9[124];
@@ -74,6 +74,23 @@ struct ufshci_registers {
 	/* TODO: Need to define SQ/CQ registers */
 };
 
+_Static_assert(__offsetof(struct ufshci_registers, is) == 0x20,
+    "operation and runtime section must start at 20h");
+_Static_assert(__offsetof(struct ufshci_registers, utrlba) == 0x50,
+    "UTP transfer section must start at 50h");
+_Static_assert(__offsetof(struct ufshci_registers, utmrlba) == 0x70,
+    "UTP task management section must start at 70h");
+_Static_assert(__offsetof(struct ufshci_registers, uiccmd) == 0x90,
+    "UIC command section must start at 90h");
+_Static_assert(__offsetof(struct ufshci_registers, vendor) == 0xC0,
+    "vendor specific section must start at C0h");
+_Static_assert(__offsetof(struct ufshci_registers, ccap) == 0x100,
+    "crypto section must start at 100h");
+_Static_assert(__offsetof(struct ufshci_registers, config) == 0x300,
+    "config section must start at 300h");
+_Static_assert(__offsetof(struct ufshci_registers, mcqconfig) == 0x380,
+    "MCQ configuration section must start at 380h");
+
 /* Register field definitions */
 #define UFSHCI__REG__SHIFT (0)
 #define UFSHCI__REG__MASK  (0)
@@ -155,8 +172,8 @@ struct ufshci_registers {
  */
 #define UFSHCI_HCMID_REG_MIC_SHIFT (0)
 #define UFSHCI_HCMID_REG_MIC_MASK  (0xFFFF)
-#define UFSHCI_HCMID_REG_BI_SHIFT  (8)
-#define UFSHCI_HCMID_REG_BI_MASK   (0xFFFF)
+#define UFSHCI_HCMID_REG_BI_SHIFT  (16)
+#define UFSHCI_HCMID_REG_BI_MASK   (0xFF)
 
 /*
  * UFSHCI 4.1, section 5.2.7, Offset 18h: AHIT