git: 58de79153622 - main - arm64: mte: configure initial state for system registers

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=58de79153622145cb6fc57bc92c4de678876992f

commit 58de79153622145cb6fc57bc92c4de678876992f
Author:     Harry Moulton <harry.moulton@arm.com>
AuthorDate: 2026-04-13 11:54:38 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2026-04-13 14:23:05 +0000

    arm64: mte: configure initial state for system registers
    
    The fields in SCTLR_EL1 and HCR_EL2 for enabling MTE are set, and if the
    ID_AA64PFR1_EL1 register shows MTE is present, the GCR_EL1 register is
    also configured, and the two TFSR registers which hold pending tag check
    faults are cleared.
    
    Reviewed by:    andrew
    Sponsored by:   Arm Ltd
    Signed-off-by:  Harry Moulton <harry.moulton@arm.com>
    Differential Revision:  https://reviews.freebsd.org/D55946
---
 sys/arm64/arm64/locore.S | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S
index f1228235dfe7..4c8e0c680321 100644
--- a/sys/arm64/arm64/locore.S
+++ b/sys/arm64/arm64/locore.S
@@ -398,7 +398,7 @@ LENTRY(enter_kernel_el)
 	 */
 
 	/* Configure the Hypervisor */
-	ldr	x2, =(HCR_RW | HCR_APK | HCR_API)
+	ldr	x2, =(HCR_RW | HCR_APK | HCR_API | HCR_ATA)
 	msr	hcr_el2, x2
 
 	/* Stash value of HCR_EL2 for later */
@@ -1063,6 +1063,21 @@ LENTRY(start_mmu)
 	isb
 
 	ldr	x2, mair
+
+	/*
+	 * If MTE is supported, configure GCR_EL1 and clear the TFSR registers of
+	 * any pending tag check faults
+	 */
+	CHECK_CPU_FEAT(x3, ID_AA64PFR1, MTE, MTE, 1f)
+
+	/* Set GCR_EL1, non-zero tags excluded by default */
+	mov	x3, #(GCR_Exclude_MASK | GCR_RRND)
+	msr	GCR_EL1_REG, x3
+
+	/* Clear any pending tag check faults */
+	msr TFSR_EL1_REG, xzr
+	msr TFSRE0_EL1_REG, xzr
+1:
 	msr	mair_el1, x2
 
 	/*