git: d552556b7e6d - main - arm64: Rename the MDCR_EL2 macros

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=d552556b7e6d226887ebb6da30e4f1dcff3cb407

commit d552556b7e6d226887ebb6da30e4f1dcff3cb407
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2025-10-02 15:34:54 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2025-10-02 16:21:33 +0000

    arm64: Rename the MDCR_EL2 macros
    
    To be consistent within the register prefix all fields with MDCR_EL2_.
    
    Reviewed by:    emaste
    Sponsored by:   Arm Ltd
    Differential Revision:  https://reviews.freebsd.org/D52804
---
 sys/arm64/include/hypervisor.h | 60 +++++++++++++++++++++---------------------
 1 file changed, 30 insertions(+), 30 deletions(-)

diff --git a/sys/arm64/include/hypervisor.h b/sys/arm64/include/hypervisor.h
index 04e15b55b218..894da24c7a16 100644
--- a/sys/arm64/include/hypervisor.h
+++ b/sys/arm64/include/hypervisor.h
@@ -373,35 +373,35 @@
 #define	MDCR_EL2_TDOSA		(0x1UL << MDCR_EL2_TDOSA_SHIFT)
 #define	MDCR_EL2_TDRA_SHIFT	11
 #define	MDCR_EL2_TDRA		(0x1UL << MDCR_EL2_TDRA_SHIFT)
-#define	MDCR_E2PB_SHIFT		12
-#define	MDCR_E2PB_MASK		(0x3UL << MDCR_E2PB_SHIFT)
-#define	MDCR_TPMS_SHIFT		14
-#define	MDCR_TPMS		(0x1UL << MDCR_TPMS_SHIFT)
-#define	MDCR_EnSPM_SHIFT	15
-#define	MDCR_EnSPM		(0x1UL << MDCR_EnSPM_SHIFT)
-#define	MDCR_HPMD_SHIFT		17
-#define	MDCR_HPMD		(0x1UL << MDCR_HPMD_SHIFT)
-#define	MDCR_TTRF_SHIFT		19
-#define	MDCR_TTRF		(0x1UL << MDCR_TTRF_SHIFT)
-#define	MDCR_HCCD_SHIFT		23
-#define	MDCR_HCCD		(0x1UL << MDCR_HCCD_SHIFT)
-#define	MDCR_E2TB_SHIFT		24
-#define	MDCR_E2TB_MASK		(0x3UL << MDCR_E2TB_SHIFT)
-#define	MDCR_HLP_SHIFT		26
-#define	MDCR_HLP		(0x1UL << MDCR_HLP_SHIFT)
-#define	MDCR_TDCC_SHIFT		27
-#define	MDCR_TDCC		(0x1UL << MDCR_TDCC_SHIFT)
-#define	MDCR_MTPME_SHIFT	28
-#define	MDCR_MTPME		(0x1UL << MDCR_MTPME_SHIFT)
-#define	MDCR_HPMFZO_SHIFT	29
-#define	MDCR_HPMFZO		(0x1UL << MDCR_HPMFZO_SHIFT)
-#define	MDCR_PMSSE_SHIFT	30
-#define	MDCR_PMSSE_MASK		(0x3UL << MDCR_PMSSE_SHIFT)
-#define	MDCR_HPMFZS_SHIFT	36
-#define	MDCR_HPMFZS		(0x1UL << MDCR_HPMFZS_SHIFT)
-#define	MDCR_PMEE_SHIFT		40
-#define	MDCR_PMEE_MASK		(0x3UL << MDCR_PMEE_SHIFT)
-#define	MDCR_EBWE_SHIFT		43
-#define	MDCR_EBWE		(0x1UL << MDCR_EBWE_SHIFT)
+#define	MDCR_EL2_E2PB_SHIFT	12
+#define	MDCR_EL2_E2PB_MASK	(0x3UL << MDCR_EL2_E2PB_SHIFT)
+#define	MDCR_EL2_TPMS_SHIFT	14
+#define	MDCR_EL2_TPMS		(0x1UL << MDCR_EL2_TPMS_SHIFT)
+#define	MDCR_EL2_EnSPM_SHIFT	15
+#define	MDCR_EL2_EnSPM		(0x1UL << MDCR_EL2_EnSPM_SHIFT)
+#define	MDCR_EL2_HPMD_SHIFT	17
+#define	MDCR_EL2_HPMD		(0x1UL << MDCR_EL2_HPMD_SHIFT)
+#define	MDCR_EL2_TTRF_SHIFT	19
+#define	MDCR_EL2_TTRF		(0x1UL << MDCR_EL2_TTRF_SHIFT)
+#define	MDCR_EL2_HCCD_SHIFT	23
+#define	MDCR_EL2_HCCD		(0x1UL << MDCR_EL2_HCCD_SHIFT)
+#define	MDCR_EL2_E2TB_SHIFT	24
+#define	MDCR_EL2_E2TB_MASK	(0x3UL << MDCR_EL2_E2TB_SHIFT)
+#define	MDCR_EL2_HLP_SHIFT	26
+#define	MDCR_EL2_HLP		(0x1UL << MDCR_EL2_HLP_SHIFT)
+#define	MDCR_EL2_TDCC_SHIFT	27
+#define	MDCR_EL2_TDCC		(0x1UL << MDCR_EL2_TDCC_SHIFT)
+#define	MDCR_EL2_MTPME_SHIFT	28
+#define	MDCR_EL2_MTPME		(0x1UL << MDCR_EL2_MTPME_SHIFT)
+#define	MDCR_EL2_HPMFZO_SHIFT	29
+#define	MDCR_EL2_HPMFZO		(0x1UL << MDCR_EL2_HPMFZO_SHIFT)
+#define	MDCR_EL2_PMSSE_SHIFT	30
+#define	MDCR_EL2_PMSSE_MASK	(0x3UL << MDCR_EL2_PMSSE_SHIFT)
+#define	MDCR_EL2_HPMFZS_SHIFT	36
+#define	MDCR_EL2_HPMFZS		(0x1UL << MDCR_EL2_HPMFZS_SHIFT)
+#define	MDCR_EL2_PMEE_SHIFT	40
+#define	MDCR_EL2_PMEE_MASK	(0x3UL << MDCR_EL2_PMEE_SHIFT)
+#define	MDCR_EL2_EBWE_SHIFT	43
+#define	MDCR_EL2_EBWE		(0x1UL << MDCR_EL2_EBWE_SHIFT)
 
 #endif /* !_MACHINE_HYPERVISOR_H_ */