From nobody Thu Mar 27 20:59:52 2025 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4ZNwyd3jJTz5rtvk; Thu, 27 Mar 2025 20:59:53 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R10" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4ZNwyc6lLlz3nlF; Thu, 27 Mar 2025 20:59:52 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1743109192; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=0KsrwCI2WgsmLNvYzLhUN5aZK556GcbYhDA3GJ5FPJk=; b=Q/U2ol88wz5F653Bx6JGXykbIAvOITKr7nwMbg5deAfeIPbXxxn6bp8RDlnnA2w/GjCVvR kHszBI2t2ZWOGuAIRFLrWAk/TXUlZ/tuLi1h/p2547nSjYVbALZQlOqq0oK35y2JqywgGZ sZ0Wa6Dj/i7XQDsWNPKos4i0OXAe2+Nw+Le/ouL8i6yYLzBM8RcUco+Qop29CN7Al7+Lfn 6a0j4SpnEioN1/wc2afCnmK9lEKw3Ym7y0hgAYvaDkSx2yxM8VST7aVCHg3+SHVewo3CYB g2mcPhBQZbCNmohPiZpBK/svaFGQWyLY6HJ6orNTIXgreuFdOXDQN/2VIXCC0w== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1743109192; a=rsa-sha256; cv=none; b=D9/LUYp3tUKmXEbc9Q9CxoW2AAXCeICLuDT9ctzeoCj0qxKtM91VF+8I/S9UMNaHyvvAZ9 5XLxI14bx78st8TyvY5+HM0a20TxlXiEsvPvlj46R3+WOGFtBEaiYrbuSqzkRWToVi4JYx Q1QMAqCmsXXolvErCy/sb3B1KOW7rAaahJmgltbu6LhtO8HP+jdfL+DuTbQW6Myc/vLBFd inynseuoagg2WGZO0lmLIvcWTNz6GGJM3UPyaWg8I8eiEeHmHb9jIdyyxJI1rVQvQCb54C My0ZqargCRPe8qX4fm/r4jYNyDmwNtSK9T56U1XsL67zmGmLLCi38vbV3Fb6fA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1743109192; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=0KsrwCI2WgsmLNvYzLhUN5aZK556GcbYhDA3GJ5FPJk=; b=aTT1XYzGIgCuVlf5xWp1ZzC+UnmtgzQdDf58TEaLc2KrzMs6Gj0txz3HY7O0/0HZlGmjkI 65AQrI6Pv4EUYmCG+YH1UTmWAv56Z9S0otmDCjcuZmo3Upd3iiVf2lnZrXPA6eYtvbGYtY qNzIAkQx05RSAVFszldkJGlyq2iktlzb2yQejO2kmlTAtpq6N329wIGjKc4/kuXRbtO4i1 IddIdgmfYpcelp3AFWZMdDgj0n16K4NpQMoivJ8qMcOVuMlx3VF7rG0CmjlakdRUVDIAOJ mJMUHT8O8U0rLFGk+IMO5ccKHP+t8u27NjES7SQ5SqDruV2CXmiZRXndbGFBbw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4ZNwyc6FvXz1C0r; Thu, 27 Mar 2025 20:59:52 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 52RKxqrE031913; Thu, 27 Mar 2025 20:59:52 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 52RKxqO5031910; Thu, 27 Mar 2025 20:59:52 GMT (envelope-from git) Date: Thu, 27 Mar 2025 20:59:52 GMT Message-Id: <202503272059.52RKxqO5031910@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: John Baldwin Subject: git: 86dd379d3ea2 - main - pci: Use a single variable for the offset of the power management registers List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jhb X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 86dd379d3ea2a43d702f63cfd0ed60bae91d0f85 Auto-Submitted: auto-generated The branch main has been updated by jhb: URL: https://cgit.FreeBSD.org/src/commit/?id=86dd379d3ea2a43d702f63cfd0ed60bae91d0f85 commit 86dd379d3ea2a43d702f63cfd0ed60bae91d0f85 Author: John Baldwin AuthorDate: 2025-03-27 20:57:04 +0000 Commit: John Baldwin CommitDate: 2025-03-27 20:57:04 +0000 pci: Use a single variable for the offset of the power management registers This is the more typical pattern for other capability register sets, and two of these variables weren't used. Differential Revision: https://reviews.freebsd.org/D49267 --- sys/dev/pci/pci.c | 46 ++++++++++++++++++++++++---------------------- sys/dev/pci/pcivar.h | 4 +--- 2 files changed, 25 insertions(+), 25 deletions(-) diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c index 2ee2f10924aa..fe99d6beb029 100644 --- a/sys/dev/pci/pci.c +++ b/sys/dev/pci/pci.c @@ -908,13 +908,8 @@ pci_read_cap(device_t pcib, pcicfgregs *cfg) /* Process this entry */ switch (REG(ptr + PCICAP_ID, 1)) { case PCIY_PMG: /* PCI power management */ - if (cfg->pp.pp_cap == 0) { - cfg->pp.pp_cap = REG(ptr + PCIR_POWER_CAP, 2); - cfg->pp.pp_status = ptr + PCIR_POWER_STATUS; - cfg->pp.pp_bse = ptr + PCIR_POWER_BSE; - if ((nextptr - ptr) > PCIR_POWER_DATA) - cfg->pp.pp_data = ptr + PCIR_POWER_DATA; - } + cfg->pp.pp_location = ptr; + cfg->pp.pp_cap = REG(ptr + PCIR_POWER_CAP, 2); break; case PCIY_HT: /* HyperTransport */ /* Determine HT-specific capability type. */ @@ -2838,7 +2833,7 @@ pci_set_powerstate_method(device_t dev, device_t child, int state) uint16_t status; int oldstate, highest, delay; - if (cfg->pp.pp_cap == 0) + if (cfg->pp.pp_location == 0) return (EOPNOTSUPP); /* @@ -2869,8 +2864,8 @@ pci_set_powerstate_method(device_t dev, device_t child, int state) delay = 200; else delay = 0; - status = PCI_READ_CONFIG(dev, child, cfg->pp.pp_status, 2) - & ~PCIM_PSTAT_DMASK; + status = PCI_READ_CONFIG(dev, child, cfg->pp.pp_location + + PCIR_POWER_STATUS, 2) & ~PCIM_PSTAT_DMASK; switch (state) { case PCI_POWERSTATE_D0: status |= PCIM_PSTAT_D0; @@ -2896,7 +2891,8 @@ pci_set_powerstate_method(device_t dev, device_t child, int state) pci_printf(cfg, "Transition from D%d to D%d\n", oldstate, state); - PCI_WRITE_CONFIG(dev, child, cfg->pp.pp_status, status, 2); + PCI_WRITE_CONFIG(dev, child, cfg->pp.pp_location + PCIR_POWER_STATUS, + status, 2); if (delay) DELAY(delay); return (0); @@ -2910,8 +2906,9 @@ pci_get_powerstate_method(device_t dev, device_t child) uint16_t status; int result; - if (cfg->pp.pp_cap != 0) { - status = PCI_READ_CONFIG(dev, child, cfg->pp.pp_status, 2); + if (cfg->pp.pp_location != 0) { + status = PCI_READ_CONFIG(dev, child, cfg->pp.pp_location + + PCIR_POWER_STATUS, 2); switch (status & PCIM_PSTAT_DMASK) { case PCIM_PSTAT_D0: result = PCI_POWERSTATE_D0; @@ -2944,11 +2941,13 @@ pci_clear_pme(device_t dev) pcicfgregs *cfg = &dinfo->cfg; uint16_t status; - if (cfg->pp.pp_cap != 0) { - status = pci_read_config(dev, dinfo->cfg.pp.pp_status, 2); + if (cfg->pp.pp_location != 0) { + status = pci_read_config(dev, dinfo->cfg.pp.pp_location + + PCIR_POWER_STATUS, 2); status &= ~PCIM_PSTAT_PMEENABLE; status |= PCIM_PSTAT_PME; - pci_write_config(dev, dinfo->cfg.pp.pp_status, status, 2); + pci_write_config(dev, dinfo->cfg.pp.pp_location + + PCIR_POWER_STATUS, status, 2); } } @@ -2960,10 +2959,12 @@ pci_enable_pme(device_t dev) pcicfgregs *cfg = &dinfo->cfg; uint16_t status; - if (cfg->pp.pp_cap != 0) { - status = pci_read_config(dev, dinfo->cfg.pp.pp_status, 2); + if (cfg->pp.pp_location != 0) { + status = pci_read_config(dev, dinfo->cfg.pp.pp_location + + PCIR_POWER_STATUS, 2); status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE; - pci_write_config(dev, dinfo->cfg.pp.pp_status, status, 2); + pci_write_config(dev, dinfo->cfg.pp.pp_location + + PCIR_POWER_STATUS, status, 2); } } @@ -2973,7 +2974,7 @@ pci_has_pm(device_t dev) struct pci_devinfo *dinfo = device_get_ivars(dev); pcicfgregs *cfg = &dinfo->cfg; - return (cfg->pp.pp_cap != 0); + return (cfg->pp.pp_location != 0); } /* @@ -3079,10 +3080,11 @@ pci_print_verbose(struct pci_devinfo *dinfo) if (cfg->intpin > 0) printf("\tintpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline); - if (cfg->pp.pp_cap) { + if (cfg->pp.pp_location) { uint16_t status; - status = pci_read_config(cfg->dev, cfg->pp.pp_status, 2); + status = pci_read_config(cfg->dev, cfg->pp.pp_location + + PCIR_POWER_STATUS, 2); printf("\tpowerspec %d supports D0%s%s D3 current D%d\n", cfg->pp.pp_cap & PCIM_PCAP_SPEC, cfg->pp.pp_cap & PCIM_PCAP_D1SUPP ? " D1" : "", diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h index 01fd67edb58d..14cb577dbedf 100644 --- a/sys/dev/pci/pcivar.h +++ b/sys/dev/pci/pcivar.h @@ -51,9 +51,7 @@ struct pcicfg_bridge { /* Interesting values for PCI power management */ struct pcicfg_pp { uint16_t pp_cap; /* PCI power management capabilities */ - uint8_t pp_status; /* conf. space addr. of PM control/status reg */ - uint8_t pp_bse; /* conf. space addr. of PM BSE reg */ - uint8_t pp_data; /* conf. space addr. of PM data reg */ + uint8_t pp_location; /* Offset of power management registers */ }; struct pci_map {