git: cae9ae66ad1b - main - aw_rtc: bump settime() delays

From: Mitchell Horne <mhorne_at_FreeBSD.org>
Date: Mon, 15 Dec 2025 15:33:11 UTC
The branch main has been updated by mhorne:

URL: https://cgit.FreeBSD.org/src/commit/?id=cae9ae66ad1b01e84597d03c436bc0579bd07fd4

commit cae9ae66ad1b01e84597d03c436bc0579bd07fd4
Author:     Mitchell Horne <mhorne@FreeBSD.org>
AuthorDate: 2025-12-15 15:29:21 +0000
Commit:     Mitchell Horne <mhorne@FreeBSD.org>
CommitDate: 2025-12-15 15:29:21 +0000

    aw_rtc: bump settime() delays
    
    There are delay loops, checking the BUSY status bit, before writing to
    the date or time registers. Each iteration contains a 1usec delay, for a
    maximum of 70 iterations.
    
    This is frequently not enough on the D1 platform, where the message is
    emitted:
    
      rtc0: could not set date, RTC busy
    
    Bump the loop delay to 10usecs each, and the maximum number of
    iterations to 150, for a maximum delay of 1.5msecs between each write of
    the register.
    
    In my testing this seems to be adequate.
    
    The loop variable is renamed for clarity/simplicity.
    
    Reviewed by:    manu
    MFC after:      1 week
    Sponsored by:   The FreeBSD Foundation
    Differential Revision:  https://reviews.freebsd.org/D54180
---
 sys/arm/allwinner/aw_rtc.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/sys/arm/allwinner/aw_rtc.c b/sys/arm/allwinner/aw_rtc.c
index 4af57ab879e8..d3a73d98d86a 100644
--- a/sys/arm/allwinner/aw_rtc.c
+++ b/sys/arm/allwinner/aw_rtc.c
@@ -87,7 +87,7 @@
 
 #define	HALF_OF_SEC_NS			500000000
 #define	RTC_RES_US			1000000
-#define	RTC_TIMEOUT			70
+#define	RTC_TIMEOUT			150
 
 #define	RTC_READ(sc, reg) 		bus_read_4((sc)->res, (reg))
 #define	RTC_WRITE(sc, reg, val)		bus_write_4((sc)->res, (reg), (val))
@@ -321,7 +321,8 @@ aw_rtc_settime(device_t dev, struct timespec *ts)
 {
 	struct aw_rtc_softc *sc  = device_get_softc(dev);
 	struct clocktime ct;
-	uint32_t clk, rdate, rtime;
+	uint32_t rdate, rtime;
+	u_int i;
 
 	/* RTC resolution is 1 sec */
 	if (ts->tv_nsec >= HALF_OF_SEC_NS)
@@ -335,12 +336,12 @@ aw_rtc_settime(device_t dev, struct timespec *ts)
 		return (EINVAL);
 	}
 
-	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
-		if (clk > RTC_TIMEOUT) {
+	for (i = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; i++) {
+		if (i > RTC_TIMEOUT) {
 			device_printf(dev, "could not set time, RTC busy\n");
 			return (EINVAL);
 		}
-		DELAY(1);
+		DELAY(10);
 	}
 	/* reset time register to avoid unexpected date increment */
 	RTC_WRITE(sc, sc->conf->rtc_time, 0);
@@ -352,21 +353,21 @@ aw_rtc_settime(device_t dev, struct timespec *ts)
 	rtime = SET_SEC_VALUE(ct.sec) | SET_MIN_VALUE(ct.min) |
 		SET_HOUR_VALUE(ct.hour);
 
-	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
-		if (clk > RTC_TIMEOUT) {
+	for (i = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; i++) {
+		if (i > RTC_TIMEOUT) {
 			device_printf(dev, "could not set date, RTC busy\n");
 			return (EINVAL);
 		}
-		DELAY(1);
+		DELAY(10);
 	}
 	RTC_WRITE(sc, sc->conf->rtc_date, rdate);
 
-	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
-		if (clk > RTC_TIMEOUT) {
+	for (i = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; i++) {
+		if (i > RTC_TIMEOUT) {
 			device_printf(dev, "could not set time, RTC busy\n");
 			return (EINVAL);
 		}
-		DELAY(1);
+		DELAY(10);
 	}
 	RTC_WRITE(sc, sc->conf->rtc_time, rtime);