git: 6f41c1fc39d9 - main - ixl(4): Fix queue MSI and legacy IRQ rearming

The branch main has been updated by kgalazka:

URL: https://cgit.FreeBSD.org/src/commit/?id=6f41c1fc39d9fa9db989a7b4f325c3ab85b8fb45

commit 6f41c1fc39d9fa9db989a7b4f325c3ab85b8fb45
Author:     Krzysztof Galazka <kgalazka@FreeBSD.org>
AuthorDate: 2025-08-19 12:50:33 +0000
Commit:     Krzysztof Galazka <kgalazka@FreeBSD.org>
CommitDate: 2025-08-19 13:11:32 +0000

    ixl(4): Fix queue MSI and legacy IRQ rearming
    
    When MSI or legacy interrupt is used driver controls wheter
    queues can trigger an interrupt with the Interrupt Linked List.
    While processing traffic first index of the list is set to EOL
    value to stop queues from triggering interrupts. This index was
    not reset to the correct value when driver attempted to re-enable
    interrupts from queues, what prevented driver from processing any
    traffic. Fix that by setting correct first index in the
    ixl_if_enable_intr function.
    
    While at that fix the comments style and make ixl_if_enable_intr
    and ixl_if_disable_intr more consistent.
    
    Signed-off-by: Krzysztof Galazka <krzysztof.galazka@intel.com>
    
    PR:             288077
    Suggested by:   Mike Belanger <mibelanger@qnx.com>
    Approved by:    kbowling (mentor), erj (mentor)
    Tested by:      gowtham.kumar.ks_intel.com,
    Sponsored by:   Intel Corporation
    MFC after:      2 weeks
    Differential Revision:  https://reviews.freebsd.org/D51331
---
 sys/dev/ixl/if_ixl.c | 25 +++++++++++++++++--------
 1 file changed, 17 insertions(+), 8 deletions(-)

diff --git a/sys/dev/ixl/if_ixl.c b/sys/dev/ixl/if_ixl.c
index 60e66aeaf579..43c3af056b67 100644
--- a/sys/dev/ixl/if_ixl.c
+++ b/sys/dev/ixl/if_ixl.c
@@ -1151,13 +1151,20 @@ ixl_if_enable_intr(if_ctx_t ctx)
 	struct ixl_pf *pf = iflib_get_softc(ctx);
 	struct ixl_vsi *vsi = &pf->vsi;
 	struct i40e_hw		*hw = vsi->hw;
-	struct ixl_rx_queue	*que = vsi->rx_queues;
+	struct ixl_rx_queue	*rx_que = vsi->rx_queues;
 
 	ixl_enable_intr0(hw);
 	/* Enable queue interrupts */
-	for (int i = 0; i < vsi->num_rx_queues; i++, que++)
-		/* TODO: Queue index parameter is probably wrong */
-		ixl_enable_queue(hw, que->rxr.me);
+	if (vsi->shared->isc_intr == IFLIB_INTR_MSIX) {
+		for (int i = 0; i < vsi->num_rx_queues; i++, rx_que++)
+			ixl_enable_queue(hw, rx_que->rxr.me);
+	} else {
+		/*
+		 * Set PFINT_LNKLST0 FIRSTQ_INDX to 0x0 to enable
+		 * triggering interrupts by queues.
+		 */
+		wr32(hw, I40E_PFINT_LNKLST0, 0x0);
+	}
 }
 
 /*
@@ -1175,11 +1182,13 @@ ixl_if_disable_intr(if_ctx_t ctx)
 
 	if (vsi->shared->isc_intr == IFLIB_INTR_MSIX) {
 		for (int i = 0; i < vsi->num_rx_queues; i++, rx_que++)
-			ixl_disable_queue(hw, rx_que->msix - 1);
+			ixl_disable_queue(hw, rx_que->rxr.me);
 	} else {
-		// Set PFINT_LNKLST0 FIRSTQ_INDX to 0x7FF
-		// stops queues from triggering interrupts
-		wr32(hw, I40E_PFINT_LNKLST0, 0x7FF);
+		/*
+		 * Set PFINT_LNKLST0 FIRSTQ_INDX to End of List (0x7FF)
+		 * to stop queues from triggering interrupts.
+		 */
+		wr32(hw, I40E_PFINT_LNKLST0, IXL_QUEUE_EOL);
 	}
 }