From nobody Thu Apr 03 02:27:16 2025 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4ZSlxc75dhz5sJRn; Thu, 03 Apr 2025 02:27:16 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R10" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4ZSlxc6Lbvz3cHH; Thu, 03 Apr 2025 02:27:16 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1743647236; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=/a2hg2xNhOoWoRyodSjFZs4lTZRsGTCwRcgXHSKAUTw=; b=Er4SyTQFCbBpmfq8wVWBWYDvR7jj8PQVnQwrIipI4bHd0K0WO/eE4HjJBbS7rsWmeE4B9g pNAAmYSAnr5aYcFgfLHa92FdioRXGLZZ7CDViinpZLM/J3R0DXoQ08wpXUm9Zij1+cfsjv 5Uze9M51fOMBtAAUSv33Alsr9tAiQ1cLPYE+FpW0why+KscYUasBqYwZ583vRBgOGw4g/d 9U16ZAtMya+rbL7VtdyP+eL1hqgTY+3BXVnLGlLSM7XAfO9B/8b76g/oarLW+WDcVajDLt MJBU0mVX647k2Q6j+oZ5PRypgKLOAOfrlbGpMnrZxF6quKgybOfr1bPBh4r00g== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1743647236; a=rsa-sha256; cv=none; b=A2phqOuHcYXTD6l5ybWNTyRGixwMapWiktLx2cQ7xCF6PnUzrho31JVCXXnaNd/1W+cxLA VU3waHlfXYPJkLybkvuhj9bFavav9QespRDc5ZB0XrY3N3qZ43UfVKOm1Nk9eAqp34c777 ijBc7blxFrP5XKVbNCdRL5GqAkpPzSncNynRDFbnCn4gpjyxkOsXSFEjt6m6Bs148h5R14 60zATeLcFJbDWZGjTDQYGYuwL5NqbUpcpuhpohhtA/yBrxyRL4CQTCTE57zy5WpRRvrVkQ JAD3uR3hWaJrhhSwDM8sPPm6UKnOnAuyDJ+XtpeHpyOYAyoz+qNDxbcJ+xTl2A== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1743647236; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=/a2hg2xNhOoWoRyodSjFZs4lTZRsGTCwRcgXHSKAUTw=; b=f3U8ZKL5dK8iJH2xlRkuPvx0MbiSHGn3OPiWAH45lvvjjYKNz0ro15qrgglwCPoBJy2UY+ NCdRSL8MczCBI0rhxs1n5oR3CQVcjpTVvHU/D30wQct6tEYKP3jr4senkdP28xMQsua13x eW8DXCi3maUC11Uw6+1xiR3vDGaBrOY8CNK8xK3hZmBWvLCipp5cBH5CHLgw7m99xbwRwq kEpOZvAT3c5C4mfgQ/5zHcqo+z7s1CAx6Qclnrb2+aXtb/iYU7MOW/Ar/MOFoN6irD4gNw ozbMAtpJJfXk66JSVk5JdSv3hh1Sw6RqS6lwIH6ErpQLm6ntXMjKbZVS+RzfFw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4ZSlxc5CW2zjXZ; Thu, 03 Apr 2025 02:27:16 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 5332RGsi014886; Thu, 3 Apr 2025 02:27:16 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 5332RGCb014883; Thu, 3 Apr 2025 02:27:16 GMT (envelope-from git) Date: Thu, 3 Apr 2025 02:27:16 GMT Message-Id: <202504030227.5332RGCb014883@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Mitchell Horne Subject: git: b847e406e1df - main - Revert "mccomphy: add support for YT8531" List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: b847e406e1df46a732dab71d324e9dbfa1969447 Auto-Submitted: auto-generated The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=b847e406e1df46a732dab71d324e9dbfa1969447 commit b847e406e1df46a732dab71d324e9dbfa1969447 Author: Mitchell Horne AuthorDate: 2025-04-03 02:22:35 +0000 Commit: Mitchell Horne CommitDate: 2025-04-03 02:26:58 +0000 Revert "mccomphy: add support for YT8531" The new code makes use of FDT/OFW types and interfaces, and obviously fails to build on amd64. Revert to fix. Pointy-hat-to: mhorne This reverts commit e69623451ea62d2c3c76e0d0e775aa3f7317f2eb. --- sys/dev/mii/mcommphy.c | 258 +++++-------------------------------------------- sys/dev/mii/miidevs | 2 - 2 files changed, 25 insertions(+), 235 deletions(-) diff --git a/sys/dev/mii/mcommphy.c b/sys/dev/mii/mcommphy.c index edbed0c66279..a8a16c00bade 100644 --- a/sys/dev/mii/mcommphy.c +++ b/sys/dev/mii/mcommphy.c @@ -1,7 +1,6 @@ /* * Copyright (c) 2022 Jared McNeill * Copyright (c) 2022 Soren Schmidt - * Copyright (c) 2024 Jari Sihvola * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -27,8 +26,7 @@ */ /* - * Motorcomm YT8511C/YT8511H/YT8531 - * Integrated 10/100/1000 Gigabit Ethernet phy + * Motorcomm YT8511C / YT8511H Integrated 10/100/1000 Gigabit Ethernet phy */ #include @@ -44,16 +42,12 @@ #include #include -#include -#include "miidevs.h" #include "miibus_if.h" -#define MCOMMPHY_YT8511_OUI 0x000000 -#define MCOMMPHY_YT8511_MODEL 0x10 -#define MCOMMPHY_YT8511_REV 0x0a - -#define MCOMMPHY_YT8531_MODEL 0x11 +#define MCOMMPHY_OUI 0x000000 +#define MCOMMPHY_MODEL 0x10 +#define MCOMMPHY_REV 0x0a #define EXT_REG_ADDR 0x1e #define EXT_REG_DATA 0x1f @@ -67,49 +61,9 @@ #define PHY_SLEEP_CONTROL1_REG 0x27 #define PLLON_IN_SLP 0x4000 -/* Registers and values for YT8531 */ -#define YT8531_CHIP_CONFIG 0xa001 -#define RXC_DLY_EN (1 << 8) - -#define YT8531_PAD_DRSTR_CFG 0xa010 -#define PAD_RXC_MASK 0x7 -#define PAD_RXC_SHIFT 13 -#define JH7110_RGMII_RXC_STRENGTH 6 - -#define YT8531_RGMII_CONFIG1 0xa003 -#define RX_DELAY_SEL_SHIFT 10 -#define RX_DELAY_SEL_MASK 0xf -#define RXC_DLY_THRESH 2250 -#define RXC_DLY_ADDON 1900 -#define TX_DELAY_SEL_FE_MASK 0xf -#define TX_DELAY_SEL_FE_SHIFT 4 -#define TX_DELAY_SEL_MASK 0xf -#define TX_DELAY_SEL_SHIFT 0 -#define TX_CLK_SEL (1 << 14) -#define INTERNAL_DLY_DIV 150 - -#define YT8531_SYNCE_CFG 0xa012 -#define EN_SYNC_E (1 << 6) - #define LOWEST_SET_BIT(mask) ((((mask) - 1) & (mask)) ^ (mask)) #define SHIFTIN(x, mask) ((x) * LOWEST_SET_BIT(mask)) -static const struct mii_phydesc mcommphys[] = { - MII_PHY_DESC(MOTORCOMM, YT8511), - MII_PHY_DESC(MOTORCOMM2, YT8531), - MII_PHY_END -}; - -struct mcommphy_softc { - mii_softc_t mii_sc; - device_t dev; - bool tx_10_inv; - bool tx_100_inv; - bool tx_1000_inv; -}; - -static void mcommphy_yt8531_speed_adjustment(struct mii_softc *sc); - static int mcommphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { @@ -130,16 +84,6 @@ mcommphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) /* Update the media status. */ PHY_STATUS(sc); - /* - * For the needs of JH7110 which has two Ethernet devices with - * different TX inverted configuration depending on speed used - */ - if (sc->mii_mpd_model == MCOMMPHY_YT8531_MODEL && - (sc->mii_media_active != mii->mii_media_active || - sc->mii_media_status != mii->mii_media_status)) { - mcommphy_yt8531_speed_adjustment(sc); - } - /* Callback if something changed. */ mii_phy_update(sc, cmd); @@ -161,22 +105,26 @@ mcommphy_probe(device_t dev) * The YT8511C reports an OUI of 0. Best we can do here is to match * exactly the contents of the PHY identification registers. */ - if (MII_OUI(ma->mii_id1, ma->mii_id2) == MCOMMPHY_YT8511_OUI && - MII_MODEL(ma->mii_id2) == MCOMMPHY_YT8511_MODEL && - MII_REV(ma->mii_id2) == MCOMMPHY_YT8511_REV) { + if (MII_OUI(ma->mii_id1, ma->mii_id2) == MCOMMPHY_OUI && + MII_MODEL(ma->mii_id2) == MCOMMPHY_MODEL && + MII_REV(ma->mii_id2) == MCOMMPHY_REV) { device_set_desc(dev, "Motorcomm YT8511 media interface"); - return (BUS_PROBE_DEFAULT); + return BUS_PROBE_DEFAULT; } - - /* YT8531 follows a conventional procedure */ - return (mii_phy_dev_probe(dev, mcommphys, BUS_PROBE_DEFAULT)); + return (ENXIO); } -static void -mcommphy_yt8511_setup(struct mii_softc *sc) +static int +mcommphy_attach(device_t dev) { + struct mii_softc *sc = device_get_softc(dev); uint16_t oldaddr, data; + mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &mcommphy_funcs, 0); + + PHY_RESET(sc); + + /* begin chip stuff */ oldaddr = PHY_READ(sc, EXT_REG_ADDR); PHY_WRITE(sc, EXT_REG_ADDR, PHY_CLOCK_GATING_REG); @@ -202,177 +150,21 @@ mcommphy_yt8511_setup(struct mii_softc *sc) PHY_WRITE(sc, EXT_REG_DATA, data); PHY_WRITE(sc, EXT_REG_ADDR, oldaddr); -} - -static void -mcommphy_yt8531_speed_adjustment(struct mii_softc *sc) -{ - struct mcommphy_softc *mcomm_sc = (struct mcommphy_softc *)sc; - struct mii_data *mii = sc->mii_pdata; - bool tx_clk_inv = false; - uint16_t reg, oldaddr; - - switch (IFM_SUBTYPE(mii->mii_media_active)) { - case IFM_1000_T: - tx_clk_inv = mcomm_sc->tx_1000_inv; - break; - case IFM_100_T: - tx_clk_inv = mcomm_sc->tx_100_inv; - break; - case IFM_10_T: - tx_clk_inv = mcomm_sc->tx_10_inv; - break; - } - - oldaddr = PHY_READ(sc, EXT_REG_ADDR); - - PHY_WRITE(sc, EXT_REG_ADDR, YT8531_RGMII_CONFIG1); - reg = PHY_READ(sc, EXT_REG_DATA); - if (tx_clk_inv) - reg |= TX_CLK_SEL; - else - reg &= ~TX_CLK_SEL; - PHY_WRITE(sc, EXT_REG_DATA, reg); - - PHY_WRITE(sc, EXT_REG_ADDR, oldaddr); - - return; -} - -static int -mcommphy_yt8531_setup_delay(struct mii_softc *sc) -{ - struct mcommphy_softc *mcomm_sc = (struct mcommphy_softc *)sc; - mii_fdt_phy_config_t *cfg = mii_fdt_get_config(mcomm_sc->dev); - pcell_t val; - uint16_t reg, oldaddr; - int rx_delay, tx_delay = 0; - bool rxc_dly_en_off = false; - - if (OF_getencprop(cfg->phynode, "rx-internal-delay-ps", &val, - sizeof(val)) > 0) { - if (val <= RXC_DLY_THRESH && val % INTERNAL_DLY_DIV == 0) { - rx_delay = val / INTERNAL_DLY_DIV; - rxc_dly_en_off = true; - } else { - rx_delay = (val - RXC_DLY_ADDON) / INTERNAL_DLY_DIV; - if ((val - RXC_DLY_ADDON) % INTERNAL_DLY_DIV != 0) - return (ENXIO); - } - } - - if (OF_getencprop(cfg->phynode, "tx-internal-delay-ps", &val, - sizeof(val)) > 0) { - tx_delay = val / INTERNAL_DLY_DIV; - if (val % INTERNAL_DLY_DIV != 0) - return (ENXIO); - } - - mii_fdt_free_config(cfg); + /* end chip stuff */ - oldaddr = PHY_READ(sc, EXT_REG_ADDR); - - /* Modifying Chip Config register */ - PHY_WRITE(sc, EXT_REG_ADDR, YT8531_CHIP_CONFIG); - reg = PHY_READ(sc, EXT_REG_DATA); - if (rxc_dly_en_off) - reg &= ~(RXC_DLY_EN); - PHY_WRITE(sc, EXT_REG_DATA, reg); - - /* Modifying RGMII Config1 register */ - PHY_WRITE(sc, EXT_REG_ADDR, YT8531_RGMII_CONFIG1); - reg = PHY_READ(sc, EXT_REG_DATA); - reg &= ~(RX_DELAY_SEL_MASK << RX_DELAY_SEL_SHIFT); - reg |= rx_delay << RX_DELAY_SEL_SHIFT; - reg &= ~(TX_DELAY_SEL_MASK << TX_DELAY_SEL_SHIFT); - reg |= tx_delay << TX_DELAY_SEL_SHIFT; - PHY_WRITE(sc, EXT_REG_DATA, reg); - - PHY_WRITE(sc, EXT_REG_ADDR, oldaddr); - - return (0); -} - -static int -mcommphy_yt8531_setup(struct mii_softc *sc) -{ - struct mcommphy_softc *mcomm_sc = (struct mcommphy_softc *)sc; - mii_fdt_phy_config_t *cfg = mii_fdt_get_config(mcomm_sc->dev); - uint16_t reg, oldaddr; - - if (OF_hasprop(cfg->phynode, "motorcomm,tx-clk-10-inverted")) - mcomm_sc->tx_10_inv = true; - - if (OF_hasprop(cfg->phynode, "motorcomm,tx-clk-100-inverted")) - mcomm_sc->tx_100_inv = true; - - if (OF_hasprop(cfg->phynode, "motorcomm,tx-clk-1000-inverted")) - mcomm_sc->tx_1000_inv = true; - - mii_fdt_free_config(cfg); - - oldaddr = PHY_READ(sc, EXT_REG_ADDR); - - /* Modifying Pad Drive Strength register */ - PHY_WRITE(sc, EXT_REG_ADDR, YT8531_PAD_DRSTR_CFG); - reg = PHY_READ(sc, EXT_REG_DATA); - reg &= ~(PAD_RXC_MASK << PAD_RXC_SHIFT); - reg |= (JH7110_RGMII_RXC_STRENGTH << PAD_RXC_SHIFT); - PHY_WRITE(sc, EXT_REG_DATA, reg); - - /* Modifying SyncE Config register */ - PHY_WRITE(sc, EXT_REG_ADDR, YT8531_SYNCE_CFG); - reg = PHY_READ(sc, EXT_REG_DATA); - reg &= ~(EN_SYNC_E); - PHY_WRITE(sc, EXT_REG_DATA, reg); - - PHY_WRITE(sc, EXT_REG_ADDR, oldaddr); - - if (mcommphy_yt8531_setup_delay(sc) != 0) - return (ENXIO); - - return (0); -} - -static int -mcommphy_attach(device_t dev) -{ - struct mcommphy_softc *mcomm_sc = device_get_softc(dev); - mii_softc_t *mii_sc = &mcomm_sc->mii_sc; - int ret = 0; - - mcomm_sc->dev = dev; - - mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &mcommphy_funcs, 0); - - PHY_RESET(mii_sc); - - if (mii_sc->mii_mpd_model == MCOMMPHY_YT8511_MODEL) - mcommphy_yt8511_setup(mii_sc); - else if (mii_sc->mii_mpd_model == MCOMMPHY_YT8531_MODEL) - ret = mcommphy_yt8531_setup(mii_sc); - else { - device_printf(dev, "no PHY model detected\n"); - return (ENXIO); - } - if (ret) { - device_printf(dev, "PHY setup failed, error: %d\n", ret); - return (ret); - } - - mii_sc->mii_capabilities = PHY_READ(mii_sc, MII_BMSR) & - mii_sc->mii_capmask; - if (mii_sc->mii_capabilities & BMSR_EXTSTAT) - mii_sc->mii_extcapabilities = PHY_READ(mii_sc, MII_EXTSR); + sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; + if (sc->mii_capabilities & BMSR_EXTSTAT) + sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); device_printf(dev, " "); - mii_phy_add_media(mii_sc); + mii_phy_add_media(sc); printf("\n"); - MIIBUS_MEDIAINIT(mii_sc->mii_dev); + MIIBUS_MEDIAINIT(sc->mii_dev); return (0); } + static device_method_t mcommphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, mcommphy_probe), @@ -385,7 +177,7 @@ static device_method_t mcommphy_methods[] = { static driver_t mcommphy_driver = { "mcommphy", mcommphy_methods, - sizeof(struct mcommphy_softc) + sizeof(struct mii_softc) }; DRIVER_MODULE(mcommphy, miibus, mcommphy_driver, 0, 0); diff --git a/sys/dev/mii/miidevs b/sys/dev/mii/miidevs index 5c10fd0f0224..c8eba403c22d 100644 --- a/sys/dev/mii/miidevs +++ b/sys/dev/mii/miidevs @@ -63,7 +63,6 @@ oui LEVEL1 0x00207b Level 1 oui MARVELL 0x005043 Marvell Semiconductor oui MICREL 0x0010a1 Micrel oui MOTORCOMM 0x000000 Motorcomm -oui MOTORCOMM2 0xc82b5e Motorcomm oui MYSON 0x00c0b4 Myson Technology oui NATSEMI 0x080017 National Semiconductor oui PMCSIERRA 0x00e004 PMC-Sierra @@ -296,7 +295,6 @@ model MICREL KSZ9031 0x0022 Micrel KSZ9031 10/100/1000 PHY /* Motorcomm PHYs */ model MOTORCOMM YT8511 0x010a Motorcomm YT8511 10/100/1000 PHY -model MOTORCOMM2 YT8531 0x0011 Motorcomm YT8531 10/100/1000 PHY /* Myson Technology PHYs */ model xxMYSON MTD972 0x0000 MTD972 10/100 media interface