git: 280e50461a1f - main - amd64 la57_trampoline: save registers in memory

From: Konstantin Belousov <kib_at_FreeBSD.org>
Date: Mon, 16 Sep 2024 08:15:10 UTC
The branch main has been updated by kib:

URL: https://cgit.FreeBSD.org/src/commit/?id=280e50461a1f638088e7a0b9116976821c374b56

commit 280e50461a1f638088e7a0b9116976821c374b56
Author:     Konstantin Belousov <kib@FreeBSD.org>
AuthorDate: 2024-09-12 05:43:44 +0000
Commit:     Konstantin Belousov <kib@FreeBSD.org>
CommitDate: 2024-09-16 08:12:25 +0000

    amd64 la57_trampoline: save registers in memory
    
    AMD64 ARM states that 64bit part of the architectural state is undefined
    after 32<->64 mode switching.
    
    Sponsored by:   Advanced Micro Devices (AMD)
    Sponsored by:   The FreeBSD Foundation
    MFC after:      1 week
---
 sys/amd64/amd64/locore.S | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/sys/amd64/amd64/locore.S b/sys/amd64/amd64/locore.S
index 3df3dd722f45..1ed9085e655c 100644
--- a/sys/amd64/amd64/locore.S
+++ b/sys/amd64/amd64/locore.S
@@ -91,11 +91,12 @@ ENTRY(btext)
 
 /* la57_trampoline(%rdi pml5) */
 ENTRY(la57_trampoline)
-	movq	%rsp,%r11
-	movq	%rbx,%r10
-	movq	%rbp,%r9
-	movq	%cr4,%r8
-	orl	$CR4_LA57,%r8d
+	movq	%rsp,lst(%rip)
+	movq	%rbx,lst+8(%rip)
+	movq	%rbp,lst+0x10(%rip)
+	movq	%cr4,%rax
+	orq	$CR4_LA57,%rax
+	movq	%rax,lst+0x18(%rip)
 	leaq	la57_trampoline_end(%rip),%rsp
 
 	movq	%cr0,%rbp
@@ -143,12 +144,14 @@ l1:	movl	$(3<<3),%eax
 	lretl
 	.code64
 
-l2:	movq	%r11,%rsp
-	movq	%r10,%rbx
-	movq	%r9,%rbp
-	movq	%r8,%cr4
+l2:	movq	lst(%rip),%rsp
+	movq	lst+8(%rip),%rbx
+	movq	lst+0x10(%rip),%rbp
+	movq	lst+0x18(%rip),%rax
+	movq	%rax,%cr4
 	retq
 	.p2align 4,0
+lst:	.quad	0,0,0,0
 ENTRY(la57_trampoline_gdt_desc)
 	.word	la57_trampoline_end - la57_trampoline_gdt
 	.long	0, 0		/* filled by pmap_bootstrap_la57 */