git: 5727c249ad2a - main - arm64: Use register types to build kernel ID regs

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=5727c249ad2a94cf726c8db60841cf2112245cb3

commit 5727c249ad2a94cf726c8db60841cf2112245cb3
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2024-10-18 09:17:15 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2024-10-21 12:23:15 +0000

    arm64: Use register types to build kernel ID regs
    
    Use the ID register tables to find how to adjust the ID register fields
    in the kernel and vmm views. This allows us to use the same method to
    get a common view of CTR_EL0.
    
    Reviewed by:    imp
    Sponsored by:   Arm Ltd
    Differential Revision:  https://reviews.freebsd.org/D47125
---
 sys/arm64/arm64/identcpu.c | 34 ++++++++--------------------------
 1 file changed, 8 insertions(+), 26 deletions(-)

diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index 7c5fdc04fdc7..834b0c5493b4 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -78,6 +78,8 @@ SYSCTL_INT(_machdep_cache, OID_AUTO, allow_idc, CTLFLAG_RDTUN, &allow_idc, 0,
 
 static void check_cpu_regs(u_int cpu, struct cpu_desc *desc,
     struct cpu_desc *prev_desc);
+static uint64_t update_special_reg_field(uint64_t user_reg, u_int type,
+    uint64_t value, u_int width, u_int shift, bool sign);
 
 /*
  * The default implementation of I-cache sync assumes we have an
@@ -2181,27 +2183,6 @@ mrs_field_cmp(uint64_t a, uint64_t b, u_int shift, int width, bool sign)
 	return (a - b);
 }
 
-static uint64_t
-update_lower_register(uint64_t val, uint64_t new_val, u_int shift,
-    int width, bool sign)
-{
-	uint64_t mask;
-
-	KASSERT(width > 0 && width < 64, ("%s: Invalid width %d", __func__,
-	    width));
-
-	/*
-	 * If the new value is less than the existing value update it.
-	 */
-	if (mrs_field_cmp(new_val, val, shift, width, sign) < 0) {
-		mask = (1ul << width) - 1;
-		val &= ~(mask << shift);
-		val |= new_val & (mask << shift);
-	}
-
-	return (val);
-}
-
 bool
 extract_user_id_field(u_int reg, u_int field_shift, uint8_t *val)
 {
@@ -2249,9 +2230,9 @@ get_kernel_reg_masked(u_int reg, uint64_t *valp, uint64_t mask)
 			val = CPU_DESC_FIELD(kern_cpu_desc, i);
 			fields = user_regs[i].fields;
 			for (int j = 0; fields[j].type != 0; j++) {
-				mask = update_lower_register(mask, val,
-				    fields[j].shift, fields[j].width,
-				    fields[j].sign);
+				mask = update_special_reg_field(mask,
+				    fields[j].type, val, fields[j].width,
+				    fields[j].shift, fields[j].sign);
 			}
 			*valp = mask;
 			return (true);
@@ -2357,8 +2338,9 @@ update_special_regs(u_int cpu)
 			    fields[j].sign);
 
 			/* Update the kernel ID register view */
-			kern_reg = update_lower_register(kern_reg, value,
-			    fields[j].shift, fields[j].width, fields[j].sign);
+			kern_reg = update_special_reg_field(kern_reg,
+			    fields[j].type, value, fields[j].width,
+			    fields[j].shift, fields[j].sign);
 		}
 
 		CPU_DESC_FIELD(kern_cpu_desc, i) = kern_reg;