git: 2b3d9ac8907f - main - arm64: Remove old I-Cache types

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=2b3d9ac8907fecbeb873cfb9e0d03f2c7dc18bc4

commit 2b3d9ac8907fecbeb873cfb9e0d03f2c7dc18bc4
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2024-10-18 09:15:52 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2024-10-21 12:23:15 +0000

    arm64: Remove old I-Cache types
    
    The VPIPT and AIVIVT cache types are reserved from Armv8.0. Remove
    them as nothing will report these values.
    
    Reviewed by:    imp
    Sponsored by:   Arm Ltd
    Differential Revision:  https://reviews.freebsd.org/D47117
---
 sys/arm64/arm64/identcpu.c | 9 ---------
 sys/arm64/include/armreg.h | 2 --
 2 files changed, 11 deletions(-)

diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index 0e82381a9ac6..0f2104419aad 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -2441,12 +2441,6 @@ print_ctr_fields(struct sbuf *sb, uint64_t reg, const void *arg __unused)
 	reg &= ~(CTR_DLINE_MASK | CTR_ILINE_MASK);
 
 	switch(CTR_L1IP_VAL(reg)) {
-	case CTR_L1IP_VPIPT:
-		sbuf_printf(sb, "VPIPT");
-		break;
-	case CTR_L1IP_AIVIVT:
-		sbuf_printf(sb, "AIVIVT");
-		break;
 	case CTR_L1IP_VIPT:
 		sbuf_printf(sb, "VIPT");
 		break;
@@ -2817,9 +2811,6 @@ identify_cache(uint64_t ctr)
 	switch (CTR_L1IP_VAL(ctr)) {
 	case CTR_L1IP_PIPT:
 		break;
-	case CTR_L1IP_VPIPT:
-		icache_vmid = true;
-		break;
 	default:
 	case CTR_L1IP_VIPT:
 		icache_aliasing = true;
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 08a046762a58..b48441f2b413 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -388,8 +388,6 @@
 #define	CTR_L1IP_SHIFT		14
 #define	CTR_L1IP_MASK		(0x3 << CTR_L1IP_SHIFT)
 #define	CTR_L1IP_VAL(reg)	((reg) & CTR_L1IP_MASK)
-#define	 CTR_L1IP_VPIPT		(0 << CTR_L1IP_SHIFT)
-#define	 CTR_L1IP_AIVIVT	(1 << CTR_L1IP_SHIFT)
 #define	 CTR_L1IP_VIPT		(2 << CTR_L1IP_SHIFT)
 #define	 CTR_L1IP_PIPT		(3 << CTR_L1IP_SHIFT)
 #define	CTR_ILINE_SHIFT		0