git: 5035db222e8f - main - amdiommu: Fix device table segment base register offsets

The branch main has been updated by jah:

URL: https://cgit.FreeBSD.org/src/commit/?id=5035db222e8fa77d0b40fcd5a92c073dd1c590c2

commit 5035db222e8fa77d0b40fcd5a92c073dd1c590c2
Author:     Jason A. Harmening <jah@FreeBSD.org>
AuthorDate: 2024-11-25 23:24:41 +0000
Commit:     Jason A. Harmening <jah@FreeBSD.org>
CommitDate: 2024-11-26 03:40:45 +0000

    amdiommu: Fix device table segment base register offsets
    
    Segment base registers are at 8-byte intervals, while the register
    write helper takes a byte-aligned offset.  This fixes
    DEV_TAB_HARDWARE_ERROR events and associated peripheral I/O failures
    on an Epyc-based system with 8-segment device tables.
    
    Reviewed by:            kib
    Differential Revision:  https://reviews.freebsd.org/D47752
---
 sys/x86/iommu/amd_drv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sys/x86/iommu/amd_drv.c b/sys/x86/iommu/amd_drv.c
index d35c6c8dddc8..5820594691f7 100644
--- a/sys/x86/iommu/amd_drv.c
+++ b/sys/x86/iommu/amd_drv.c
@@ -277,7 +277,7 @@ amdiommu_create_dev_tbl(struct amdiommu_unit *sc)
 			pmap_qenter(seg_vaddr, &m, 1);
 		}
 		reg = i == 0 ? AMDIOMMU_DEVTAB_BASE : AMDIOMMU_DEVTAB_S1_BASE +
-		    i - 1;
+		    ((i - 1) << 3);
 		amdiommu_write8(sc, reg, rval);		
 	}