git: 178747a1586d - main - Add more arm64 special register values
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Date: Mon, 12 Jun 2023 09:30:28 UTC
The branch main has been updated by andrew:
URL: https://cgit.FreeBSD.org/src/commit/?id=178747a1586d48a8063014d7b8528ec47205e1bf
commit 178747a1586d48a8063014d7b8528ec47205e1bf
Author: Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2023-06-09 17:46:58 +0000
Commit: Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2023-06-12 08:31:14 +0000
Add more arm64 special register values
These will be used to simplify the kernel special register handling.
Sponsored by: Arm Ltd
---
sys/arm64/include/armreg.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 46093fc2e875..b40dfb206f99 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -1222,6 +1222,14 @@
#define MDSCR_MDE_SHIFT 15
#define MDSCR_MDE (UL(0x1) << MDSCR_MDE_SHIFT)
+/* MIDR_EL1 - Main ID Register */
+#define MIDR_EL1 MRS_REG(MIDR_EL1)
+#define MIDR_EL1_op0 3
+#define MIDR_EL1_op1 0
+#define MIDR_EL1_CRn 0
+#define MIDR_EL1_CRm 0
+#define MIDR_EL1_op2 0
+
/* MPIDR_EL1 - Multiprocessor Affinity Register */
#define MPIDR_EL1 MRS_REG(MPIDR_EL1)
#define MPIDR_EL1_op0 3
@@ -1861,6 +1869,14 @@
#define PSR_SETTABLE_32 PSR_FLAGS
#define PSR_SETTABLE_64 (PSR_FLAGS | PSR_SS)
+/* REVIDR_EL1 - Revision ID Register */
+#define REVIDR_EL1 MRS_REG(REVIDR_EL1)
+#define REVIDR_EL1_op0 3
+#define REVIDR_EL1_op1 0
+#define REVIDR_EL1_CRn 0
+#define REVIDR_EL1_CRm 0
+#define REVIDR_EL1_op2 6
+
/* TCR_EL1 - Translation Control Register */
/* Bits 63:59 are reserved */
#define TCR_TCMA1_SHIFT 58