git: dd24d475d514 - main - arm64: Add constants for decoding ISS fields for WF* exceptions

The branch main has been updated by markj:

URL: https://cgit.FreeBSD.org/src/commit/?id=dd24d475d514bba755111c5eecfef1d362b9d68c

commit dd24d475d514bba755111c5eecfef1d362b9d68c
Author:     Mark Johnston <markj@FreeBSD.org>
AuthorDate: 2023-07-28 13:32:45 +0000
Commit:     Mark Johnston <markj@FreeBSD.org>
CommitDate: 2023-07-28 13:34:38 +0000

    arm64: Add constants for decoding ISS fields for WF* exceptions
    
    WFI and WFIT trap to EL2 when executed in a vmm guest.  (Currently
    WFE/WFET are not configured to trap.)  We only handle WFI at the moment,
    so these constants are useful when handling the exception.
    
    Reviewed by:    andrew
    MFC after:      1 week
    Sponsored by:   Innovate UK
    Differential Revision:  https://reviews.freebsd.org/D41199
---
 sys/arm64/include/armreg.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 92a62c8d2b53..df1b51fb1875 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -316,6 +316,26 @@
 #define	 ISS_INSN_S1PTW		(0x01 << 7)
 #define	 ISS_INSN_IFSC_MASK	(0x1f << 0)
 
+#define	 ISS_WFx_TI_SHIFT	0
+#define	 ISS_WFx_TI_MASK	(0x03 << ISS_WFx_TI_SHIFT)
+#define	 ISS_WFx_TI_WFI		(0x00 << ISS_WFx_TI_SHIFT)
+#define	 ISS_WFx_TI_WFE		(0x01 << ISS_WFx_TI_SHIFT)
+#define	 ISS_WFx_TI_WFIT	(0x02 << ISS_WFx_TI_SHIFT)
+#define	 ISS_WFx_TI_WFET	(0x03 << ISS_WFx_TI_SHIFT)
+#define	 ISS_WFx_RV_SHIFT	2
+#define	 ISS_WFx_RV_MASK	(0x01 << ISS_WFx_RV_SHIFT)
+#define	 ISS_WFx_RV_INVALID	(0x00 << ISS_WFx_RV_SHIFT)
+#define	 ISS_WFx_RV_VALID	(0x01 << ISS_WFx_RV_SHIFT)
+#define	 ISS_WFx_RN_SHIFT	5
+#define	 ISS_WFx_RN_MASK	(0x1f << ISS_WFx_RN_SHIFT)
+#define	 ISS_WFx_RN(x)		(((x) & ISS_WFx_RN_MASK) >> ISS_WFx_RN_SHIFT)
+#define	 ISS_WFx_COND_SHIFT	20
+#define	 ISS_WFx_COND_MASK	(0x0f << ISS_WFx_COND_SHIFT)
+#define	 ISS_WFx_CV_SHIFT	24
+#define	 ISS_WFx_CV_MASK	(0x01 << ISS_WFx_CV_SHIFT)
+#define	 ISS_WFx_CV_INVALID	(0x00 << ISS_WFx_CV_SHIFT)
+#define	 ISS_WFx_CV_VALID	(0x01 << ISS_WFx_CV_SHIFT)
+
 #define	 ISS_MSR_DIR_SHIFT	0
 #define	 ISS_MSR_DIR		(0x01 << ISS_MSR_DIR_SHIFT)
 #define	 ISS_MSR_Rt_SHIFT	5