git: 80466455adca - main - da9063_iic: Add new driver for the Dialog Semiconductor DA9063 PMIC
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Date: Tue, 13 Sep 2022 16:47:00 UTC
The branch main has been updated by jrtc27:
URL: https://cgit.FreeBSD.org/src/commit/?id=80466455adcab3952f7b1727c6332832540a8d14
commit 80466455adcab3952f7b1727c6332832540a8d14
Author: Jessica Clarke <jrtc27@FreeBSD.org>
AuthorDate: 2022-09-13 16:46:09 +0000
Commit: Jessica Clarke <jrtc27@FreeBSD.org>
CommitDate: 2022-09-13 16:46:09 +0000
da9063_iic: Add new driver for the Dialog Semiconductor DA9063 PMIC
This is an MFD with regulators, an RTC and a watchdog, among other
things. This adds the necessary infrastructure for specific children to
be added.
Note that the PMIC can also be attached via SPI, not just I2C, and so
the interface is abstracted. No SPI implementation is added, however.
This is the PMIC on SiFive's HiFive Unmatched.
Reviewed by: manu, mhorne
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D36199
---
sys/conf/files | 2 +
sys/dev/dialog/da9063/da9063_if.m | 52 ++
sys/dev/dialog/da9063/da9063_iic.c | 261 ++++++++
sys/dev/dialog/da9063/da9063reg.h | 1209 ++++++++++++++++++++++++++++++++++++
4 files changed, 1524 insertions(+)
diff --git a/sys/conf/files b/sys/conf/files
index afe2575c8548..c1cd7455a845 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -1586,6 +1586,8 @@ dev/dc/pnphy.c optional dc pci
dev/dcons/dcons.c optional dcons
dev/dcons/dcons_crom.c optional dcons_crom
dev/dcons/dcons_os.c optional dcons
+dev/dialog/da9063/da9063_if.m optional da9063_pmic
+dev/dialog/da9063/da9063_iic.c optional da9063_pmic iicbus fdt
dev/dme/if_dme.c optional dme
dev/drm2/drm_agpsupport.c optional drm2
dev/drm2/drm_auth.c optional drm2
diff --git a/sys/dev/dialog/da9063/da9063_if.m b/sys/dev/dialog/da9063/da9063_if.m
new file mode 100644
index 000000000000..a6f5bb917dc2
--- /dev/null
+++ b/sys/dev/dialog/da9063/da9063_if.m
@@ -0,0 +1,52 @@
+#-
+# SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+#
+# Copyright (c) 2022 Jessica Clarke <jrtc27@FreeBSD.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+
+#
+# The Dialog Semiconductor DA9063 PMIC is a multi-function device that can be
+# connected using both I2C and SPI. This provides a bus-independent interface
+# to the underlying protocol-specific driver for the child devices.
+#
+INTERFACE da9063;
+
+METHOD int read {
+ device_t dev;
+ uint16_t addr;
+ uint8_t *val;
+};
+
+METHOD int write {
+ device_t dev;
+ uint16_t addr;
+ uint8_t val;
+};
+
+METHOD int modify {
+ device_t dev;
+ uint16_t addr;
+ uint8_t clear_mask;
+ uint8_t set_mask;
+};
diff --git a/sys/dev/dialog/da9063/da9063_iic.c b/sys/dev/dialog/da9063/da9063_iic.c
new file mode 100644
index 000000000000..f07633bcfe5b
--- /dev/null
+++ b/sys/dev/dialog/da9063/da9063_iic.c
@@ -0,0 +1,261 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2022 Jessica Clarke <jrtc27@FreeBSD.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Dialog Semiconductor DA9063 PMIC, 2-WIRE */
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/lock.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+
+#include <dev/dialog/da9063/da9063reg.h>
+#include <dev/fdt/simplebus.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include "da9063_if.h"
+
+#define DA9063_IIC_PAGE_SHIFT 8
+#define DA9063_IIC_PAGE_SIZE (1 << DA9063_IIC_PAGE_SHIFT)
+#define DA9063_IIC_PAGE(_a) ((_a) >> DA9063_IIC_PAGE_SHIFT)
+#define DA9063_IIC_PAGE_OFF(_a) ((_a) & (DA9063_IIC_PAGE_SIZE - 1))
+#define DA9063_IIC_ADDR(_p, _o) (((_p) << DA9063_IIC_PAGE_SHIFT) | (_o))
+
+/*
+ * For 2-WIRE (I2C) operation pages are 256 registers but PAGE_CON is in units
+ * of 128 registers with the LSB ignored so scale the page when writing to it.
+ */
+#define DA9063_IIC_PAGE_CON_REG_PAGE_SHIFT 1
+
+struct da9063_iic_softc {
+ struct simplebus_softc simplebus_sc;
+ device_t dev;
+ struct mtx mtx;
+ uint8_t page;
+};
+
+#define DA9063_IIC_LOCK(sc) mtx_lock(&(sc)->mtx)
+#define DA9063_IIC_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
+#define DA9063_IIC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED);
+#define DA9063_IIC_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED);
+
+static struct ofw_compat_data compat_data[] = {
+ { "dlg,da9063", 1 },
+ { NULL, 0 }
+};
+
+static int
+da9063_iic_select_page(struct da9063_iic_softc *sc, uint16_t page)
+{
+ uint8_t reg;
+ int error;
+
+ DA9063_IIC_ASSERT_LOCKED(sc);
+
+ if (page == sc->page)
+ return (0);
+
+ error = iicdev_readfrom(sc->dev, DA9063_PAGE_CON, ®, 1, IIC_WAIT);
+ if (error != 0)
+ return (iic2errno(error));
+
+ reg &= ~(DA9063_PAGE_CON_REG_PAGE_MASK <<
+ DA9063_PAGE_CON_REG_PAGE_SHIFT);
+ reg |= (page << DA9063_IIC_PAGE_CON_REG_PAGE_SHIFT) <<
+ DA9063_PAGE_CON_REG_PAGE_SHIFT;
+
+ error = iicdev_writeto(sc->dev, DA9063_PAGE_CON, ®, 1, IIC_WAIT);
+ if (error != 0)
+ return (iic2errno(error));
+
+ sc->page = page;
+
+ return (0);
+}
+
+static int
+da9063_iic_read(device_t dev, uint16_t addr, uint8_t *val)
+{
+ struct da9063_iic_softc *sc;
+ int error;
+
+ sc = device_get_softc(dev);
+
+ DA9063_IIC_LOCK(sc);
+
+ error = da9063_iic_select_page(sc, DA9063_IIC_PAGE(addr));
+ if (error != 0)
+ goto error;
+
+ error = iicdev_readfrom(dev, DA9063_IIC_PAGE_OFF(addr), val, 1,
+ IIC_WAIT);
+ if (error != 0)
+ error = iic2errno(error);
+
+error:
+ DA9063_IIC_UNLOCK(sc);
+
+ return (error);
+}
+
+static int
+da9063_iic_write(device_t dev, uint16_t addr, uint8_t val)
+{
+ struct da9063_iic_softc *sc;
+ int error;
+
+ sc = device_get_softc(dev);
+
+ DA9063_IIC_LOCK(sc);
+
+ error = da9063_iic_select_page(sc, DA9063_IIC_PAGE(addr));
+ if (error != 0)
+ goto error;
+
+ error = iicdev_writeto(dev, DA9063_IIC_PAGE_OFF(addr), &val, 1,
+ IIC_WAIT);
+ if (error != 0)
+ error = iic2errno(error);
+
+error:
+ DA9063_IIC_UNLOCK(sc);
+
+ return (error);
+}
+
+static int
+da9063_iic_modify(device_t dev, uint16_t addr, uint8_t clear_mask,
+ uint8_t set_mask)
+{
+ struct da9063_iic_softc *sc;
+ uint8_t reg;
+ int error;
+
+ sc = device_get_softc(dev);
+
+ DA9063_IIC_LOCK(sc);
+
+ error = da9063_iic_select_page(sc, DA9063_IIC_PAGE(addr));
+ if (error != 0)
+ goto error;
+
+ error = iicdev_readfrom(dev, DA9063_IIC_PAGE_OFF(addr), ®, 1,
+ IIC_WAIT);
+ if (error != 0) {
+ error = iic2errno(error);
+ goto error;
+ }
+
+ reg &= ~clear_mask;
+ reg |= set_mask;
+
+ error = iicdev_writeto(dev, DA9063_IIC_PAGE_OFF(addr), ®, 1,
+ IIC_WAIT);
+ if (error != 0)
+ error = iic2errno(error);
+
+error:
+ DA9063_IIC_UNLOCK(sc);
+
+ return (error);
+}
+
+static int
+da9063_iic_probe(device_t dev)
+{
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "Dialog DA9063 PMIC");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+da9063_iic_attach(device_t dev)
+{
+ struct da9063_iic_softc *sc;
+ uint8_t reg;
+ int error;
+
+ sc = device_get_softc(dev);
+
+ sc->dev = dev;
+
+ error = iicdev_readfrom(dev, DA9063_PAGE_CON, ®, 1, IIC_WAIT);
+ if (error != 0)
+ return (iic2errno(error));
+
+ sc->page = ((reg >> DA9063_PAGE_CON_REG_PAGE_SHIFT) &
+ DA9063_PAGE_CON_REG_PAGE_MASK) >> DA9063_IIC_PAGE_CON_REG_PAGE_SHIFT;
+ mtx_init(&sc->mtx, device_get_nameunit(sc->dev), NULL, MTX_DEF);
+
+ sc->simplebus_sc.flags |= SB_FLAG_NO_RANGES;
+
+ return (simplebus_attach(dev));
+}
+
+static int
+da9063_iic_detach(device_t dev)
+{
+ struct da9063_iic_softc *sc;
+ int error;
+
+ sc = device_get_softc(dev);
+
+ error = simplebus_detach(dev);
+ if (error != 0)
+ return (error);
+
+ mtx_destroy(&sc->mtx);
+
+ return (0);
+}
+
+static device_method_t da9063_iic_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, da9063_iic_probe),
+ DEVMETHOD(device_attach, da9063_iic_attach),
+ DEVMETHOD(device_detach, da9063_iic_detach),
+
+ /* DA9063 interface */
+ DEVMETHOD(da9063_read, da9063_iic_read),
+ DEVMETHOD(da9063_write, da9063_iic_write),
+ DEVMETHOD(da9063_modify, da9063_iic_modify),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_1(da9063_pmic, da9063_iic_driver, da9063_iic_methods,
+ sizeof(struct da9063_iic_softc), simplebus_driver);
+
+DRIVER_MODULE(da9063_iic, iicbus, da9063_iic_driver, NULL, NULL);
diff --git a/sys/dev/dialog/da9063/da9063reg.h b/sys/dev/dialog/da9063/da9063reg.h
new file mode 100644
index 000000000000..b9de664290f4
--- /dev/null
+++ b/sys/dev/dialog/da9063/da9063reg.h
@@ -0,0 +1,1209 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2022 Jessica Clarke <jrtc27@FreeBSD.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _DA9063_REG_H_
+#define _DA9063_REG_H_
+
+/*
+ * Reference: DA9063 System PMIC for Mobile and Automotive Applications
+ * datasheet (https://www.renesas.com/us/en/document/dst/da9063-datasheet),
+ * revision 2.4.
+ */
+
+/* Page 0 */
+
+#define DA9063_PAGE_CON 0x00
+#define DA9063_PAGE_CON_REG_PAGE_SHIFT 0
+#define DA9063_PAGE_CON_REG_PAGE_MASK 0x07
+#define DA9063_PAGE_CON_WRITE_MODE 0x40
+#define DA9063_PAGE_CON_REVERT 0x80
+
+/* System Control and Event Registers (SYSMON) */
+
+#define DA9063_STATUS_A 0x01
+#define DA9063_STATUS_A_NONKEY 0x01
+#define DA9063_STATUS_A_WAKE 0x02
+#define DA9063_STATUS_A_DVC_BUSY 0x04
+#define DA9063_STATUS_A_COMP1V2 0x08
+#define DA9063_STATUS_B 0x02
+#define DA9063_STATUS_B_GPI0 0x01
+#define DA9063_STATUS_B_GPI1 0x02
+#define DA9063_STATUS_B_GPI2 0x04
+#define DA9063_STATUS_B_GPI3 0x08
+#define DA9063_STATUS_B_GPI4 0x10
+#define DA9063_STATUS_B_GPI5 0x20
+#define DA9063_STATUS_B_GPI6 0x40
+#define DA9063_STATUS_B_GPI7 0x80
+#define DA9063_STATUS_C 0x03
+#define DA9063_STATUS_C_GPI8 0x01
+#define DA9063_STATUS_C_GPI9 0x02
+#define DA9063_STATUS_C_GPI10 0x04
+#define DA9063_STATUS_C_GPI11 0x08
+#define DA9063_STATUS_C_GPI12 0x10
+#define DA9063_STATUS_C_GPI13 0x20
+#define DA9063_STATUS_C_GPI14 0x40
+#define DA9063_STATUS_C_GPI15 0x80
+#define DA9063_STATUS_D 0x04
+#define DA9063_STATUS_D_LDO3_LIM 0x08
+#define DA9063_STATUS_D_LDO4_LIM 0x10
+#define DA9063_STATUS_D_LDO7_LIM 0x20
+#define DA9063_STATUS_D_LDO8_LIM 0x40
+#define DA9063_STATUS_D_LDO11_LIM 0x80
+#define DA9063_FAULT_LOG 0x05
+#define DA9063_FAULT_LOG_TWD_ERROR 0x01
+#define DA9063_FAULT_LOG_POR 0x02
+#define DA9063_FAULT_LOG_VDD_FAULT 0x04
+#define DA9063_FAULT_LOG_VDD_START 0x08
+#define DA9063_FAULT_LOG_TEMP_CRIT 0x10
+#define DA9063_FAULT_LOG_KEY_RESET 0x20
+#define DA9063_FAULT_LOG_NSHUTDOWN 0x40
+#define DA9063_FAULT_LOG_WAIT_SHUT 0x80
+#define DA9063_EVENT_A 0x06
+#define DA9063_EVENT_A_E_NONKEY 0x01
+#define DA9063_EVENT_A_E_ALARM 0x02
+#define DA9063_EVENT_A_E_TICK 0x04
+#define DA9063_EVENT_A_E_ADC_RDY 0x08
+#define DA9063_EVENT_A_E_SEQ_RDY 0x10
+#define DA9063_EVENT_A_EVENTS_B 0x20
+#define DA9063_EVENT_A_EVENTS_C 0x40
+#define DA9063_EVENT_A_EVENTS_D 0x80
+#define DA9063_EVENT_B 0x07
+#define DA9063_EVENT_B_E_WAKE 0x01
+#define DA9063_EVENT_B_E_TEMP 0x02
+#define DA9063_EVENT_B_E_COMP_1V2 0x04
+#define DA9063_EVENT_B_E_LDO_LIM 0x08
+#define DA9063_EVENT_B_E_REG_UVOV 0x10
+#define DA9063_EVENT_B_E_DVC_RDY 0x20
+#define DA9063_EVENT_B_E_VDD_MON 0x40
+#define DA9063_EVENT_B_E_VDD_WARN 0x80
+#define DA9063_EVENT_C 0x08
+#define DA9063_EVENT_C_E_GPI0 0x01
+#define DA9063_EVENT_C_E_GPI1 0x02
+#define DA9063_EVENT_C_E_GPI2 0x04
+#define DA9063_EVENT_C_E_GPI3 0x08
+#define DA9063_EVENT_C_E_GPI4 0x10
+#define DA9063_EVENT_C_E_GPI5 0x20
+#define DA9063_EVENT_C_E_GPI6 0x40
+#define DA9063_EVENT_C_E_GPI7 0x80
+#define DA9063_EVENT_D 0x09
+#define DA9063_EVENT_D_E_GPI8 0x01
+#define DA9063_EVENT_D_E_GPI9 0x02
+#define DA9063_EVENT_D_E_GPI10 0x04
+#define DA9063_EVENT_D_E_GPI11 0x08
+#define DA9063_EVENT_D_E_GPI12 0x10
+#define DA9063_EVENT_D_E_GPI13 0x20
+#define DA9063_EVENT_D_E_GPI14 0x40
+#define DA9063_EVENT_D_E_GPI15 0x80
+#define DA9063_IRQ_MASK_A 0x0a
+#define DA9063_IRQ_MASK_A_M_NONKEY 0x01
+#define DA9063_IRQ_MASK_A_M_ALARM 0x02
+#define DA9063_IRQ_MASK_A_M_TICK 0x04
+#define DA9063_IRQ_MASK_A_M_ADC_RDY 0x08
+#define DA9063_IRQ_MASK_A_M_SEQ_RDY 0x10
+#define DA9063_IRQ_MASK_B 0x0b
+#define DA9063_IRQ_MASK_B_M_WAKE 0x01
+#define DA9063_IRQ_MASK_B_M_TEMP 0x02
+#define DA9063_IRQ_MASK_B_M_COMP_1V2 0x04
+#define DA9063_IRQ_MASK_B_M_LDO_LIM 0x08
+#define DA9063_IRQ_MASK_B_M_REG_UVOV 0x10
+#define DA9063_IRQ_MASK_B_M_DVC_RDY 0x20
+#define DA9063_IRQ_MASK_B_M_VDD_MON 0x40
+#define DA9063_IRQ_MASK_B_M_VDD_WARN 0x80
+#define DA9063_IRQ_MASK_C 0x0c
+#define DA9063_IRQ_MASK_C_M_GPI0 0x01
+#define DA9063_IRQ_MASK_C_M_GPI1 0x02
+#define DA9063_IRQ_MASK_C_M_GPI2 0x04
+#define DA9063_IRQ_MASK_C_M_GPI3 0x08
+#define DA9063_IRQ_MASK_C_M_GPI4 0x10
+#define DA9063_IRQ_MASK_C_M_GPI5 0x20
+#define DA9063_IRQ_MASK_C_M_GPI6 0x40
+#define DA9063_IRQ_MASK_C_M_GPI7 0x80
+#define DA9063_IRQ_MASK_D 0x0d
+#define DA9063_IRQ_MASK_D_M_GPI8 0x01
+#define DA9063_IRQ_MASK_D_M_GPI9 0x02
+#define DA9063_IRQ_MASK_D_M_GPI10 0x04
+#define DA9063_IRQ_MASK_D_M_GPI11 0x08
+#define DA9063_IRQ_MASK_D_M_GPI12 0x10
+#define DA9063_IRQ_MASK_D_M_GPI13 0x20
+#define DA9063_IRQ_MASK_D_M_GPI14 0x40
+#define DA9063_IRQ_MASK_D_M_GPI15 0x80
+#define DA9063_CONTROL_A 0x0e
+#define DA9063_CONTROL_A_SYSTEM_EN 0x01
+#define DA9063_CONTROL_A_POWER_EN 0x02
+#define DA9063_CONTROL_A_POWER1_EN 0x04
+#define DA9063_CONTROL_A_STANDBY 0x08
+#define DA9063_CONTROL_A_M_SYSTEM_EN 0x10
+#define DA9063_CONTROL_A_M_POWER_EN 0x20
+#define DA9063_CONTROL_A_M_POWER1_EN 0x40
+#define DA9063_CONTROL_A_CP_EN 0x80
+#define DA9063_CONTROL_B 0x0f
+#define DA9063_CONTROL_B_CHG_SEL 0x01
+#define DA9063_CONTROL_B_WATCHDOG_DIS 0x02
+#define DA9063_CONTROL_B_RESET_GLINKING 0x04
+#define DA9063_CONTROL_B_NRES_MODE 0x08
+#define DA9063_CONTROL_B_NONKEY_LOCK 0x10
+#define DA9063_CONTROL_B_BUCK_SLOWSTART 0x80
+#define DA9063_CONTROL_C 0x10
+#define DA9063_CONTROL_C_DEBOUNCING_SHIFT 0
+#define DA9063_CONTROL_C_DEBOUNCING_MASK 0x07
+#define DA9063_CONTROL_C_AUTO_BOOT 0x08
+#define DA9063_CONTROL_C_OTPREAD_EN 0x10
+#define DA9063_CONTROL_C_SLEW_RATE_SHIFT 5
+#define DA9063_CONTROL_C_SLEW_RATE_MASK 0x03
+#define DA9063_CONTROL_C_DEF_SUPPLY 0x80
+#define DA9063_CONTROL_D 0x11
+#define DA9063_CONTROL_D_TWDSCALE_SHIFT 0
+#define DA9063_CONTROL_D_TWDSCALE_MASK 0x07
+#define DA9063_CONTROL_D_BLINK_FRQ_SHIFT 3
+#define DA9063_CONTROL_D_BLINK_FRQ_MASK 0x07
+#define DA9063_CONTROL_D_BLINK_DUR_SHIFT 2
+#define DA9063_CONTROL_D_BLINK_DUR_MASK 0x03
+#define DA9063_CONTROL_E 0x12
+#define DA9063_CONTROL_E_RTC_MODE_PD 0x01
+#define DA9063_CONTROL_E_RTC_MODE_SD 0x02
+#define DA9063_CONTROL_E_RTC_EN 0x04
+#define DA9063_CONTROL_E_ECO_MODE 0x08
+#define DA9063_CONTROL_E_PM_FB1_PIN 0x10
+#define DA9063_CONTROL_E_PM_FB2_PIN 0x20
+#define DA9063_CONTROL_E_PM_FB3_PIN 0x40
+#define DA9063_CONTROL_E_V_LOCK 0x80
+#define DA9063_CONTROL_F 0x13
+#define DA9063_CONTROL_F_WATCHDOG 0x01
+#define DA9063_CONTROL_F_SHUTDOWN 0x02
+#define DA9063_CONTROL_F_WAKE_UP 0x04
+#define DA9063_PD_DIS 0x14
+#define DA9063_PD_DIS_GPI_DIS 0x01
+#define DA9063_PD_DIS_GPADC_PAUSE 0x02
+#define DA9063_PD_DIS_PMIF_DIS 0x04
+#define DA9063_PD_DIS_HS2IF_DIS 0x08
+#define DA9063_PD_DIS_BBAT_DIS 0x20
+#define DA9063_PD_DIS_OUT32K_PAUSE 0x40
+#define DA9063_PD_DIS_PMCONT_DIS 0x80
+
+/* GPIO Control Registers (GPIO) */
+
+#define DA9063_GPIO0_1 0x15
+#define DA9063_GPIO0_1_GPIO0_PIN_SHIFT 0
+#define DA9063_GPIO0_1_GPIO0_PIN_MASK 0x03
+#define DA9063_GPIO0_1_GPIO0_TYPE 0x04
+#define DA9063_GPIO0_1_GPIO0_WEN 0x08
+#define DA9063_GPIO0_1_GPIO1_PIN_SHIFT 4
+#define DA9063_GPIO0_1_GPIO1_PIN_MASK 0x03
+#define DA9063_GPIO0_1_GPIO1_TYPE 0x40
+#define DA9063_GPIO0_1_GPIO1_WEN 0x80
+#define DA9063_GPIO2_3 0x16
+#define DA9063_GPIO2_3_GPIO2_PIN_SHIFT 0
+#define DA9063_GPIO2_3_GPIO2_PIN_MASK 0x03
+#define DA9063_GPIO2_3_GPIO2_TYPE 0x04
+#define DA9063_GPIO2_3_GPIO2_WEN 0x08
+#define DA9063_GPIO2_3_GPIO3_PIN_SHIFT 4
+#define DA9063_GPIO2_3_GPIO3_PIN_MASK 0x03
+#define DA9063_GPIO2_3_GPIO3_TYPE 0x40
+#define DA9063_GPIO2_3_GPIO3_WEN 0x80
+#define DA9063_GPIO4_5 0x17
+#define DA9063_GPIO4_5_GPIO4_PIN_SHIFT 0
+#define DA9063_GPIO4_5_GPIO4_PIN_MASK 0x03
+#define DA9063_GPIO4_5_GPIO4_TYPE 0x04
+#define DA9063_GPIO4_5_GPIO4_WEN 0x08
+#define DA9063_GPIO4_5_GPIO5_PIN_SHIFT 4
+#define DA9063_GPIO4_5_GPIO5_PIN_MASK 0x03
+#define DA9063_GPIO4_5_GPIO5_TYPE 0x04
+#define DA9063_GPIO4_5_GPIO5_WEN 0x08
+#define DA9063_GPIO6_7 0x18
+#define DA9063_GPIO6_7_GPIO6_PIN_SHIFT 0
+#define DA9063_GPIO6_7_GPIO6_PIN_MASK 0x03
+#define DA9063_GPIO6_7_GPIO6_TYPE 0x04
+#define DA9063_GPIO6_7_GPIO6_WEN 0x08
+#define DA9063_GPIO6_7_GPIO7_PIN_SHIFT 4
+#define DA9063_GPIO6_7_GPIO7_PIN_MASK 0x03
+#define DA9063_GPIO6_7_GPIO7_TYPE 0x04
+#define DA9063_GPIO6_7_GPIO7_WEN 0x08
+#define DA9063_GPIO8_9 0x19
+#define DA9063_GPIO8_9_GPIO8_PIN_SHIFT 0
+#define DA9063_GPIO8_9_GPIO8_PIN_MASK 0x03
+#define DA9063_GPIO8_9_GPIO8_TYPE 0x04
+#define DA9063_GPIO8_9_GPIO8_WEN 0x08
+#define DA9063_GPIO8_9_GPIO9_PIN_SHIFT 4
+#define DA9063_GPIO8_9_GPIO9_PIN_MASK 0x03
+#define DA9063_GPIO8_9_GPIO9_TYPE 0x04
+#define DA9063_GPIO8_9_GPIO9_WEN 0x08
+#define DA9063_GPIO10_11 0x1a
+#define DA9063_GPIO10_11_GPIO10_PIN_SHIFT 0
+#define DA9063_GPIO10_11_GPIO10_PIN_MASK 0x03
+#define DA9063_GPIO10_11_GPIO10_TYPE 0x04
+#define DA9063_GPIO10_11_GPIO10_WEN 0x08
+#define DA9063_GPIO10_11_GPIO11_PIN_SHIFT 4
+#define DA9063_GPIO10_11_GPIO11_PIN_MASK 0x03
+#define DA9063_GPIO10_11_GPIO11_TYPE 0x04
+#define DA9063_GPIO10_11_GPIO11_WEN 0x08
+#define DA9063_GPIO12_13 0x1b
+#define DA9063_GPIO12_13_GPIO12_PIN_SHIFT 0
+#define DA9063_GPIO12_13_GPIO12_PIN_MASK 0x03
+#define DA9063_GPIO12_13_GPIO12_TYPE 0x04
+#define DA9063_GPIO12_13_GPIO12_WEN 0x08
+#define DA9063_GPIO12_13_GPIO13_PIN_SHIFT 4
+#define DA9063_GPIO12_13_GPIO13_PIN_MASK 0x03
+#define DA9063_GPIO12_13_GPIO13_TYPE 0x04
+#define DA9063_GPIO12_13_GPIO13_WEN 0x08
+#define DA9063_GPIO14_15 0x1c
+#define DA9063_GPIO14_15_GPIO14_PIN_SHIFT 0
+#define DA9063_GPIO14_15_GPIO14_PIN_MASK 0x03
+#define DA9063_GPIO14_15_GPIO14_TYPE 0x04
+#define DA9063_GPIO14_15_GPIO14_WEN 0x08
+#define DA9063_GPIO14_15_GPIO15_PIN_SHIFT 4
+#define DA9063_GPIO14_15_GPIO15_PIN_MASK 0x03
+#define DA9063_GPIO14_15_GPIO15_TYPE 0x04
+#define DA9063_GPIO14_15_GPIO15_WEN 0x08
+#define DA9063_GPIO_MODE0_7 0x1d
+#define DA9063_GPIO_MODE0_7_GPIO0_MASK 0x01
+#define DA9063_GPIO_MODE0_7_GPIO1_MASK 0x02
+#define DA9063_GPIO_MODE0_7_GPIO2_MASK 0x04
+#define DA9063_GPIO_MODE0_7_GPIO3_MASK 0x08
+#define DA9063_GPIO_MODE0_7_GPIO4_MASK 0x10
+#define DA9063_GPIO_MODE0_7_GPIO5_MASK 0x20
+#define DA9063_GPIO_MODE0_7_GPIO6_MASK 0x40
+#define DA9063_GPIO_MODE0_7_GPIO7_MASK 0x80
+#define DA9063_GPIO_MODE8_15 0x1e
+#define DA9063_GPIO_MODE8_15_GPIO8_MASK 0x01
+#define DA9063_GPIO_MODE8_15_GPIO9_MASK 0x02
+#define DA9063_GPIO_MODE8_15_GPIO10_MASK 0x04
+#define DA9063_GPIO_MODE8_15_GPIO11_MASK 0x08
+#define DA9063_GPIO_MODE8_15_GPIO12_MASK 0x10
+#define DA9063_GPIO_MODE8_15_GPIO13_MASK 0x20
+#define DA9063_GPIO_MODE8_15_GPIO14_MASK 0x40
+#define DA9063_GPIO_MODE8_15_GPIO15_MASK 0x80
+#define DA9063_SWITCH_CONT 0x1f
+#define DA9063_SWITCH_CONT_CORE_SW_GPI_SHIFT 0
+#define DA9063_SWITCH_CONT_CORE_SW_GPI_MASK 0x03
+#define DA9063_SWITCH_CONT_PERI_SW_GPI_SHIFT 2
+#define DA9063_SWITCH_CONT_PERI_SW_GPI_MASK 0x03
+#define DA9063_SWITCH_CONT_SWITCH_SR_SHIFT 4
+#define DA9063_SWITCH_CONT_SWITCH_SR_MASK 0x03
+#define DA9063_SWITCH_CONT_CORE_SW_INT 0x40
+#define DA9063_SWITCH_CONT_CP_EN_MODE 0x80
+
+/* Regulator Control Registers (REG) */
+
+#define DA9063_BCORE2_CONT 0x20
+#define DA9063_BCORE2_CONT_BCORE2_EN 0x01
+#define DA9063_BCORE2_CONT_BCORE2_GPI_SHIFT 1
+#define DA9063_BCORE2_CONT_BCORE2_GPI_MASK 0x03
+#define DA9063_BCORE2_CONT_BCORE2_CONF 0x08
+#define DA9063_BCORE2_CONT_VBCORE2_GPI_SHIFT 5
+#define DA9063_BCORE2_CONT_VBCORE2_GPI_MASK 0x03
+#define DA9063_BCORE1_CONT 0x21
+#define DA9063_BCORE1_CONT_BCORE1_EN 0x01
+#define DA9063_BCORE1_CONT_BCORE1_GPI_SHIFT 1
+#define DA9063_BCORE1_CONT_BCORE1_GPI_MASK 0x03
+#define DA9063_BCORE1_CONT_BCORE1_CONF 0x08
+#define DA9063_BCORE1_CONT_CORE_SW_EN 0x10
+#define DA9063_BCORE1_CONT_VBCORE1_GPI_SHIFT 5
+#define DA9063_BCORE1_CONT_VBCORE1_GPI_MASK 0x03
+#define DA9063_BCORE1_CONT_CORE_SW_CONF 0x80
+#define DA9063_BPRO_CONT 0x22
+#define DA9063_BPRO_CONT_BPRO_EN 0x01
+#define DA9063_BPRO_CONT_BPRO_GPI_SHIFT 1
+#define DA9063_BPRO_CONT_BPRO_GPI_MASK 0x03
+#define DA9063_BPRO_CONT_BPRO_CONF 0x08
+#define DA9063_BPRO_CONT_VBPRO_GPI_SHIFT 5
+#define DA9063_BPRO_CONT_VBPRO_GPI_MASK 0x03
+#define DA9063_BMEM_CONT 0x23
+#define DA9063_BMEM_CONT_BMEM_EN 0x01
+#define DA9063_BMEM_CONT_BMEM_GPI_SHIFT 1
+#define DA9063_BMEM_CONT_BMEM_GPI_MASK 0x03
+#define DA9063_BMEM_CONT_BMEM_CONF 0x08
+#define DA9063_BMEM_CONT_VBMEM_GPI_SHIFT 5
+#define DA9063_BMEM_CONT_VBMEM_GPI_MASK 0x03
+#define DA9063_BIO_CONT 0x24
+#define DA9063_BIO_CONT_BIO_EN 0x01
+#define DA9063_BIO_CONT_BIO_GPI_SHIFT 1
+#define DA9063_BIO_CONT_BIO_GPI_MASK 0x03
+#define DA9063_BIO_CONT_BIO_CONF 0x08
+#define DA9063_BIO_CONT_VBIO_GPI_SHIFT 5
+#define DA9063_BIO_CONT_VBIO_GPI_MASK 0x03
+#define DA9063_BPERI_CONT 0x25
+#define DA9063_BPERI_CONT_BPERI_EN 0x01
+#define DA9063_BPERI_CONT_BPERI_GPI_SHIFT 1
+#define DA9063_BPERI_CONT_BPERI_GPI_MASK 0x03
+#define DA9063_BPERI_CONT_BPERI_CONF 0x08
+#define DA9063_BPERI_CONT_PERI_SW_EN 0x10
+#define DA9063_BPERI_CONT_VBPERI_GPI_SHIFT 5
+#define DA9063_BPERI_CONT_VBPERI_GPI_MASK 0x03
+#define DA9063_BPERI_CONT_PERI_SW_CONF 0x80
+#define DA9063_LDO1_CONT 0x26
+#define DA9063_LDO1_CONT_LDO1_EN 0x01
+#define DA9063_LDO1_CONT_LDO1_GPI_SHIFT 1
+#define DA9063_LDO1_CONT_LDO1_GPI_MASK 0x03
+#define DA9063_LDO1_CONT_LDO1_PD_DIS 0x08
+#define DA9063_LDO1_CONT_VLDO1_GPI_SHIFT 5
+#define DA9063_LDO1_CONT_VLDO1_GPI_MASK 0x03
+#define DA9063_LDO1_CONT_VLDO1_CONF 0x80
+#define DA9063_LDO2_CONT 0x27
+#define DA9063_LDO2_CONT_LDO2_EN 0x01
+#define DA9063_LDO2_CONT_LDO2_GPI_SHIFT 1
+#define DA9063_LDO2_CONT_LDO2_GPI_MASK 0x03
+#define DA9063_LDO2_CONT_LDO2_PD_DIS 0x08
+#define DA9063_LDO2_CONT_VLDO2_GPI_SHIFT 5
+#define DA9063_LDO2_CONT_VLDO2_GPI_MASK 0x03
+#define DA9063_LDO2_CONT_VLDO2_CONF 0x80
+#define DA9063_LDO3_CONT 0x28
+#define DA9063_LDO3_CONT_LDO3_EN 0x01
+#define DA9063_LDO3_CONT_LDO3_GPI_SHIFT 1
+#define DA9063_LDO3_CONT_LDO3_GPI_MASK 0x03
+#define DA9063_LDO3_CONT_LDO3_PD_DIS 0x08
+#define DA9063_LDO3_CONT_VLDO3_GPI_SHIFT 5
+#define DA9063_LDO3_CONT_VLDO3_GPI_MASK 0x03
+#define DA9063_LDO3_CONT_VLDO3_CONF 0x80
+#define DA9063_LDO4_CONT 0x29
+#define DA9063_LDO4_CONT_LDO4_EN 0x01
+#define DA9063_LDO4_CONT_LDO4_GPI_SHIFT 1
+#define DA9063_LDO4_CONT_LDO4_GPI_MASK 0x03
+#define DA9063_LDO4_CONT_LDO4_PD_DIS 0x08
+#define DA9063_LDO4_CONT_VLDO4_SEL 0x10
+#define DA9063_LDO4_CONT_VLDO4_GPI_SHIFT 5
+#define DA9063_LDO4_CONT_VLDO4_GPI_MASK 0x03
+#define DA9063_LDO4_CONT_VLDO4_CONF 0x80
+#define DA9063_LDO5_CONT 0x2a
+#define DA9063_LDO5_CONT_LDO5_EN 0x01
+#define DA9063_LDO5_CONT_LDO5_GPI_SHIFT 1
+#define DA9063_LDO5_CONT_LDO5_GPI_MASK 0x03
+#define DA9063_LDO5_CONT_LDO5_PD_DIS 0x08
+#define DA9063_LDO5_CONT_VLDO5_SEL 0x10
+#define DA9063_LDO5_CONT_VLDO5_GPI_SHIFT 5
+#define DA9063_LDO5_CONT_VLDO5_GPI_MASK 0x03
+#define DA9063_LDO5_CONT_VLDO5_CONF 0x80
+#define DA9063_LDO6_CONT 0x2b
+#define DA9063_LDO6_CONT_LDO6_EN 0x01
+#define DA9063_LDO6_CONT_LDO6_GPI_SHIFT 1
+#define DA9063_LDO6_CONT_LDO6_GPI_MASK 0x03
+#define DA9063_LDO6_CONT_LDO6_PD_DIS 0x08
+#define DA9063_LDO6_CONT_VLDO6_SEL 0x10
+#define DA9063_LDO6_CONT_VLDO6_GPI_SHIFT 5
+#define DA9063_LDO6_CONT_VLDO6_GPI_MASK 0x03
+#define DA9063_LDO6_CONT_VLDO6_CONF 0x80
+#define DA9063_LDO7_CONT 0x2c
+#define DA9063_LDO7_CONT_LDO7_EN 0x01
+#define DA9063_LDO7_CONT_LDO7_GPI_SHIFT 1
+#define DA9063_LDO7_CONT_LDO7_GPI_MASK 0x03
+#define DA9063_LDO7_CONT_LDO7_PD_DIS 0x08
+#define DA9063_LDO7_CONT_VLDO7_SEL 0x10
+#define DA9063_LDO7_CONT_VLDO7_GPI_SHIFT 5
+#define DA9063_LDO7_CONT_VLDO7_GPI_MASK 0x03
+#define DA9063_LDO7_CONT_VLDO7_CONF 0x80
+#define DA9063_LDO8_CONT 0x2d
+#define DA9063_LDO8_CONT_LDO8_EN 0x01
+#define DA9063_LDO8_CONT_LDO8_GPI_SHIFT 1
+#define DA9063_LDO8_CONT_LDO8_GPI_MASK 0x03
+#define DA9063_LDO8_CONT_LDO8_PD_DIS 0x08
+#define DA9063_LDO8_CONT_VLDO8_SEL 0x10
+#define DA9063_LDO8_CONT_VLDO8_GPI_SHIFT 5
+#define DA9063_LDO8_CONT_VLDO8_GPI_MASK 0x03
+#define DA9063_LDO8_CONT_VLDO8_CONF 0x80
+#define DA9063_LDO9_CONT 0x2e
+#define DA9063_LDO9_CONT_LDO9_EN 0x01
+#define DA9063_LDO9_CONT_LDO9_GPI_SHIFT 1
+#define DA9063_LDO9_CONT_LDO9_GPI_MASK 0x03
+#define DA9063_LDO9_CONT_LDO9_PD_DIS 0x08
+#define DA9063_LDO9_CONT_VLDO9_SEL 0x10
+#define DA9063_LDO9_CONT_VLDO9_GPI_SHIFT 5
+#define DA9063_LDO9_CONT_VLDO9_GPI_MASK 0x03
+#define DA9063_LDO9_CONT_VLDO9_CONF 0x80
+#define DA9063_LDO10_CONT 0x2f
+#define DA9063_LDO10_CONT_LDO10_EN 0x01
+#define DA9063_LDO10_CONT_LDO10_GPI_SHIFT 1
+#define DA9063_LDO10_CONT_LDO10_GPI_MASK 0x03
+#define DA9063_LDO10_CONT_LDO10_PD_DIS 0x08
+#define DA9063_LDO10_CONT_VLDO10_SEL 0x10
+#define DA9063_LDO10_CONT_VLDO10_GPI_SHIFT 5
+#define DA9063_LDO10_CONT_VLDO10_GPI_MASK 0x03
+#define DA9063_LDO10_CONT_VLDO10_CONF 0x80
+#define DA9063_LDO11_CONT 0x30
+#define DA9063_LDO11_CONT_LDO11_EN 0x01
+#define DA9063_LDO11_CONT_LDO11_GPI_SHIFT 1
+#define DA9063_LDO11_CONT_LDO11_GPI_MASK 0x03
+#define DA9063_LDO11_CONT_LDO11_PD_DIS 0x08
+#define DA9063_LDO11_CONT_VLDO11_SEL 0x10
+#define DA9063_LDO11_CONT_VLDO11_GPI_SHIFT 5
+#define DA9063_LDO11_CONT_VLDO11_GPI_MASK 0x03
+#define DA9063_LDO11_CONT_VLDO11_CONF 0x80
+#define DA9063_VIB 0x31
+#define DA9063_VIB_VIB_SET_SHIFT 0
+#define DA9063_VIB_VIB_SET_MASK 0x3f
+#define DA9063_DVC_1 0x32
+#define DA9063_DVC_1_VBCORE1_SEL 0x01
+#define DA9063_DVC_1_VBCORE2_SEL 0x02
+#define DA9063_DVC_1_VBPRO_SEL 0x04
+#define DA9063_DVC_1_VBMEM_SEL 0x08
+#define DA9063_DVC_1_VBPERI_SEL 0x10
+#define DA9063_DVC_1_VLDO1_SEL 0x20
+#define DA9063_DVC_1_VLDO2_SEL 0x40
+#define DA9063_DVC_1_VLDO3_SEL 0x80
+#define DA9063_DVC_2 0x33
+#define DA9063_DVC_2_VBIO_SEL 0x01
+#define DA9063_DVC_2_VLDO4_SEL 0x80
+
+/* GP-ADC Control Registers (GPADC) */
+
+#define DA9063_ADC_MAN 0x34
+#define DA9063_ADC_MAN_ADC_MUX_SHIFT 0
+#define DA9063_ADC_MAN_ADC_MUX_MASK 0x0f
+#define DA9063_ADC_MAN_ADC_MAN 0x10
+#define DA9063_ADC_MAN_ADC_MODE 0x20
+#define DA9063_ADC_CONT 0x35
+#define DA9063_ADC_CONT_AUTO_VSYS_EN 0x01
+#define DA9063_ADC_CONT_AUTO_AD1_EN 0x02
+#define DA9063_ADC_CONT_AUTO_AD2_EN 0x04
+#define DA9063_ADC_CONT_AUTO_AD3_EN 0x08
+#define DA9063_ADC_CONT_AD1_ISRC_EN 0x10
+#define DA9063_ADC_CONT_AD2_ISRC_EN 0x20
+#define DA9063_ADC_CONT_AD3_ISRC_EN 0x40
+#define DA9063_ADC_CONT_COMP1V2_EN 0x80
+#define DA9063_VSYS_MON 0x36
+#define DA9063_VSYS_MON_VSYS_MON_SHIFT 0
+#define DA9063_VSYS_MON_VSYS_MON_MASK 0xff
+#define DA9063_ADC_RES_L 0x37
+#define DA9063_ADC_RES_L_ADC_RES_LSB_SHIFT 6
+#define DA9063_ADC_RES_L_ACD_RES_LSB_MASK 0x03
+#define DA9063_ADC_RES_H 0x38
+#define DA9063_ADC_RES_H_ADC_RES_H_SHIFT 0
+#define DA9063_ADC_RES_H_ADC_RES_H_MASK 0xff
+#define DA9063_VSYS_RES 0x39
+#define DA9063_VSYS_RES_VSYS_RES_SHIFT 0
+#define DA9063_VSYS_RES_VSYS_RES_MASK 0xff
+#define DA9063_ADCIN1_RES 0x3a
+#define DA9063_ADCIN1_RES_ADCIN1_RES_SHIFT 0
+#define DA9063_ADCIN1_RES_ADCIN1_RES_MASK 0xff
+#define DA9063_ADCIN2_RES 0x3b
+#define DA9063_ADCIN2_RES_ADCIN2_RES_SHIFT 0
+#define DA9063_ADCIN2_RES_ADCIN2_RES_MASK 0xff
+#define DA9063_ADCIN3_RES 0x3c
+#define DA9063_ADCIN3_RES_ADCIN3_RES_SHIFT 0
+#define DA9063_ADCIN3_RES_ADCIN3_RES_MASK 0xff
+#define DA9063_MON_A8_RES 0x3d
+#define DA9063_MON_A8_RES_MON_A8_RES_SHIFT 0
+#define DA9063_MON_A8_RES_MON_A8_RES_MASK 0xff
+#define DA9063_MON_A9_RES 0x3e
+#define DA9063_MON_A9_RES_MON_A9_RES_SHIFT 0
+#define DA9063_MON_A9_RES_MON_A9_RES_MASK 0xff
+#define DA9063_MON_A10_RES 0x3f
+#define DA9063_MON_A10_RES_MON_A10_RES_SHIFT 0
+#define DA9063_MON_A10_RES_MON_A10_RES_MASK 0xff
+
+/* RTC Calendar and Alarm Registers (RTC) */
+
+#define DA9063_COUNT_S 0x40
+#define DA9063_COUNT_S_COUNT_SEC_SHIFT 0
+#define DA9063_COUNT_S_COUNT_SEC_MASK 0x3f
+#define DA9063_COUNT_S_RTC_READ 0x80
+#define DA9063_COUNT_MI 0x41
+#define DA9063_COUNT_MI_COUNT_MIN_SHIFT 0
+#define DA9063_COUNT_MI_COUNT_MIN_MASK 0x3f
+#define DA9063_COUNT_H 0x42
+#define DA9063_COUNT_H_COUNT_HOUR_SHIFT 0
+#define DA9063_COUNT_H_COUNT_HOUR_MASK 0x1f
+#define DA9063_COUNT_D 0x43
+#define DA9063_COUNT_D_COUNT_DAY_SHIFT 0
+#define DA9063_COUNT_D_COUNT_DAY_MASK 0x1f
+#define DA9063_COUNT_MO 0x44
+#define DA9063_COUNT_MO_COUNT_MONTH_SHIFT 0
+#define DA9063_COUNT_MO_COUNT_MONTH_MASK 0x0f
+#define DA9063_COUNT_Y 0x45
+#define DA9063_COUNT_Y_COUNT_YEAR_SHIFT 0
+#define DA9063_COUNT_Y_COUNT_YEAR_MASK 0x3f
+#define DA9063_COUNT_Y_MONITOR 0x40
+#define DA9063_ALARM_S 0x46
+#define DA9063_ALARM_S_ALARM_SEC_SHIFT 0
+#define DA9063_ALARM_S_ALARM_SEC_MASK 0x3f
+#define DA9063_ALARM_S_ALARM_TYPE_SHIFT 6
+#define DA9063_ALARM_S_ALARM_TYPE_MASK 0x03
+#define DA9063_ALARM_MI 0x47
+#define DA9063_ALARM_MI_ALARM_MIN_SHIFT 0
+#define DA9063_ALARM_MI_ALARM_MIN_MASK 0x3f
+#define DA9063_ALARM_H 0x48
+#define DA9063_ALARM_H_ALARM_HOUR_SHIFT 0
+#define DA9063_ALARM_H_ALARM_HOUR_MASK 0x1f
+#define DA9063_ALARM_D 0x49
+#define DA9063_ALARM_D_ALARM_DAY_SHIFT 0
+#define DA9063_ALARM_D_ALARM_DAY_MASK 0x1f
+#define DA9063_ALARM_MO 0x4a
+#define DA9063_ALARM_MO_ALARM_MONTH_SHIFT 0
+#define DA9063_ALARM_MO_ALARM_MONTH_MASK 0x0f
+#define DA9063_ALARM_MO_TICK_TYPE 0x10
+#define DA9063_ALARM_MO_TICK_WAKE 0x20
+#define DA9063_ALARM_Y 0x4b
+#define DA9063_ALARM_Y_ALARM_YEAR_SHIFT 0
+#define DA9063_ALARM_Y_ALARM_YEAR_MASK 0x3f
+#define DA9063_ALARM_Y_ALARM_ON 0x40
+#define DA9063_ALARM_Y_TICK_ON 0x80
+
+/* System Control and Event Registers (SYSMON) */
+
+#define DA9063_SECOND_A 0x4c
+#define DA9063_SECOND_A_SECONDS_A_SHIFT 0
+#define DA9063_SECOND_A_SECONDS_A_MASK 0xff
+#define DA9063_SECOND_B 0x4d
+#define DA9063_SECOND_B_SECONDS_B_SHIFT 0
+#define DA9063_SECOND_B_SECONDS_B_MASK 0xff
+#define DA9063_SECOND_C 0x4e
+#define DA9063_SECOND_C_SECONDS_C_SHIFT 0
+#define DA9063_SECOND_C_SECONDS_C_MASK 0xff
+#define DA9063_SECOND_D 0x4f
+#define DA9063_SECOND_D_SECONDS_D_SHIFT 0
+#define DA9063_SECOND_D_SECONDS_D_MASK 0xff
+
+/* Page 1 */
+
+/* 0x80 is PAGE_CON */
+
+/* Sequencer Control Registers (SEQ) */
+
+#define DA9063_SEQ 0x81
+#define DA9063_SEQ_SEQ_POINTER_SHIFT 0
+#define DA9063_SEQ_SEQ_POINTER_MASK 0x0f
+#define DA9063_SEQ_NXT_SEQ_START_SHIFT 4
+#define DA9063_SEQ_NXT_SEQ_START_MASK 0x0f
+#define DA9063_SEQ_TIMER 0x82
+#define DA9063_SEQ_TIMER_SEQ_TIME_SHIFT 0
+#define DA9063_SEQ_TIMER_SEQ_TIME_MASK 0x0f
+#define DA9063_SEQ_TIMER_SEQ_DUMM_SHIFT 4
+#define DA9063_SEQ_TIMER_SEQ_DUMM_MASK 0x0f
+#define DA9063_ID_2_1 0x83
+#define DA9063_ID_2_1_LDO1_STEP_SHIFT 0
+#define DA9063_ID_2_1_LDO1_STEP_MASK 0x0f
+#define DA9063_ID_2_1_LDO2_STEP_SHIFT 4
+#define DA9063_ID_2_1_LDO2_STEP_MASK 0x0f
+#define DA9063_ID_4_3 0x84
+#define DA9063_ID_4_3_LDO3_STEP_SHIFT 0
+#define DA9063_ID_4_3_LDO3_STEP_MASK 0x0f
+#define DA9063_ID_4_3_LDO4_STEP_SHIFT 4
+#define DA9063_ID_4_3_LDO4_STEP_MASK 0x0f
+#define DA9063_ID_6_5 0x85
+#define DA9063_ID_6_5_LDO5_STEP_SHIFT 0
+#define DA9063_ID_6_5_LDO5_STEP_MASK 0x0f
+#define DA9063_ID_6_5_LDO6_STEP_SHIFT 4
+#define DA9063_ID_6_5_LDO6_STEP_MASK 0x0f
+#define DA9063_ID_8_7 0x86
+#define DA9063_ID_8_7_LDO7_STEP_SHIFT 0
+#define DA9063_ID_8_7_LDO7_STEP_MASK 0x0f
+#define DA9063_ID_8_7_LDO8_STEP_SHIFT 4
*** 597 LINES SKIPPED ***