git: 7ddba690f8ae - main - Remove an unneeded cpu_dcache_wb_range from arm64

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=7ddba690f8aea5cc0bd496cd7c8fabaf6ee9f4ef

commit 7ddba690f8aea5cc0bd496cd7c8fabaf6ee9f4ef
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2022-10-18 16:37:43 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2022-10-27 16:05:46 +0000

    Remove an unneeded cpu_dcache_wb_range from arm64
    
    The cpu_dcache_wb_range function is an expensive function that is
    unneeded in ddb. It is used when the cache needs to be written to RAM,
    e.g. when working with a non-cache coherent device.
    
    Remove it as cpu_icache_sync_range already has the needed d-cache
    handling to ensure any changed memory is visible to the i-cache.
    
    Reviewed by:    imp
    Sponsored by:   The FreeBSD Foundation
    Differential Revision: https://reviews.freebsd.org/D37037
---
 sys/arm64/arm64/db_interface.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/sys/arm64/arm64/db_interface.c b/sys/arm64/arm64/db_interface.c
index dc0fa8ac5e1e..59f8132645ef 100644
--- a/sys/arm64/arm64/db_interface.c
+++ b/sys/arm64/arm64/db_interface.c
@@ -167,8 +167,10 @@ db_write_bytes(vm_offset_t addr, size_t size, char *data)
 				*dst++ = *data++;
 			dsb(ish);
 
-			/* Clean D-cache and invalidate I-cache */
-			cpu_dcache_wb_range(addr, (vm_size_t)size);
+			/*
+			 * Ensure the I & D cache are in sync if we wrote
+			 * to executable memory.
+			 */
 			cpu_icache_sync_range(addr, (vm_size_t)size);
 		}
 	}