git: 97315f68fe87 - main - if_bnxt: update hsi_struct_def.h headers
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Date: Fri, 04 Nov 2022 22:55:43 UTC
The branch main has been updated by imp:
URL: https://cgit.FreeBSD.org/src/commit/?id=97315f68fe87ae391d2dd2f8c636beac9754ab73
commit 97315f68fe87ae391d2dd2f8c636beac9754ab73
Author: Sumit Saxena <sumit.saxena@broadcom.com>
AuthorDate: 2022-11-04 21:56:50 +0000
Commit: Warner Losh <imp@FreeBSD.org>
CommitDate: 2022-11-04 21:58:43 +0000
if_bnxt: update hsi_struct_def.h headers
Updates the drivers to Broadcom's latest:
HWRM Version 1.10.2.34 using HSI definition version 1.8.4
Reviewed by: imp
Differential Revision: https://reviews.freebsd.org/D36436
---
sys/dev/bnxt/bnxt_hwrm.c | 34 +-
sys/dev/bnxt/bnxt_sysctl.c | 14 +-
sys/dev/bnxt/bnxt_txrx.c | 4 +-
sys/dev/bnxt/hsi_struct_def.h | 84290 ++++++++++++++++++++++++++++------------
4 files changed, 59077 insertions(+), 25265 deletions(-)
diff --git a/sys/dev/bnxt/bnxt_hwrm.c b/sys/dev/bnxt/bnxt_hwrm.c
index 0009ffa25053..d474e5b81e19 100644
--- a/sys/dev/bnxt/bnxt_hwrm.c
+++ b/sys/dev/bnxt/bnxt_hwrm.c
@@ -286,31 +286,31 @@ bnxt_hwrm_ver_get(struct bnxt_softc *softc)
goto fail;
snprintf(softc->ver_info->hwrm_if_ver, BNXT_VERSTR_SIZE, "%d.%d.%d",
- resp->hwrm_intf_maj, resp->hwrm_intf_min, resp->hwrm_intf_upd);
- softc->ver_info->hwrm_if_major = resp->hwrm_intf_maj;
- softc->ver_info->hwrm_if_minor = resp->hwrm_intf_min;
- softc->ver_info->hwrm_if_update = resp->hwrm_intf_upd;
+ resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, resp->hwrm_intf_upd_8b);
+ softc->ver_info->hwrm_if_major = resp->hwrm_intf_maj_8b;
+ softc->ver_info->hwrm_if_minor = resp->hwrm_intf_min_8b;
+ softc->ver_info->hwrm_if_update = resp->hwrm_intf_upd_8b;
snprintf(softc->ver_info->hwrm_fw_ver, BNXT_VERSTR_SIZE, "%d.%d.%d",
- resp->hwrm_fw_maj, resp->hwrm_fw_min, resp->hwrm_fw_bld);
+ resp->hwrm_fw_major, resp->hwrm_fw_minor, resp->hwrm_fw_build);
strlcpy(softc->ver_info->driver_hwrm_if_ver, HWRM_VERSION_STR,
BNXT_VERSTR_SIZE);
strlcpy(softc->ver_info->hwrm_fw_name, resp->hwrm_fw_name,
BNXT_NAME_SIZE);
- if (resp->mgmt_fw_maj == 0 && resp->mgmt_fw_min == 0 &&
- resp->mgmt_fw_bld == 0) {
+ if (resp->mgmt_fw_major == 0 && resp->mgmt_fw_minor == 0 &&
+ resp->mgmt_fw_build == 0) {
strlcpy(softc->ver_info->mgmt_fw_ver, naver, BNXT_VERSTR_SIZE);
strlcpy(softc->ver_info->mgmt_fw_name, nastr, BNXT_NAME_SIZE);
}
else {
snprintf(softc->ver_info->mgmt_fw_ver, BNXT_VERSTR_SIZE,
- "%d.%d.%d", resp->mgmt_fw_maj, resp->mgmt_fw_min,
- resp->mgmt_fw_bld);
+ "%d.%d.%d", resp->mgmt_fw_major, resp->mgmt_fw_minor,
+ resp->mgmt_fw_build);
strlcpy(softc->ver_info->mgmt_fw_name, resp->mgmt_fw_name,
BNXT_NAME_SIZE);
}
- if (resp->netctrl_fw_maj == 0 && resp->netctrl_fw_min == 0 &&
- resp->netctrl_fw_bld == 0) {
+ if (resp->netctrl_fw_major == 0 && resp->netctrl_fw_minor == 0 &&
+ resp->netctrl_fw_build == 0) {
strlcpy(softc->ver_info->netctrl_fw_ver, naver,
BNXT_VERSTR_SIZE);
strlcpy(softc->ver_info->netctrl_fw_name, nastr,
@@ -318,20 +318,20 @@ bnxt_hwrm_ver_get(struct bnxt_softc *softc)
}
else {
snprintf(softc->ver_info->netctrl_fw_ver, BNXT_VERSTR_SIZE,
- "%d.%d.%d", resp->netctrl_fw_maj, resp->netctrl_fw_min,
- resp->netctrl_fw_bld);
+ "%d.%d.%d", resp->netctrl_fw_major, resp->netctrl_fw_minor,
+ resp->netctrl_fw_build);
strlcpy(softc->ver_info->netctrl_fw_name, resp->netctrl_fw_name,
BNXT_NAME_SIZE);
}
- if (resp->roce_fw_maj == 0 && resp->roce_fw_min == 0 &&
- resp->roce_fw_bld == 0) {
+ if (resp->roce_fw_major == 0 && resp->roce_fw_minor == 0 &&
+ resp->roce_fw_build == 0) {
strlcpy(softc->ver_info->roce_fw_ver, naver, BNXT_VERSTR_SIZE);
strlcpy(softc->ver_info->roce_fw_name, nastr, BNXT_NAME_SIZE);
}
else {
snprintf(softc->ver_info->roce_fw_ver, BNXT_VERSTR_SIZE,
- "%d.%d.%d", resp->roce_fw_maj, resp->roce_fw_min,
- resp->roce_fw_bld);
+ "%d.%d.%d", resp->roce_fw_major, resp->roce_fw_minor,
+ resp->roce_fw_build);
strlcpy(softc->ver_info->roce_fw_name, resp->roce_fw_name,
BNXT_NAME_SIZE);
}
diff --git a/sys/dev/bnxt/bnxt_sysctl.c b/sys/dev/bnxt/bnxt_sysctl.c
index ef624d487953..c2518d7e2675 100644
--- a/sys/dev/bnxt/bnxt_sysctl.c
+++ b/sys/dev/bnxt/bnxt_sysctl.c
@@ -186,8 +186,8 @@ bnxt_create_tx_sysctls(struct bnxt_softc *softc, int txr)
"discard_pkts", CTLFLAG_RD,
&tx_stats[txr].tx_discard_pkts, "discarded transmit packets");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
- "drop_pkts", CTLFLAG_RD, &tx_stats[txr].tx_drop_pkts,
- "dropped transmit packets");
+ "error_pkts", CTLFLAG_RD, &tx_stats[txr].tx_error_pkts,
+ "Error transmit packets");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"ucast_bytes", CTLFLAG_RD, &tx_stats[txr].tx_ucast_bytes,
"unicast bytes sent");
@@ -237,7 +237,7 @@ bnxt_create_port_stats_sysctls(struct bnxt_softc *softc)
"Transmitted 512b 1023b frames");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"tx_1024b_1518_frames", CTLFLAG_RD,
- &softc->tx_port_stats->tx_1024b_1518_frames,
+ &softc->tx_port_stats->tx_1024b_1518b_frames,
"Transmitted 1024b 1518 frames");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"tx_good_vlan_frames", CTLFLAG_RD,
@@ -245,7 +245,7 @@ bnxt_create_port_stats_sysctls(struct bnxt_softc *softc)
"Transmitted good vlan frames");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"tx_1519b_2047_frames", CTLFLAG_RD,
- &softc->tx_port_stats->tx_1519b_2047_frames,
+ &softc->tx_port_stats->tx_1519b_2047b_frames,
"Transmitted 1519b 2047 frames");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"tx_2048b_4095b_frames", CTLFLAG_RD,
@@ -421,7 +421,7 @@ bnxt_create_port_stats_sysctls(struct bnxt_softc *softc)
"Received 512b 1023b frames");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"rx_1024b_1518_frames", CTLFLAG_RD,
- &softc->rx_port_stats->rx_1024b_1518_frames,
+ &softc->rx_port_stats->rx_1024b_1518b_frames,
"Received 1024b 1518 frames");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"rx_good_vlan_frames", CTLFLAG_RD,
@@ -679,8 +679,8 @@ bnxt_create_rx_sysctls(struct bnxt_softc *softc, int rxr)
"discard_pkts", CTLFLAG_RD,
&rx_stats[rxr].rx_discard_pkts, "discarded receive packets");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
- "drop_pkts", CTLFLAG_RD, &rx_stats[rxr].rx_drop_pkts,
- "dropped receive packets");
+ "error_pkts", CTLFLAG_RD, &rx_stats->rx_error_pkts,
+ "Error receive packets");
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"ucast_bytes", CTLFLAG_RD, &rx_stats[rxr].rx_ucast_bytes,
"unicast bytes received");
diff --git a/sys/dev/bnxt/bnxt_txrx.c b/sys/dev/bnxt/bnxt_txrx.c
index a9bc6a4df740..9727230b578f 100644
--- a/sys/dev/bnxt/bnxt_txrx.c
+++ b/sys/dev/bnxt/bnxt_txrx.c
@@ -128,8 +128,8 @@ bnxt_isc_txd_encap(void *sc, if_pkt_info_t pi)
pi->ipi_new_pidx = RING_NEXT(txr, pi->ipi_new_pidx);
tbdh = &((struct tx_bd_long_hi *)txr->vaddr)[pi->ipi_new_pidx];
- tbdh->mss = htole16(pi->ipi_tso_segsz);
- tbdh->hdr_size = htole16((pi->ipi_ehdrlen + pi->ipi_ip_hlen +
+ tbdh->kid_or_ts_high_mss = htole16(pi->ipi_tso_segsz);
+ tbdh->kid_or_ts_low_hdr_size = htole16((pi->ipi_ehdrlen + pi->ipi_ip_hlen +
pi->ipi_tcp_hlen) >> 1);
tbdh->cfa_action = 0;
lflags = 0;
diff --git a/sys/dev/bnxt/hsi_struct_def.h b/sys/dev/bnxt/hsi_struct_def.h
index 7416545480d0..db3baa8d75c7 100644
--- a/sys/dev/bnxt/hsi_struct_def.h
+++ b/sys/dev/bnxt/hsi_struct_def.h
@@ -30,25150 +30,52849 @@
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
-/****************************************************************************
- *
- * Description: Definition of HSI data structures
- *
- * Date: 08/31/17 17:55:46
+/*
+ * Copyright(c) 2001-2021, Broadcom. All rights reserved. The
+ * term Broadcom refers to Broadcom Inc. and/or its subsidiaries.
+ * Proprietary and Confidential Information.
*
- * Note: This file is scripted generated by hsi_decode.py.
- * DO NOT modify this file manually !!!!
+ * This source file is the property of Broadcom Corporation, and
+ * may not be copied or distributed in any isomorphic form without
+ * the prior written consent of Broadcom Corporation.
*
- ****************************************************************************/
+ * DO NOT MODIFY!!! This file is automatically generated.
+ */
+
#ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
#define _HSI_STRUCT_DEF_EXTERNAL_H_
-/* HSI and HWRM Specification 1.8.1 */
-#define HWRM_VERSION_MAJOR 1
-#define HWRM_VERSION_MINOR 8
-#define HWRM_VERSION_UPDATE 1
-
-#define HWRM_VERSION_RSVD 7
-#define HWRM_VERSION_STR "1.8.1.7"
-/*
- * Following is the signature for HWRM message field that indicates not
- * applicable (All F's). Need to cast it the size of the field if needed.
- */
-#define HWRM_NA_SIGNATURE ((uint32_t)(-1))
-#define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
-#define HWRM_MAX_RESP_LEN (272) /* hwrm_selftest_qlist */
-#define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
-#define HW_HASH_KEY_SIZE 40
-#define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
-#define ROCE_SP_HSI_VERSION_MAJOR 1
-#define ROCE_SP_HSI_VERSION_MINOR 8
-#define ROCE_SP_HSI_VERSION_UPDATE 1
-
-#define ROCE_SP_HSI_VERSION_STR "1.8.1"
-/*
- * Following is the signature for ROCE_SP_HSI message field that indicates not
- * applicable (All F's). Need to cast it the size of the field if needed.
- */
-#define ROCE_SP_HSI_NA_SIGNATURE ((uint32_t)(-1))
-/*
- * Note: The Host Software Interface (HSI) and Hardware Resource Manager (HWRM)
- * specification describes the data structures used in Ethernet packet or RDMA
- * message data transfers as well as an abstract interface for managing Ethernet
- * NIC hardware resources.
- */
-/* Ethernet Data path Host Structures */
-/*
- * Description: The following three sections document the host structures used
- * between device and software drivers for communicating Ethernet packets.
- */
-/* BD Ring Structures */
-/*
- * Description: This structure is used to inform the NIC of a location for and
- * an aggregation buffer that will be used for packet data that is received. An
- * aggregation buffer creates a different kind of completion operation for a
- * packet where a variable number of BDs may be used to place the packet in the
- * host. RX Rings that have aggregation buffers are known as aggregation rings
- * and must contain only aggregation buffers.
- */
-/*
- * Note: BD Ring structures are written by the driver to TX Rings and RX Rings
- * to indicate to the chip there is more buffer space in the host that needs to
- * be transmitted or is available for receive data.
- */
-/* BD Base (8 bytes) */
+/* This is the HWRM command header. */
+/* hwrm_cmd_hdr (size:128b/16B) */
-struct bd_base {
- uint8_t type;
- /* This value identifies the type of buffer descriptor. */
- #define BD_BASE_TYPE_MASK UINT32_C(0x3f)
- #define BD_BASE_TYPE_SFT 0
+typedef struct hwrm_cmd_hdr {
+ /* The HWRM command request type. */
+ uint16_t req_type;
/*
- * Indicates that this BD is 16B long and is used for normal L2
- * packet transmission.
+ * The completion ring to send the completion event on. This should
+ * be the NQ ID returned from the `nq_alloc` HWRM command.
*/
- #define BD_BASE_TYPE_TX_BD_SHORT UINT32_C(0x0)
+ uint16_t cmpl_ring;
/*
- * Indicates that this BD is 1BB long and is an empty TX BD. Not
- * valid for use by the driver.
+ * The sequence ID is used by the driver for tracking multiple
+ * commands. This ID is treated as opaque data by the firmware and
+ * the value is returned in the `hwrm_resp_hdr` upon completion.
*/
- #define BD_BASE_TYPE_TX_BD_EMPTY UINT32_C(0x1)
+ uint16_t seq_id;
/*
- * Indicates that this BD is 16B long and is an RX Producer (ie.
- * empty) buffer descriptor.
+ * The target ID of the command:
+ * * 0x0-0xFFF8 - The function ID
+ * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+ * * 0xFFFD - Reserved for user-space HWRM interface
+ * * 0xFFFF - HWRM
*/
- #define BD_BASE_TYPE_RX_PROD_PKT UINT32_C(0x4)
+ uint16_t target_id;
/*
- * Indicates that this BD is 16B long and is an RX Producer
- * Buffer BD.
+ * A physical address pointer pointing to a host buffer that the
+ * command's response data will be written. This can be either a host
+ * physical address (HPA) or a guest physical address (GPA) and must
+ * point to a physically contiguous block of memory.
*/
- #define BD_BASE_TYPE_RX_PROD_BFR UINT32_C(0x5)
+ uint64_t resp_addr;
+} hwrm_cmd_hdr_t, *phwrm_cmd_hdr_t;
+
+/* This is the HWRM response header. */
+/* hwrm_resp_hdr (size:64b/8B) */
+
+typedef struct hwrm_resp_hdr {
+ /* The specific error status for the command. */
+ uint16_t error_code;
+ /* The HWRM command request type. */
+ uint16_t req_type;
+ /* The sequence ID from the original command. */
+ uint16_t seq_id;
+ /* The length of the response data in number of bytes. */
+ uint16_t resp_len;
+} hwrm_resp_hdr_t, *phwrm_resp_hdr_t;
+
+/*
+ * TLV encapsulated message. Use the TLV type field of the
+ * TLV to determine the type of message encapsulated.
+ */
+#define CMD_DISCR_TLV_ENCAP UINT32_C(0x8000)
+#define CMD_DISCR_LAST CMD_DISCR_TLV_ENCAP
+
+
+/* HWRM request message */
+#define TLV_TYPE_HWRM_REQUEST UINT32_C(0x1)
+/* HWRM response message */
+#define TLV_TYPE_HWRM_RESPONSE UINT32_C(0x2)
+/* RoCE slow path command */
+#define TLV_TYPE_ROCE_SP_COMMAND UINT32_C(0x3)
+/* RoCE slow path command to query CC Gen1 support. */
+#define TLV_TYPE_QUERY_ROCE_CC_GEN1 UINT32_C(0x4)
+/* RoCE slow path command to modify CC Gen1 support. */
+#define TLV_TYPE_MODIFY_ROCE_CC_GEN1 UINT32_C(0x5)
+/* Engine CKV - The Alias key EC curve and ECC public key information. */
+#define TLV_TYPE_ENGINE_CKV_ALIAS_ECC_PUBLIC_KEY UINT32_C(0x8001)
+/* Engine CKV - Initialization vector. */
+#define TLV_TYPE_ENGINE_CKV_IV UINT32_C(0x8003)
+/* Engine CKV - Authentication tag. */
+#define TLV_TYPE_ENGINE_CKV_AUTH_TAG UINT32_C(0x8004)
+/* Engine CKV - The encrypted data. */
+#define TLV_TYPE_ENGINE_CKV_CIPHERTEXT UINT32_C(0x8005)
+/* Engine CKV - Supported host_algorithms. */
+#define TLV_TYPE_ENGINE_CKV_HOST_ALGORITHMS UINT32_C(0x8006)
+/* Engine CKV - The Host EC curve name and ECC public key information. */
+#define TLV_TYPE_ENGINE_CKV_HOST_ECC_PUBLIC_KEY UINT32_C(0x8007)
+/* Engine CKV - The ECDSA signature. */
+#define TLV_TYPE_ENGINE_CKV_ECDSA_SIGNATURE UINT32_C(0x8008)
+/* Engine CKV - The firmware EC curve name and ECC public key information. */
+#define TLV_TYPE_ENGINE_CKV_FW_ECC_PUBLIC_KEY UINT32_C(0x8009)
+/* Engine CKV - Supported firmware algorithms. */
+#define TLV_TYPE_ENGINE_CKV_FW_ALGORITHMS UINT32_C(0x800a)
+#define TLV_TYPE_LAST TLV_TYPE_ENGINE_CKV_FW_ALGORITHMS
+
+
+/* tlv (size:64b/8B) */
+
+typedef struct tlv {
+ /*
+ * The command discriminator is used to differentiate between various
+ * types of HWRM messages. This includes legacy HWRM and RoCE slowpath
+ * command messages as well as newer TLV encapsulated HWRM commands.
+ *
+ * For TLV encapsulated messages this field must be 0x8000.
+ */
+ uint16_t cmd_discr;
+ uint8_t reserved_8b;
+ uint8_t flags;
+ /*
+ * Indicates the presence of additional TLV encapsulated data
+ * follows this TLV.
+ */
+ #define TLV_FLAGS_MORE UINT32_C(0x1)
+ /* Last TLV in a sequence of TLVs. */
+ #define TLV_FLAGS_MORE_LAST UINT32_C(0x0)
+ /* More TLVs follow this TLV. */
+ #define TLV_FLAGS_MORE_NOT_LAST UINT32_C(0x1)
+ /*
+ * When an HWRM receiver detects a TLV type that it does not
+ * support with the TLV required flag set, the receiver must
+ * reject the HWRM message with an error code indicating an
+ * unsupported TLV type.
+ */
+ #define TLV_FLAGS_REQUIRED UINT32_C(0x2)
+ /* No */
+ #define TLV_FLAGS_REQUIRED_NO (UINT32_C(0x0) << 1)
+ /* Yes */
+ #define TLV_FLAGS_REQUIRED_YES (UINT32_C(0x1) << 1)
+ #define TLV_FLAGS_REQUIRED_LAST TLV_FLAGS_REQUIRED_YES
+ /*
+ * This field defines the TLV type value which is divided into
+ * two ranges to differentiate between global and local TLV types.
+ * Global TLV types must be unique across all defined TLV types.
+ * Local TLV types are valid only for extensions to a given
+ * HWRM message and may be repeated across different HWRM message
+ * types. There is a direct correlation of each HWRM message type
+ * to a single global TLV type value.
+ *
+ * Global TLV range: `0 - (63k-1)`
+ *
+ * Local TLV range: `63k - (64k-1)`
+ */
+ uint16_t tlv_type;
+ /*
+ * Length of the message data encapsulated by this TLV in bytes.
+ * This length does not include the size of the TLV header itself
+ * and it must be an integer multiple of 8B.
+ */
+ uint16_t length;
+} tlv_t, *ptlv_t;
+
+/* Input */
+/* input (size:128b/16B) */
+
+typedef struct input {
+ /*
+ * This value indicates what type of request this is. The format
+ * for the rest of the command is determined by this field.
+ */
+ uint16_t req_type;
+ /*
+ * This value indicates the what completion ring the request will
+ * be optionally completed on. If the value is -1, then no
+ * CR completion will be generated. Any other value must be a
+ * valid CR ring_id value for this function.
+ */
+ uint16_t cmpl_ring;
+ /* This value indicates the command sequence number. */
+ uint16_t seq_id;
/*
- * Indicates that this BD is 16B long and is an RX Producer
- * Assembly Buffer Descriptor.
+ * Target ID of this command.
+ *
+ * 0x0 - 0xFFF8 - Used for function ids
+ * 0xFFF8 - 0xFFFE - Reserved for internal processors
+ * 0xFFFF - HWRM
*/
- #define BD_BASE_TYPE_RX_PROD_AGG UINT32_C(0x6)
+ uint16_t target_id;
/*
- * Indicates that this BD is 32B long and is used for normal L2
- * packet transmission.
+ * This is the host address where the response will be written
+ * when the request is complete. This area must be 16B aligned
+ * and must be cleared to zero before the request is made.
*/
- #define BD_BASE_TYPE_TX_BD_LONG UINT32_C(0x10)
- uint8_t unused_1[7];
-} __attribute__((packed));
+ uint64_t resp_addr;
+} input_t, *pinput_t;
-/* Short TX BD (16 bytes) */
+/* Output */
+/* output (size:64b/8B) */
-struct tx_bd_short {
- uint16_t flags_type;
+typedef struct output {
/*
- * All bits in this field must be valid on the first BD of a packet.
- * Only the packet_end bit must be valid for the remaining BDs of a
- * packet.
+ * Pass/Fail or error type
+ *
+ * Note: receiver to verify the in parameters, and fail the call
+ * with an error when appropriate
*/
- /* This value identifies the type of buffer descriptor. */
- #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
- #define TX_BD_SHORT_TYPE_SFT 0
+ uint16_t error_code;
+ /* This field returns the type of original request. */
+ uint16_t req_type;
+ /* This field provides original sequence number of the command. */
+ uint16_t seq_id;
/*
- * Indicates that this BD is 16B long and is used for normal L2
- * packet transmission.
+ * This field is the length of the response in bytes. The
+ * last byte of the response is a valid flag that will read
+ * as '1' when the command has been completely written to
+ * memory.
*/
- #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
+ uint16_t resp_len;
+} output_t, *poutput_t;
+
+/* Short Command Structure */
+/* hwrm_short_input (size:128b/16B) */
+
+typedef struct hwrm_short_input {
/*
- * If set to 1, the packet ends with the data in the buffer pointed to
- * by this descriptor. This flag must be valid on every BD.
+ * This field indicates the type of request in the request buffer.
+ * The format for the rest of the command (request) is determined
+ * by this field.
*/
- #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
+ uint16_t req_type;
/*
- * If set to 1, the device will not generate a completion for this
- * transmit packet unless there is an error in it's processing. If this
- * bit is set to 0, then the packet will be completed normally. This bit
- * must be valid only on the first BD of a packet.
+ * This field indicates a signature that is used to identify short
+ * form of the command listed here. This field shall be set to
+ * 17185 (0x4321).
*/
- #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
+ uint16_t signature;
+ /* Signature indicating this is a short form of HWRM command */
+ #define HWRM_SHORT_INPUT_SIGNATURE_SHORT_CMD UINT32_C(0x4321)
+ #define HWRM_SHORT_INPUT_SIGNATURE_LAST HWRM_SHORT_INPUT_SIGNATURE_SHORT_CMD
+ /* The target ID of the command */
+ uint16_t target_id;
+ /* Default target_id (0x0) to maintain compatibility with old driver */
+ #define HWRM_SHORT_INPUT_TARGET_ID_DEFAULT UINT32_C(0x0)
+ /* Reserved for user-space HWRM interface */
+ #define HWRM_SHORT_INPUT_TARGET_ID_TOOLS UINT32_C(0xfffd)
+ #define HWRM_SHORT_INPUT_TARGET_ID_LAST HWRM_SHORT_INPUT_TARGET_ID_TOOLS
+ /* This value indicates the length of the request. */
+ uint16_t size;
/*
- * This value indicates how many 16B BD locations are consumed in the
- * ring by this packet. A value of 1 indicates that this BD is the only
- * BD (and that the it is a short BD). A value of 3 indicates either 3
- * short BDs or 1 long BD and one short BD in the packet. A value of 0
- * indicates that there are 32 BD locations in the packet (the maximum).
- * This field is valid only on the first BD of a packet.
+ * This is the host address where the request was written.
+ * This area must be 16B aligned.
*/
- #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
- #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
+ uint64_t req_addr;
+} hwrm_short_input_t, *phwrm_short_input_t;
+
+#define GET_HWRM_REQ_TYPE(x) \
+ (((x) < 0x80) ? \
+ ((x) == 0x0 ? "HWRM_VER_GET": \
+ ((x) == 0xb ? "HWRM_FUNC_ECHO_RESPONSE": \
+ ((x) == 0xc ? "HWRM_ERROR_RECOVERY_QCFG": \
+ ((x) == 0xd ? "HWRM_FUNC_DRV_IF_CHANGE": \
+ ((x) == 0xe ? "HWRM_FUNC_BUF_UNRGTR": \
+ ((x) == 0xf ? "HWRM_FUNC_VF_CFG": \
+ ((x) == 0x10 ? "HWRM_RESERVED1": \
+ ((x) == 0x11 ? "HWRM_FUNC_RESET": \
+ ((x) == 0x12 ? "HWRM_FUNC_GETFID": \
+ ((x) == 0x13 ? "HWRM_FUNC_VF_ALLOC": \
+ ((x) == 0x14 ? "HWRM_FUNC_VF_FREE": \
+ ((x) == 0x15 ? "HWRM_FUNC_QCAPS": \
+ ((x) == 0x16 ? "HWRM_FUNC_QCFG": \
+ ((x) == 0x17 ? "HWRM_FUNC_CFG": \
+ ((x) == 0x18 ? "HWRM_FUNC_QSTATS": \
+ ((x) == 0x19 ? "HWRM_FUNC_CLR_STATS": \
+ ((x) == 0x1a ? "HWRM_FUNC_DRV_UNRGTR": \
+ ((x) == 0x1b ? "HWRM_FUNC_VF_RESC_FREE": \
+ ((x) == 0x1c ? "HWRM_FUNC_VF_VNIC_IDS_QUERY": \
+ ((x) == 0x1d ? "HWRM_FUNC_DRV_RGTR": \
+ ((x) == 0x1e ? "HWRM_FUNC_DRV_QVER": \
+ ((x) == 0x1f ? "HWRM_FUNC_BUF_RGTR": \
+ ((x) == 0x20 ? "HWRM_PORT_PHY_CFG": \
+ ((x) == 0x21 ? "HWRM_PORT_MAC_CFG": \
+ ((x) == 0x22 ? "HWRM_PORT_TS_QUERY": \
+ ((x) == 0x23 ? "HWRM_PORT_QSTATS": \
+ ((x) == 0x24 ? "HWRM_PORT_LPBK_QSTATS": \
+ ((x) == 0x25 ? "HWRM_PORT_CLR_STATS": \
+ ((x) == 0x26 ? "HWRM_PORT_LPBK_CLR_STATS": \
+ ((x) == 0x27 ? "HWRM_PORT_PHY_QCFG": \
+ ((x) == 0x28 ? "HWRM_PORT_MAC_QCFG": \
+ ((x) == 0x29 ? "HWRM_PORT_MAC_PTP_QCFG": \
+ ((x) == 0x2a ? "HWRM_PORT_PHY_QCAPS": \
+ ((x) == 0x2b ? "HWRM_PORT_PHY_I2C_WRITE": \
+ ((x) == 0x2c ? "HWRM_PORT_PHY_I2C_READ": \
+ ((x) == 0x2d ? "HWRM_PORT_LED_CFG": \
+ ((x) == 0x2e ? "HWRM_PORT_LED_QCFG": \
+ ((x) == 0x2f ? "HWRM_PORT_LED_QCAPS": \
+ ((x) == 0x30 ? "HWRM_QUEUE_QPORTCFG": \
+ ((x) == 0x31 ? "HWRM_QUEUE_QCFG": \
+ ((x) == 0x32 ? "HWRM_QUEUE_CFG": \
+ ((x) == 0x33 ? "HWRM_FUNC_VLAN_CFG": \
+ ((x) == 0x34 ? "HWRM_FUNC_VLAN_QCFG": \
+ ((x) == 0x35 ? "HWRM_QUEUE_PFCENABLE_QCFG": \
+ ((x) == 0x36 ? "HWRM_QUEUE_PFCENABLE_CFG": \
+ ((x) == 0x37 ? "HWRM_QUEUE_PRI2COS_QCFG": \
+ ((x) == 0x38 ? "HWRM_QUEUE_PRI2COS_CFG": \
+ ((x) == 0x39 ? "HWRM_QUEUE_COS2BW_QCFG": \
+ ((x) == 0x3a ? "HWRM_QUEUE_COS2BW_CFG": \
+ ((x) == 0x3b ? "HWRM_QUEUE_DSCP_QCAPS": \
+ ((x) == 0x3c ? "HWRM_QUEUE_DSCP2PRI_QCFG": \
+ ((x) == 0x3d ? "HWRM_QUEUE_DSCP2PRI_CFG": \
+ ((x) == 0x40 ? "HWRM_VNIC_ALLOC": \
+ ((x) == 0x41 ? "HWRM_VNIC_FREE": \
+ ((x) == 0x42 ? "HWRM_VNIC_CFG": \
+ ((x) == 0x43 ? "HWRM_VNIC_QCFG": \
+ ((x) == 0x44 ? "HWRM_VNIC_TPA_CFG": \
+ ((x) == 0x45 ? "HWRM_VNIC_TPA_QCFG": \
+ ((x) == 0x46 ? "HWRM_VNIC_RSS_CFG": \
+ ((x) == 0x47 ? "HWRM_VNIC_RSS_QCFG": \
+ ((x) == 0x48 ? "HWRM_VNIC_PLCMODES_CFG": \
+ ((x) == 0x49 ? "HWRM_VNIC_PLCMODES_QCFG": \
+ ((x) == 0x4a ? "HWRM_VNIC_QCAPS": \
+ ((x) == 0x4b ? "HWRM_VNIC_UPDATE": \
+ ((x) == 0x50 ? "HWRM_RING_ALLOC": \
+ ((x) == 0x51 ? "HWRM_RING_FREE": \
+ ((x) == 0x52 ? "HWRM_RING_CMPL_RING_QAGGINT_PARAMS": \
+ ((x) == 0x53 ? "HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS": \
+ ((x) == 0x54 ? "HWRM_RING_AGGINT_QCAPS": \
+ ((x) == 0x55 ? "HWRM_RING_SCHQ_ALLOC": \
+ ((x) == 0x56 ? "HWRM_RING_SCHQ_CFG": \
+ ((x) == 0x57 ? "HWRM_RING_SCHQ_FREE": \
+ ((x) == 0x5e ? "HWRM_RING_RESET": \
+ ((x) == 0x60 ? "HWRM_RING_GRP_ALLOC": \
+ ((x) == 0x61 ? "HWRM_RING_GRP_FREE": \
+ ((x) == 0x62 ? "HWRM_RING_CFG": \
+ ((x) == 0x63 ? "HWRM_RING_QCFG": \
+ ((x) == 0x64 ? "HWRM_RESERVED5": \
+ ((x) == 0x65 ? "HWRM_RESERVED6": \
+ ((x) == 0x70 ? "HWRM_VNIC_RSS_COS_LB_CTX_ALLOC": \
+ ((x) == 0x71 ? "HWRM_VNIC_RSS_COS_LB_CTX_FREE": \
+ "Unknown decode" ))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) : \
+ (((x) < 0x100) ? \
+ ((x) == 0x80 ? "HWRM_QUEUE_MPLS_QCAPS": \
+ ((x) == 0x81 ? "HWRM_QUEUE_MPLSTC2PRI_QCFG": \
+ ((x) == 0x82 ? "HWRM_QUEUE_MPLSTC2PRI_CFG": \
+ ((x) == 0x83 ? "HWRM_QUEUE_VLANPRI_QCAPS": \
+ ((x) == 0x84 ? "HWRM_QUEUE_VLANPRI2PRI_QCFG": \
+ ((x) == 0x85 ? "HWRM_QUEUE_VLANPRI2PRI_CFG": \
+ ((x) == 0x86 ? "HWRM_QUEUE_GLOBAL_CFG": \
+ ((x) == 0x87 ? "HWRM_QUEUE_GLOBAL_QCFG": \
+ ((x) == 0x90 ? "HWRM_CFA_L2_FILTER_ALLOC": \
+ ((x) == 0x91 ? "HWRM_CFA_L2_FILTER_FREE": \
+ ((x) == 0x92 ? "HWRM_CFA_L2_FILTER_CFG": \
+ ((x) == 0x93 ? "HWRM_CFA_L2_SET_RX_MASK": \
+ ((x) == 0x94 ? "HWRM_CFA_VLAN_ANTISPOOF_CFG": \
+ ((x) == 0x95 ? "HWRM_CFA_TUNNEL_FILTER_ALLOC": \
+ ((x) == 0x96 ? "HWRM_CFA_TUNNEL_FILTER_FREE": \
+ ((x) == 0x97 ? "HWRM_CFA_ENCAP_RECORD_ALLOC": \
+ ((x) == 0x98 ? "HWRM_CFA_ENCAP_RECORD_FREE": \
+ ((x) == 0x99 ? "HWRM_CFA_NTUPLE_FILTER_ALLOC": \
+ ((x) == 0x9a ? "HWRM_CFA_NTUPLE_FILTER_FREE": \
+ ((x) == 0x9b ? "HWRM_CFA_NTUPLE_FILTER_CFG": \
+ ((x) == 0x9c ? "HWRM_CFA_EM_FLOW_ALLOC": \
+ ((x) == 0x9d ? "HWRM_CFA_EM_FLOW_FREE": \
+ ((x) == 0x9e ? "HWRM_CFA_EM_FLOW_CFG": \
+ ((x) == 0xa0 ? "HWRM_TUNNEL_DST_PORT_QUERY": \
+ ((x) == 0xa1 ? "HWRM_TUNNEL_DST_PORT_ALLOC": \
+ ((x) == 0xa2 ? "HWRM_TUNNEL_DST_PORT_FREE": \
+ ((x) == 0xaf ? "HWRM_STAT_CTX_ENG_QUERY": \
+ ((x) == 0xb0 ? "HWRM_STAT_CTX_ALLOC": \
+ ((x) == 0xb1 ? "HWRM_STAT_CTX_FREE": \
+ ((x) == 0xb2 ? "HWRM_STAT_CTX_QUERY": \
+ ((x) == 0xb3 ? "HWRM_STAT_CTX_CLR_STATS": \
+ ((x) == 0xb4 ? "HWRM_PORT_QSTATS_EXT": \
+ ((x) == 0xb5 ? "HWRM_PORT_PHY_MDIO_WRITE": \
+ ((x) == 0xb6 ? "HWRM_PORT_PHY_MDIO_READ": \
+ ((x) == 0xb7 ? "HWRM_PORT_PHY_MDIO_BUS_ACQUIRE": \
+ ((x) == 0xb8 ? "HWRM_PORT_PHY_MDIO_BUS_RELEASE": \
+ ((x) == 0xb9 ? "HWRM_PORT_QSTATS_EXT_PFC_WD": \
+ ((x) == 0xba ? "HWRM_RESERVED7": \
+ ((x) == 0xbb ? "HWRM_PORT_TX_FIR_CFG": \
+ ((x) == 0xbc ? "HWRM_PORT_TX_FIR_QCFG": \
+ ((x) == 0xbd ? "HWRM_PORT_ECN_QSTATS": \
+ ((x) == 0xbe ? "HWRM_FW_LIVEPATCH_QUERY": \
+ ((x) == 0xbf ? "HWRM_FW_LIVEPATCH": \
+ ((x) == 0xc0 ? "HWRM_FW_RESET": \
+ ((x) == 0xc1 ? "HWRM_FW_QSTATUS": \
+ ((x) == 0xc2 ? "HWRM_FW_HEALTH_CHECK": \
+ ((x) == 0xc3 ? "HWRM_FW_SYNC": \
+ ((x) == 0xc4 ? "HWRM_FW_STATE_QCAPS": \
+ ((x) == 0xc5 ? "HWRM_FW_STATE_QUIESCE": \
+ ((x) == 0xc6 ? "HWRM_FW_STATE_BACKUP": \
+ ((x) == 0xc7 ? "HWRM_FW_STATE_RESTORE": \
+ ((x) == 0xc8 ? "HWRM_FW_SET_TIME": \
+ ((x) == 0xc9 ? "HWRM_FW_GET_TIME": \
+ ((x) == 0xca ? "HWRM_FW_SET_STRUCTURED_DATA": \
+ ((x) == 0xcb ? "HWRM_FW_GET_STRUCTURED_DATA": \
+ ((x) == 0xcc ? "HWRM_FW_IPC_MAILBOX": \
+ ((x) == 0xcd ? "HWRM_FW_ECN_CFG": \
+ ((x) == 0xce ? "HWRM_FW_ECN_QCFG": \
+ ((x) == 0xcf ? "HWRM_FW_SECURE_CFG": \
+ ((x) == 0xd0 ? "HWRM_EXEC_FWD_RESP": \
+ ((x) == 0xd1 ? "HWRM_REJECT_FWD_RESP": \
+ ((x) == 0xd2 ? "HWRM_FWD_RESP": \
+ ((x) == 0xd3 ? "HWRM_FWD_ASYNC_EVENT_CMPL": \
+ ((x) == 0xd4 ? "HWRM_OEM_CMD": \
+ ((x) == 0xd5 ? "HWRM_PORT_PRBS_TEST": \
+ ((x) == 0xd6 ? "HWRM_PORT_SFP_SIDEBAND_CFG": \
+ ((x) == 0xd7 ? "HWRM_PORT_SFP_SIDEBAND_QCFG": \
+ ((x) == 0xd8 ? "HWRM_FW_STATE_UNQUIESCE": \
+ ((x) == 0xd9 ? "HWRM_PORT_DSC_DUMP": \
+ ((x) == 0xe0 ? "HWRM_TEMP_MONITOR_QUERY": \
+ ((x) == 0xe1 ? "HWRM_REG_POWER_QUERY": \
+ ((x) == 0xe2 ? "HWRM_CORE_FREQUENCY_QUERY": \
+ ((x) == 0xe3 ? "HWRM_REG_POWER_HISTOGRAM": \
+ ((x) == 0xf0 ? "HWRM_WOL_FILTER_ALLOC": \
+ ((x) == 0xf1 ? "HWRM_WOL_FILTER_FREE": \
+ ((x) == 0xf2 ? "HWRM_WOL_FILTER_QCFG": \
+ ((x) == 0xf3 ? "HWRM_WOL_REASON_QCFG": \
+ ((x) == 0xf4 ? "HWRM_CFA_METER_QCAPS": \
+ ((x) == 0xf5 ? "HWRM_CFA_METER_PROFILE_ALLOC": \
+ ((x) == 0xf6 ? "HWRM_CFA_METER_PROFILE_FREE": \
+ ((x) == 0xf7 ? "HWRM_CFA_METER_PROFILE_CFG": \
+ ((x) == 0xf8 ? "HWRM_CFA_METER_INSTANCE_ALLOC": \
+ ((x) == 0xf9 ? "HWRM_CFA_METER_INSTANCE_FREE": \
+ ((x) == 0xfa ? "HWRM_CFA_METER_INSTANCE_CFG": \
+ ((x) == 0xfd ? "HWRM_CFA_VFR_ALLOC": \
+ ((x) == 0xfe ? "HWRM_CFA_VFR_FREE": \
+ "Unknown decode" )))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) : \
+ (((x) < 0x180) ? \
+ ((x) == 0x100 ? "HWRM_CFA_VF_PAIR_ALLOC": \
+ ((x) == 0x101 ? "HWRM_CFA_VF_PAIR_FREE": \
+ ((x) == 0x102 ? "HWRM_CFA_VF_PAIR_INFO": \
+ ((x) == 0x103 ? "HWRM_CFA_FLOW_ALLOC": \
+ ((x) == 0x104 ? "HWRM_CFA_FLOW_FREE": \
+ ((x) == 0x105 ? "HWRM_CFA_FLOW_FLUSH": \
+ ((x) == 0x106 ? "HWRM_CFA_FLOW_STATS": \
+ ((x) == 0x107 ? "HWRM_CFA_FLOW_INFO": \
+ ((x) == 0x108 ? "HWRM_CFA_DECAP_FILTER_ALLOC": \
+ ((x) == 0x109 ? "HWRM_CFA_DECAP_FILTER_FREE": \
+ ((x) == 0x10a ? "HWRM_CFA_VLAN_ANTISPOOF_QCFG": \
+ ((x) == 0x10b ? "HWRM_CFA_REDIRECT_TUNNEL_TYPE_ALLOC": \
+ ((x) == 0x10c ? "HWRM_CFA_REDIRECT_TUNNEL_TYPE_FREE": \
+ ((x) == 0x10d ? "HWRM_CFA_PAIR_ALLOC": \
+ ((x) == 0x10e ? "HWRM_CFA_PAIR_FREE": \
+ ((x) == 0x10f ? "HWRM_CFA_PAIR_INFO": \
+ ((x) == 0x110 ? "HWRM_FW_IPC_MSG": \
+ ((x) == 0x111 ? "HWRM_CFA_REDIRECT_TUNNEL_TYPE_INFO": \
+ ((x) == 0x112 ? "HWRM_CFA_REDIRECT_QUERY_TUNNEL_TYPE": \
+ ((x) == 0x113 ? "HWRM_CFA_FLOW_AGING_TIMER_RESET": \
+ ((x) == 0x114 ? "HWRM_CFA_FLOW_AGING_CFG": \
+ ((x) == 0x115 ? "HWRM_CFA_FLOW_AGING_QCFG": \
+ ((x) == 0x116 ? "HWRM_CFA_FLOW_AGING_QCAPS": \
+ ((x) == 0x117 ? "HWRM_CFA_CTX_MEM_RGTR": \
+ ((x) == 0x118 ? "HWRM_CFA_CTX_MEM_UNRGTR": \
+ ((x) == 0x119 ? "HWRM_CFA_CTX_MEM_QCTX": \
+ ((x) == 0x11a ? "HWRM_CFA_CTX_MEM_QCAPS": \
+ ((x) == 0x11b ? "HWRM_CFA_COUNTER_QCAPS": \
+ ((x) == 0x11c ? "HWRM_CFA_COUNTER_CFG": \
+ ((x) == 0x11d ? "HWRM_CFA_COUNTER_QCFG": \
+ ((x) == 0x11e ? "HWRM_CFA_COUNTER_QSTATS": \
+ ((x) == 0x11f ? "HWRM_CFA_TCP_FLAG_PROCESS_QCFG": \
+ ((x) == 0x120 ? "HWRM_CFA_EEM_QCAPS": \
+ ((x) == 0x121 ? "HWRM_CFA_EEM_CFG": \
+ ((x) == 0x122 ? "HWRM_CFA_EEM_QCFG": \
+ ((x) == 0x123 ? "HWRM_CFA_EEM_OP": \
+ ((x) == 0x124 ? "HWRM_CFA_ADV_FLOW_MGNT_QCAPS": \
+ ((x) == 0x125 ? "HWRM_CFA_TFLIB": \
+ ((x) == 0x126 ? "HWRM_CFA_LAG_GROUP_MEMBER_RGTR": \
+ ((x) == 0x127 ? "HWRM_CFA_LAG_GROUP_MEMBER_UNRGTR": \
+ ((x) == 0x12e ? "HWRM_ENGINE_CKV_STATUS": \
+ ((x) == 0x12f ? "HWRM_ENGINE_CKV_CKEK_ADD": \
+ ((x) == 0x130 ? "HWRM_ENGINE_CKV_CKEK_DELETE": \
+ ((x) == 0x131 ? "HWRM_ENGINE_CKV_KEY_ADD": \
+ ((x) == 0x132 ? "HWRM_ENGINE_CKV_KEY_DELETE": \
+ ((x) == 0x133 ? "HWRM_ENGINE_CKV_FLUSH": \
+ ((x) == 0x134 ? "HWRM_ENGINE_CKV_RNG_GET": \
+ ((x) == 0x135 ? "HWRM_ENGINE_CKV_KEY_GEN": \
+ ((x) == 0x136 ? "HWRM_ENGINE_CKV_KEY_LABEL_CFG": \
+ ((x) == 0x137 ? "HWRM_ENGINE_CKV_KEY_LABEL_QCFG": \
+ ((x) == 0x13c ? "HWRM_ENGINE_QG_CONFIG_QUERY": \
+ ((x) == 0x13d ? "HWRM_ENGINE_QG_QUERY": \
+ ((x) == 0x13e ? "HWRM_ENGINE_QG_METER_PROFILE_CONFIG_QUERY": \
+ ((x) == 0x13f ? "HWRM_ENGINE_QG_METER_PROFILE_QUERY": \
+ ((x) == 0x140 ? "HWRM_ENGINE_QG_METER_PROFILE_ALLOC": \
+ ((x) == 0x141 ? "HWRM_ENGINE_QG_METER_PROFILE_FREE": \
+ ((x) == 0x142 ? "HWRM_ENGINE_QG_METER_QUERY": \
+ ((x) == 0x143 ? "HWRM_ENGINE_QG_METER_BIND": \
+ ((x) == 0x144 ? "HWRM_ENGINE_QG_METER_UNBIND": \
+ ((x) == 0x145 ? "HWRM_ENGINE_QG_FUNC_BIND": \
+ ((x) == 0x146 ? "HWRM_ENGINE_SG_CONFIG_QUERY": \
+ ((x) == 0x147 ? "HWRM_ENGINE_SG_QUERY": \
+ ((x) == 0x148 ? "HWRM_ENGINE_SG_METER_QUERY": \
+ ((x) == 0x149 ? "HWRM_ENGINE_SG_METER_CONFIG": \
+ ((x) == 0x14a ? "HWRM_ENGINE_SG_QG_BIND": \
+ ((x) == 0x14b ? "HWRM_ENGINE_QG_SG_UNBIND": \
+ ((x) == 0x154 ? "HWRM_ENGINE_CONFIG_QUERY": \
+ ((x) == 0x155 ? "HWRM_ENGINE_STATS_CONFIG": \
+ ((x) == 0x156 ? "HWRM_ENGINE_STATS_CLEAR": \
+ ((x) == 0x157 ? "HWRM_ENGINE_STATS_QUERY": \
+ ((x) == 0x158 ? "HWRM_ENGINE_STATS_QUERY_CONTINUOUS_ERROR": \
+ ((x) == 0x15e ? "HWRM_ENGINE_RQ_ALLOC": \
+ ((x) == 0x15f ? "HWRM_ENGINE_RQ_FREE": \
+ ((x) == 0x160 ? "HWRM_ENGINE_CQ_ALLOC": \
+ ((x) == 0x161 ? "HWRM_ENGINE_CQ_FREE": \
+ ((x) == 0x162 ? "HWRM_ENGINE_NQ_ALLOC": \
+ ((x) == 0x163 ? "HWRM_ENGINE_NQ_FREE": \
+ ((x) == 0x164 ? "HWRM_ENGINE_ON_DIE_RQE_CREDITS": \
+ ((x) == 0x165 ? "HWRM_ENGINE_FUNC_QCFG": \
+ "Unknown decode" ))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) : \
+ (((x) < 0x200) ? \
+ ((x) == 0x190 ? "HWRM_FUNC_RESOURCE_QCAPS": \
+ ((x) == 0x191 ? "HWRM_FUNC_VF_RESOURCE_CFG": \
+ ((x) == 0x192 ? "HWRM_FUNC_BACKING_STORE_QCAPS": \
+ ((x) == 0x193 ? "HWRM_FUNC_BACKING_STORE_CFG": \
+ ((x) == 0x194 ? "HWRM_FUNC_BACKING_STORE_QCFG": \
+ ((x) == 0x195 ? "HWRM_FUNC_VF_BW_CFG": \
+ ((x) == 0x196 ? "HWRM_FUNC_VF_BW_QCFG": \
+ ((x) == 0x197 ? "HWRM_FUNC_HOST_PF_IDS_QUERY": \
+ ((x) == 0x198 ? "HWRM_FUNC_QSTATS_EXT": \
+ ((x) == 0x199 ? "HWRM_STAT_EXT_CTX_QUERY": \
+ ((x) == 0x19a ? "HWRM_FUNC_SPD_CFG": \
+ ((x) == 0x19b ? "HWRM_FUNC_SPD_QCFG": \
+ ((x) == 0x19c ? "HWRM_FUNC_PTP_PIN_QCFG": \
+ ((x) == 0x19d ? "HWRM_FUNC_PTP_PIN_CFG": \
+ ((x) == 0x19e ? "HWRM_FUNC_PTP_CFG": \
+ ((x) == 0x19f ? "HWRM_FUNC_PTP_TS_QUERY": \
+ "Unknown decode" )))))))))))))))) : \
+ (((x) < 0x280) ? \
+ ((x) == 0x200 ? "HWRM_SELFTEST_QLIST": \
+ ((x) == 0x201 ? "HWRM_SELFTEST_EXEC": \
+ ((x) == 0x202 ? "HWRM_SELFTEST_IRQ": \
+ ((x) == 0x203 ? "HWRM_SELFTEST_RETRIEVE_SERDES_DATA": \
+ ((x) == 0x204 ? "HWRM_PCIE_QSTATS": \
+ ((x) == 0x205 ? "HWRM_MFG_FRU_WRITE_CONTROL": \
+ ((x) == 0x206 ? "HWRM_MFG_TIMERS_QUERY": \
+ ((x) == 0x207 ? "HWRM_MFG_OTP_CFG": \
+ ((x) == 0x208 ? "HWRM_MFG_OTP_QCFG": \
+ ((x) == 0x209 ? "HWRM_MFG_HDMA_TEST": \
+ ((x) == 0x20a ? "HWRM_MFG_FRU_EEPROM_WRITE": \
+ ((x) == 0x20b ? "HWRM_MFG_FRU_EEPROM_READ": \
+ ((x) == 0x20c ? "HWRM_MFG_SOC_IMAGE": \
+ ((x) == 0x20d ? "HWRM_MFG_SOC_QSTATUS": \
+ ((x) == 0x20e ? "HWRM_MFG_PARAM_SEEPROM_SYNC": \
+ ((x) == 0x20f ? "HWRM_MFG_PARAM_SEEPROM_READ": \
+ ((x) == 0x210 ? "HWRM_MFG_PARAM_SEEPROM_HEALTH": \
+ "Unknown decode" ))))))))))))))))) : \
+ (((x) < 0x300) ? \
+ ((x) == 0x2bc ? "HWRM_TF": \
+ ((x) == 0x2bd ? "HWRM_TF_VERSION_GET": \
+ ((x) == 0x2c6 ? "HWRM_TF_SESSION_OPEN": \
+ ((x) == 0x2c7 ? "HWRM_TF_SESSION_ATTACH": \
+ ((x) == 0x2c8 ? "HWRM_TF_SESSION_REGISTER": \
+ ((x) == 0x2c9 ? "HWRM_TF_SESSION_UNREGISTER": \
+ ((x) == 0x2ca ? "HWRM_TF_SESSION_CLOSE": \
+ ((x) == 0x2cb ? "HWRM_TF_SESSION_QCFG": \
+ ((x) == 0x2cc ? "HWRM_TF_SESSION_RESC_QCAPS": \
+ ((x) == 0x2cd ? "HWRM_TF_SESSION_RESC_ALLOC": \
+ ((x) == 0x2ce ? "HWRM_TF_SESSION_RESC_FREE": \
+ ((x) == 0x2cf ? "HWRM_TF_SESSION_RESC_FLUSH": \
+ ((x) == 0x2d0 ? "HWRM_TF_SESSION_RESC_INFO": \
+ ((x) == 0x2da ? "HWRM_TF_TBL_TYPE_GET": \
+ ((x) == 0x2db ? "HWRM_TF_TBL_TYPE_SET": \
+ ((x) == 0x2dc ? "HWRM_TF_TBL_TYPE_BULK_GET": \
+ ((x) == 0x2e2 ? "HWRM_TF_CTXT_MEM_ALLOC": \
+ ((x) == 0x2e3 ? "HWRM_TF_CTXT_MEM_FREE": \
+ ((x) == 0x2e4 ? "HWRM_TF_CTXT_MEM_RGTR": \
+ ((x) == 0x2e5 ? "HWRM_TF_CTXT_MEM_UNRGTR": \
+ ((x) == 0x2e6 ? "HWRM_TF_EXT_EM_QCAPS": \
+ ((x) == 0x2e7 ? "HWRM_TF_EXT_EM_OP": \
+ ((x) == 0x2e8 ? "HWRM_TF_EXT_EM_CFG": \
+ ((x) == 0x2e9 ? "HWRM_TF_EXT_EM_QCFG": \
+ ((x) == 0x2ea ? "HWRM_TF_EM_INSERT": \
+ ((x) == 0x2eb ? "HWRM_TF_EM_DELETE": \
+ ((x) == 0x2ec ? "HWRM_TF_EM_HASH_INSERT": \
+ ((x) == 0x2ed ? "HWRM_TF_EM_MOVE": \
+ ((x) == 0x2f8 ? "HWRM_TF_TCAM_SET": \
+ ((x) == 0x2f9 ? "HWRM_TF_TCAM_GET": \
+ ((x) == 0x2fa ? "HWRM_TF_TCAM_MOVE": \
+ ((x) == 0x2fb ? "HWRM_TF_TCAM_FREE": \
+ ((x) == 0x2fc ? "HWRM_TF_GLOBAL_CFG_SET": \
+ ((x) == 0x2fd ? "HWRM_TF_GLOBAL_CFG_GET": \
+ ((x) == 0x2fe ? "HWRM_TF_IF_TBL_SET": \
+ ((x) == 0x2ff ? "HWRM_TF_IF_TBL_GET": \
+ "Unknown decode" )))))))))))))))))))))))))))))))))))) : \
+ (((x) < 0x480) ? \
+ ((x) == 0x400 ? "HWRM_SV": \
+ "Unknown decode" ) : \
+ (((x) < 0xff80) ? \
+ ((x) == 0xff10 ? "HWRM_DBG_READ_DIRECT": \
+ ((x) == 0xff11 ? "HWRM_DBG_READ_INDIRECT": \
+ ((x) == 0xff12 ? "HWRM_DBG_WRITE_DIRECT": \
+ ((x) == 0xff13 ? "HWRM_DBG_WRITE_INDIRECT": \
+ ((x) == 0xff14 ? "HWRM_DBG_DUMP": \
+ ((x) == 0xff15 ? "HWRM_DBG_ERASE_NVM": \
+ ((x) == 0xff16 ? "HWRM_DBG_CFG": \
+ ((x) == 0xff17 ? "HWRM_DBG_COREDUMP_LIST": \
+ ((x) == 0xff18 ? "HWRM_DBG_COREDUMP_INITIATE": \
+ ((x) == 0xff19 ? "HWRM_DBG_COREDUMP_RETRIEVE": \
+ ((x) == 0xff1a ? "HWRM_DBG_FW_CLI": \
+ ((x) == 0xff1b ? "HWRM_DBG_I2C_CMD": \
+ ((x) == 0xff1c ? "HWRM_DBG_RING_INFO_GET": \
+ ((x) == 0xff1d ? "HWRM_DBG_CRASHDUMP_HEADER": \
+ ((x) == 0xff1e ? "HWRM_DBG_CRASHDUMP_ERASE": \
+ ((x) == 0xff1f ? "HWRM_DBG_DRV_TRACE": \
+ ((x) == 0xff20 ? "HWRM_DBG_QCAPS": \
+ ((x) == 0xff21 ? "HWRM_DBG_QCFG": \
+ ((x) == 0xff22 ? "HWRM_DBG_CRASHDUMP_MEDIUM_CFG": \
+ ((x) == 0xff23 ? "HWRM_DBG_USEQ_ALLOC": \
+ ((x) == 0xff24 ? "HWRM_DBG_USEQ_FREE": \
+ ((x) == 0xff25 ? "HWRM_DBG_USEQ_FLUSH": \
+ ((x) == 0xff26 ? "HWRM_DBG_USEQ_QCAPS": \
+ ((x) == 0xff27 ? "HWRM_DBG_USEQ_CW_CFG": \
+ ((x) == 0xff28 ? "HWRM_DBG_USEQ_SCHED_CFG": \
+ ((x) == 0xff29 ? "HWRM_DBG_USEQ_RUN": \
+ ((x) == 0xff2a ? "HWRM_DBG_USEQ_DELIVERY_REQ": \
+ ((x) == 0xff2b ? "HWRM_DBG_USEQ_RESP_HDR": \
+ "Unknown decode" )))))))))))))))))))))))))))) : \
+ (((x) <= 0xffff) ? \
+ ((x) == 0xffed ? "HWRM_NVM_REQ_ARBITRATION": \
+ ((x) == 0xffee ? "HWRM_NVM_FACTORY_DEFAULTS": \
+ ((x) == 0xffef ? "HWRM_NVM_VALIDATE_OPTION": \
+ ((x) == 0xfff0 ? "HWRM_NVM_FLUSH": \
+ ((x) == 0xfff1 ? "HWRM_NVM_GET_VARIABLE": \
+ ((x) == 0xfff2 ? "HWRM_NVM_SET_VARIABLE": \
+ ((x) == 0xfff3 ? "HWRM_NVM_INSTALL_UPDATE": \
+ ((x) == 0xfff4 ? "HWRM_NVM_MODIFY": \
+ ((x) == 0xfff5 ? "HWRM_NVM_VERIFY_UPDATE": \
+ ((x) == 0xfff6 ? "HWRM_NVM_GET_DEV_INFO": \
+ ((x) == 0xfff7 ? "HWRM_NVM_ERASE_DIR_ENTRY": \
+ ((x) == 0xfff8 ? "HWRM_NVM_MOD_DIR_ENTRY": \
+ ((x) == 0xfff9 ? "HWRM_NVM_FIND_DIR_ENTRY": \
+ ((x) == 0xfffa ? "HWRM_NVM_GET_DIR_ENTRIES": \
+ ((x) == 0xfffb ? "HWRM_NVM_GET_DIR_INFO": \
+ ((x) == 0xfffc ? "HWRM_NVM_RAW_DUMP": \
+ ((x) == 0xfffd ? "HWRM_NVM_READ": \
+ ((x) == 0xfffe ? "HWRM_NVM_WRITE": \
+ ((x) == 0xffff ? "HWRM_NVM_RAW_WRITE_BLK": \
+ "Unknown decode" ))))))))))))))))))) : \
+ "Unknown decode" )))))))))
+
+
+/*
+ * Command numbering
+ * # NOTE - definitions already in hwrm_req_type, in hwrm_types.yaml
+ * # So only structure definition is provided here.
+ */
+/* cmd_nums (size:64b/8B) */
+
+typedef struct cmd_nums {
+ /*
+ * This version of the specification defines the commands listed in
+ * the table below. The following are general implementation
+ * requirements for these commands:
+ *
+ * # All commands listed below that are marked neither
+ * reserved nor experimental shall be implemented by the HWRM.
+ * # A HWRM client compliant to this specification should not use
+ * commands outside of the list below.
+ * # A HWRM client compliant to this specification should not use
+ * command numbers marked reserved below.
+ * # A command marked experimental below may not be implemented
+ * by the HWRM.
+ * # A command marked experimental may change in the
+ * future version of the HWRM specification.
+ * # A command not listed below may be implemented by the HWRM.
+ * The behavior of commands that are not listed below is outside
+ * the scope of this specification.
+ */
+ uint16_t req_type;
+ #define HWRM_VER_GET UINT32_C(0x0)
+ #define HWRM_FUNC_ECHO_RESPONSE UINT32_C(0xb)
+ #define HWRM_ERROR_RECOVERY_QCFG UINT32_C(0xc)
+ #define HWRM_FUNC_DRV_IF_CHANGE UINT32_C(0xd)
+ #define HWRM_FUNC_BUF_UNRGTR UINT32_C(0xe)
+ #define HWRM_FUNC_VF_CFG UINT32_C(0xf)
+ /* Reserved for future use. */
+ #define HWRM_RESERVED1 UINT32_C(0x10)
+ #define HWRM_FUNC_RESET UINT32_C(0x11)
+ #define HWRM_FUNC_GETFID UINT32_C(0x12)
+ #define HWRM_FUNC_VF_ALLOC UINT32_C(0x13)
+ #define HWRM_FUNC_VF_FREE UINT32_C(0x14)
+ #define HWRM_FUNC_QCAPS UINT32_C(0x15)
+ #define HWRM_FUNC_QCFG UINT32_C(0x16)
+ #define HWRM_FUNC_CFG UINT32_C(0x17)
+ #define HWRM_FUNC_QSTATS UINT32_C(0x18)
+ #define HWRM_FUNC_CLR_STATS UINT32_C(0x19)
+ #define HWRM_FUNC_DRV_UNRGTR UINT32_C(0x1a)
+ #define HWRM_FUNC_VF_RESC_FREE UINT32_C(0x1b)
+ #define HWRM_FUNC_VF_VNIC_IDS_QUERY UINT32_C(0x1c)
+ #define HWRM_FUNC_DRV_RGTR UINT32_C(0x1d)
+ #define HWRM_FUNC_DRV_QVER UINT32_C(0x1e)
+ #define HWRM_FUNC_BUF_RGTR UINT32_C(0x1f)
+ #define HWRM_PORT_PHY_CFG UINT32_C(0x20)
+ #define HWRM_PORT_MAC_CFG UINT32_C(0x21)
+ /* Experimental */
+ #define HWRM_PORT_TS_QUERY UINT32_C(0x22)
+ #define HWRM_PORT_QSTATS UINT32_C(0x23)
+ #define HWRM_PORT_LPBK_QSTATS UINT32_C(0x24)
+ /* Experimental */
+ #define HWRM_PORT_CLR_STATS UINT32_C(0x25)
+ /* Experimental */
+ #define HWRM_PORT_LPBK_CLR_STATS UINT32_C(0x26)
+ #define HWRM_PORT_PHY_QCFG UINT32_C(0x27)
+ #define HWRM_PORT_MAC_QCFG UINT32_C(0x28)
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