From nobody Thu Jun 02 17:39:47 2022 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 2014119553F4; Thu, 2 Jun 2022 17:39:51 +0000 (UTC) (envelope-from mjguzik@gmail.com) Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "smtp.gmail.com", Issuer "GTS CA 1D4" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4LDYDk1F4Wz3NYH; Thu, 2 Jun 2022 17:39:50 +0000 (UTC) (envelope-from mjguzik@gmail.com) Received: by mail-lj1-x22f.google.com with SMTP id q1so5991967ljb.5; Thu, 02 Jun 2022 10:39:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=iK5bsiprt0wPogt9E4eFyyvQIqGYptaOUNBwnywIqxk=; b=kQvLMVaIX7At/jownZbfwfzNxBVXl5DozfNvz4wJND95v0sOOcqw7pdZqM+AXqwn1s BoCSkYpiQER22v0AUoObygnnL/soUgolWQ7oxgUhsC6qfG4raudEAoP0FVZMYJKmTXSl mzxO3rNqUTxcw5mlACGaMJSy7pHpmH89fgOnyPHrrgzn9zDNUDvy1QVf68XBRfoADMr4 a0TNP6TbxrEelZ3BW1Np4dCUyh9ePWbpMjRjW3t24LoFuTHP2tqmeEa9yalucIVHqF1B 6OqlrKwQH6C9xkYUSQJYAksERq51fYhvt1bBPM4TdlH+BRokI6nKxWi+JRCDjJOj3WSh iF3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=iK5bsiprt0wPogt9E4eFyyvQIqGYptaOUNBwnywIqxk=; b=lzU97Qsz+cWPPQKeIQ+gJK0yzY0GWem2UyMR/nSH0nzCm5dUJiJXGy5hWMIkW5+yL8 6X776mu0jAb31IrgReJ9mvgd1F+dOxfGsy8nYiMI3QR3H7GLmrHkaTBte1cDUnxRo7Qh oNnz+2vNNep57B5Nm/yXwU+wmweeZpEXhhrJ1P2o4+qYzSkb/uAXtIYr0FDfsshEV5go LqmFD0bdv0LAEudQvqosdXPoOfXyBpne+R6bRkFgkinLu2dMM+W/vmdDWXds4oaZpHr+ YUv1bU2KCny17M8GeVHWAqVDXk3rgaFOfhcK0F1meB31sFOl/q/Sv6SHdhN71oraxcvI Pb1g== X-Gm-Message-State: AOAM531bcxjT5p5K9QnKbvFBinKoLkpjK4eoNDnsDnIzIgnGoL7i2Kd2 sr50VKnvJO1tPiD0B1WIOd6TeFes7lwdx4IOGxmqA3vt X-Google-Smtp-Source: ABdhPJx5wlLiXRyKvW4N6gNHdn/3p4Novl6/X5duAOIsoy5FFeGc9SzTlJbCShJj6/uhOb7WGJZlh0kpK53ORIapOg4= X-Received: by 2002:a2e:b753:0:b0:255:3a90:9d2 with SMTP id k19-20020a2eb753000000b002553a9009d2mr18821693ljo.91.1654191588670; Thu, 02 Jun 2022 10:39:48 -0700 (PDT) List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Received: by 2002:aa6:c2d2:0:b0:1e6:e5ee:dbad with HTTP; Thu, 2 Jun 2022 10:39:47 -0700 (PDT) In-Reply-To: <202206021717.252HHURx005767@gitrepo.freebsd.org> References: <202206021717.252HHURx005767@gitrepo.freebsd.org> From: Mateusz Guzik Date: Thu, 2 Jun 2022 19:39:47 +0200 Message-ID: Subject: Re: git: 1a4614a51ee7 - main - hwpmc: Bump Intel's IA32_PERFEVTSELx width to 64 bits. To: Alexander Motin Cc: src-committers@freebsd.org, dev-commits-src-all@freebsd.org, dev-commits-src-main@freebsd.org Content-Type: text/plain; charset="UTF-8" X-Rspamd-Queue-Id: 4LDYDk1F4Wz3NYH X-Spamd-Bar: --- Authentication-Results: mx1.freebsd.org; dkim=pass header.d=gmail.com header.s=20210112 header.b=kQvLMVaI; dmarc=pass (policy=none) header.from=gmail.com; spf=pass (mx1.freebsd.org: domain of mjguzik@gmail.com designates 2a00:1450:4864:20::22f as permitted sender) smtp.mailfrom=mjguzik@gmail.com X-Spamd-Result: default: False [-4.00 / 15.00]; ARC_NA(0.00)[]; NEURAL_HAM_MEDIUM(-1.00)[-1.000]; R_DKIM_ALLOW(-0.20)[gmail.com:s=20210112]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; FREEMAIL_FROM(0.00)[gmail.com]; TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; R_SPF_ALLOW(-0.20)[+ip6:2a00:1450:4000::/36]; NEURAL_HAM_LONG(-1.00)[-1.000]; TO_DN_SOME(0.00)[]; MID_RHS_MATCH_FROMTLD(0.00)[]; DKIM_TRACE(0.00)[gmail.com:+]; DMARC_POLICY_ALLOW(-0.50)[gmail.com,none]; RCVD_IN_DNSWL_NONE(0.00)[2a00:1450:4864:20::22f:from]; NEURAL_HAM_SHORT(-1.00)[-1.000]; MLMMJ_DEST(0.00)[dev-commits-src-all,dev-commits-src-main]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; FREEMAIL_ENVFROM(0.00)[gmail.com]; ASN(0.00)[asn:15169, ipnet:2a00:1450::/32, country:US]; RCVD_COUNT_TWO(0.00)[2]; RCVD_TLS_ALL(0.00)[]; DWL_DNSWL_NONE(0.00)[gmail.com:dkim] X-ThisMailContainsUnwantedMimeParts: N are you going to do enough work to unbreak: pmc stat -- foo ? On 6/2/22, Alexander Motin wrote: > The branch main has been updated by mav: > > URL: > https://cgit.FreeBSD.org/src/commit/?id=1a4614a51ee7e3d3cd4ef30b16e13f9ef1713a56 > > commit 1a4614a51ee7e3d3cd4ef30b16e13f9ef1713a56 > Author: Alexander Motin > AuthorDate: 2022-06-02 17:08:55 +0000 > Commit: Alexander Motin > CommitDate: 2022-06-02 17:08:55 +0000 > > hwpmc: Bump Intel's IA32_PERFEVTSELx width to 64 bits. > > Haswell added there bits 32/33 for TSX, and AlderLake added bit 34 > for Adaptive PEBS Record. > > MFC after: 1 month > --- > sys/dev/hwpmc/hwpmc_core.c | 5 +++-- > sys/dev/hwpmc/hwpmc_core.h | 40 ++++++++++++++++++++++------------------ > sys/dev/hwpmc/hwpmc_uncore.c | 2 +- > sys/dev/hwpmc/hwpmc_uncore.h | 4 ++-- > 4 files changed, 28 insertions(+), 23 deletions(-) > > diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c > index 1b3c59163141..a2607ca1d9e3 100644 > --- a/sys/dev/hwpmc/hwpmc_core.c > +++ b/sys/dev/hwpmc/hwpmc_core.c > @@ -226,7 +226,8 @@ iaf_allocate_pmc(int cpu, int ri, struct pmc *pm, > const struct pmc_op_pmcallocate *a) > { > uint8_t ev, umask; > - uint32_t caps, flags, config; > + uint32_t caps; > + uint64_t config, flags; > const struct pmc_md_iap_op_pmcallocate *iap; > > KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), > @@ -907,7 +908,7 @@ static int > iap_start_pmc(int cpu, int ri) > { > struct pmc *pm; > - uint32_t evsel; > + uint64_t evsel; > struct core_cpu *cc; > > KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), > diff --git a/sys/dev/hwpmc/hwpmc_core.h b/sys/dev/hwpmc/hwpmc_core.h > index 5b42182a876c..b75146d8b590 100644 > --- a/sys/dev/hwpmc/hwpmc_core.h > +++ b/sys/dev/hwpmc/hwpmc_core.h > @@ -48,7 +48,7 @@ > * Programmable PMCs. > */ > struct pmc_md_iap_op_pmcallocate { > - uint32_t pm_iap_config; > + uint64_t pm_iap_config; > uint64_t pm_iap_rsp; > }; > > @@ -75,9 +75,8 @@ struct pmc_md_iap_op_pmcallocate { > * Fixed-function counters. > */ > > -#define IAF_MASK 0xF > +#define IAF_MASK 0x000000010000000f > > -#define IAF_COUNTER_MASK 0x0000ffffffffffff > #define IAF_CTR0 0x309 > #define IAF_CTR1 0x30A > #define IAF_CTR2 0x30B > @@ -86,7 +85,17 @@ struct pmc_md_iap_op_pmcallocate { > * The IAF_CTRL MSR is laid out in the following way. > * > * Bit Position Use > - * 63 - 12 Reserved (do not touch) > + * 63 - 45 Reserved (do not touch) > + * 44 Ctr 3 Adaptive Record (v5) > + * 43 - 41 Reserved (do not touch) > + * 40 Ctr 2 Adaptive Record (v5) > + * 39 - 37 Reserved (do not touch) > + * 36 Ctr 1 Adaptive Record (v5) > + * 35 - 33 Reserved (do not touch) > + * 32 Ctr 0 Adaptive Record (v5) > + * 15 Ctr 3 PMI > + * 14 Ctr 3 Any Thread (v3) > + * 13-12 Ctr 3 Enable > * 11 Ctr 2 PMI > * 10 Ctr 2 Any Thread (v3) > * 9-8 Ctr 2 Enable > @@ -100,7 +109,6 @@ struct pmc_md_iap_op_pmcallocate { > > #define IAF_OFFSET 32 > #define IAF_CTRL 0x38D > -#define IAF_CTRL_MASK 0x0000000000000fff > > /* > * Programmable counters. > @@ -113,7 +121,10 @@ struct pmc_md_iap_op_pmcallocate { > * IAP_EVSEL(n) is laid out in the following way. > * > * Bit Position Use > - * 63-31 Reserved (do not touch) > + * 63-35 Reserved (do not touch) > + * 34 Adaptive Record (v5) > + * 33 IN_TX (v3) > + * 32 IN_TXCP (v3) > * 31-24 Counter Mask > * 23 Invert > * 22 Enable > @@ -127,7 +138,6 @@ struct pmc_md_iap_op_pmcallocate { > * 7-0 Event Select > */ > > -#define IAP_EVSEL_MASK 0x00000000ffffffff > #define IAP_EVSEL0 0x186 > > /* > @@ -142,22 +152,16 @@ struct pmc_md_iap_op_pmcallocate { > * IA_GLOBAL_CTRL is laid out in the following way. > * > * Bit Position Use > - * 63-35 Reserved (do not touch) > + * 63-49 Reserved (do not touch) > + * 48 Perf Metrics Enable (v5) > + * 47-36 Reserved (do not touch) > + * 35 IAF Counter 3 Enable > * 34 IAF Counter 2 Enable > * 33 IAF Counter 1 Enable > * 32 IAF Counter 0 Enable > * 31-0 Depends on programmable counters > */ > > -/* The mask is only for the fixed porttion of the register. */ > -#define IAF_GLOBAL_CTRL_MASK 0x0000000700000000 > - > -/* The mask is only for the programmable porttion of the register. */ > -#define IAP_GLOBAL_CTRL_MASK 0x00000000ffffffff > - > -/* The mask is for both the fixed and programmable porttions of the > register. */ > -#define IA_GLOBAL_CTRL_MASK 0x00000007ffffffff > - > #define IA_GLOBAL_OVF_CTRL 0x390 > #define IA_GLOBAL_STATUS_RESET 0x390 > #define IA_GLOBAL_STATUS_SET 0x391 /* v4 */ > @@ -183,7 +187,7 @@ struct pmc_md_iaf_pmc { > }; > > struct pmc_md_iap_pmc { > - uint32_t pm_iap_evsel; > + uint64_t pm_iap_evsel; > uint64_t pm_iap_rsp; > }; > > diff --git a/sys/dev/hwpmc/hwpmc_uncore.c b/sys/dev/hwpmc/hwpmc_uncore.c > index 93e41e8d91f1..f69b21e173d5 100644 > --- a/sys/dev/hwpmc/hwpmc_uncore.c > +++ b/sys/dev/hwpmc/hwpmc_uncore.c > @@ -649,7 +649,7 @@ static int > ucp_start_pmc(int cpu, int ri) > { > struct pmc *pm; > - uint32_t evsel; > + uint64_t evsel; > struct uncore_cpu *cc; > > KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), > diff --git a/sys/dev/hwpmc/hwpmc_uncore.h b/sys/dev/hwpmc/hwpmc_uncore.h > index ac1623e7737e..5e8610f77ddf 100644 > --- a/sys/dev/hwpmc/hwpmc_uncore.h > +++ b/sys/dev/hwpmc/hwpmc_uncore.h > @@ -45,7 +45,7 @@ struct pmc_md_ucf_op_pmcallocate { > * Programmable PMCs. > */ > struct pmc_md_ucp_op_pmcallocate { > - uint32_t pm_ucp_config; > + uint64_t pm_ucp_config; > }; > > #define UCP_EVSEL(C) ((C) & 0xFF) > @@ -106,7 +106,7 @@ struct pmc_md_ucf_pmc { > }; > > struct pmc_md_ucp_pmc { > - uint32_t pm_ucp_evsel; > + uint64_t pm_ucp_evsel; > }; > > /* > -- Mateusz Guzik