From nobody Tue Feb 22 08:58:51 2022 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id B2D6319D8457; Tue, 22 Feb 2022 08:58:52 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4K2tPm1Gjdz3q5x; Tue, 22 Feb 2022 08:58:51 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1645520332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=VOwG2/pGu6E0s57n46deQX312lOsWjXblx7nGyDMS2c=; b=AAhGJIjzq8+3Oe69pZxaYGB93+uBTz1/58zUT7aF73juIejXpkDcnjMV+G1nNJwUYKzu5R che6d3A0TuCaAxLyyWuRijiNJ1K8bHU/ci+M9u9zHxnt5jeFm9IjaRZLHM5sWOtUQjk8su 5rpteVaJDCg/9RBB3+g0dzwGrrYzwinPju6E0skhsgxw64k/zg1nxwoHvJl3f+vh2vE7Hj G1j0M8HzDZ1DuE3CfMi0nGYeJCQdj4GFH2BEKMjQJe3GCAvn4vOUxjMHKtU/++SJ4tXgKF DDmTKfD8ZTgRwVUwBraaUGVyYwdE4xHo1ZxglB48CSunGtGSpP/6h/JRIFDB0A== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id BDEC520FBC; Tue, 22 Feb 2022 08:58:51 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 21M8wp0E038188; Tue, 22 Feb 2022 08:58:51 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 21M8wpNq038187; Tue, 22 Feb 2022 08:58:51 GMT (envelope-from git) Date: Tue, 22 Feb 2022 08:58:51 GMT Message-Id: <202202220858.21M8wpNq038187@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Wojciech Macek Subject: git: f97e7d6e9d3e - main - sdhci_fsl_fdt: Add voltage switching through syscon List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: wma X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: f97e7d6e9d3ee603a571892053e174bf9ddf4d0b Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1645520332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=VOwG2/pGu6E0s57n46deQX312lOsWjXblx7nGyDMS2c=; b=SbvAjiuDxAKj5+qZ8VLxmQrZvDhd5MFWx2aACaN62kJsp85PEUd5u0Nu+RjhfjHVTUkQv6 lsNo4vSCWWf02dtIkPw2ugrb1etofHESvSuMlhsF+4wR9huUwrwNu+YZwlz7J4OhtJLIyI uM3MMUpPUysPJdDed2wNK+oXzfEhvEjaBD+uh3qC7MTd8LJS7p+lKbc/3fueUNcEJuK0Pg ewgYM/XBAyq+8z6+rvrzeIeBcBE2IRfTVnne7OwsJBMAlc4Rr6SkKDtUUj+ZQ+ofnkd3++ XlMeABo6tt9KJ1dQq9nlsUbnTLXEPhGRf9p+xwJhG4e4uH45S+zuXgr7mTXtfA== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1645520332; a=rsa-sha256; cv=none; b=TQKAvgg5SMtNFJPTzVsk4IviJ6WFyNcmpm0DRHnZQhJAx4nJBmNIGV4N7lUQk7mpeKgFWO WFOr1GhbZBexeg0v0Ku1OP5bd5E/XEMjEyuU4zqUfSKFO9twugmv+AQyWjrfw7Y31L2oix YorIOAREleGC8pSUjIxtU3vVKPN+crRWczghp17oWNO+5y3i3qNVqxU6RDZvKp5VjaheRg qCDXklTTaTU2g09SCM0ZBmnNBQr+G/eUCgKOpWs287TniOf6q+5Bs/8axOLD76PbJVrCnk sMNzbF9BxwM6prj09Rq9PEwLnPFOKjwpLoxnrwa8hElfMepr0tOh45Z1CAsZmA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by wma: URL: https://cgit.FreeBSD.org/src/commit/?id=f97e7d6e9d3ee603a571892053e174bf9ddf4d0b commit f97e7d6e9d3ee603a571892053e174bf9ddf4d0b Author: Hubert Mazur AuthorDate: 2022-01-20 09:56:10 +0000 Commit: Wojciech Macek CommitDate: 2022-02-22 08:58:38 +0000 sdhci_fsl_fdt: Add voltage switching through syscon Some SoCs does not have a fixed regulator to handle voltage switching automatically. Add support for voltage switching through syscon register when necessary. Add new errata flag indicating missing regulator. Apply errata to SoCs, which are known to be affected, i.e. LS1046 and LS1012. Obtained from: Semihalf Sponsored by: Alstom Group Differential revision: https://reviews.freebsd.org/D34029 --- sys/dev/sdhci/sdhci_fsl_fdt.c | 99 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 90 insertions(+), 9 deletions(-) diff --git a/sys/dev/sdhci/sdhci_fsl_fdt.c b/sys/dev/sdhci/sdhci_fsl_fdt.c index 34e7e6fd449f..31ff858c7a14 100644 --- a/sys/dev/sdhci/sdhci_fsl_fdt.c +++ b/sys/dev/sdhci/sdhci_fsl_fdt.c @@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -53,6 +54,7 @@ __FBSDID("$FreeBSD$"); #include "mmcbr_if.h" #include "sdhci_if.h" +#include "syscon_if.h" #define RD4 (sc->read) #define WR4 (sc->write) @@ -142,6 +144,13 @@ __FBSDID("$FreeBSD$"); #define SDHCI_FSL_ESDHC_CTRL_FAF (1 << 18) #define SDHCI_FSL_ESDHC_CTRL_CLK_DIV2 (1 << 19) +#define SCFG_SDHCIOVSELCR 0x408 +#define SCFG_SDHCIOVSELCR_TGLEN (1 << 0) +#define SCFG_SDHCIOVSELCR_VS (1 << 31) +#define SCFG_SDHCIOVSELCR_VSELVAL_MASK (3 << 1) +#define SCFG_SDHCIOVSELCR_VSELVAL_1_8 0x0 +#define SCFG_SDHCIOVSELCR_VSELVAL_3_3 0x2 + #define SDHCI_FSL_CAN_VDD_MASK \ (SDHCI_CAN_VDD_180 | SDHCI_CAN_VDD_300 | SDHCI_CAN_VDD_330) @@ -162,6 +171,12 @@ __FBSDID("$FreeBSD$"); */ #define SDHCI_FSL_HS400_LIMITED_CLK_DIV (1 << 4) +/* + * Some SoCs don't have a fixed regulator. Switching voltage + * requires special routine including syscon registers. + */ +#define SDHCI_FSL_MISSING_VCCQ_REG (1 << 5) + /* * HS400 tuning is done in HS200 mode, but it has to be done using * the target frequency. In order to apply the errata above we need to @@ -197,12 +212,14 @@ struct sdhci_fsl_fdt_soc_data { int quirks; int baseclk_div; uint8_t errata; + char *syscon_compat; }; static const struct sdhci_fsl_fdt_soc_data sdhci_fsl_fdt_ls1012a_soc_data = { .quirks = 0, .baseclk_div = 1, - .errata = SDHCI_FSL_UNSUPP_1_8V, + .errata = SDHCI_FSL_MISSING_VCCQ_REG | SDHCI_FSL_TUNING_ERRATUM_TYPE2, + .syscon_compat = "fsl,ls1012a-scfg", }; static const struct sdhci_fsl_fdt_soc_data sdhci_fsl_fdt_ls1028a_soc_data = { @@ -216,7 +233,8 @@ static const struct sdhci_fsl_fdt_soc_data sdhci_fsl_fdt_ls1028a_soc_data = { static const struct sdhci_fsl_fdt_soc_data sdhci_fsl_fdt_ls1046a_soc_data = { .quirks = SDHCI_QUIRK_DONT_SET_HISPD_BIT | SDHCI_QUIRK_BROKEN_AUTO_STOP, .baseclk_div = 2, - .errata = SDHCI_FSL_UNSUPP_1_8V | SDHCI_FSL_TUNING_ERRATUM_TYPE2, + .errata = SDHCI_FSL_MISSING_VCCQ_REG | SDHCI_FSL_TUNING_ERRATUM_TYPE2, + .syscon_compat = "fsl,ls1046a-scfg", }; static const struct sdhci_fsl_fdt_soc_data sdhci_fsl_fdt_lx2160a_soc_data = { @@ -621,6 +639,60 @@ sdhci_fsl_fdt_update_ios(device_t brdev, device_t reqdev) return (0); } +static int +sdhci_fsl_fdt_switch_syscon_voltage(device_t dev, + struct sdhci_fsl_fdt_softc *sc, enum mmc_vccq vccq) +{ + struct syscon *syscon; + phandle_t syscon_node; + uint32_t reg; + + if (sc->soc_data->syscon_compat == NULL) { + device_printf(dev, "Empty syscon compat string.\n"); + return (ENXIO); + } + + syscon_node = ofw_bus_find_compatible(OF_finddevice("/"), + sc->soc_data->syscon_compat); + + if (syscon_get_by_ofw_node(dev, syscon_node, &syscon) != 0) { + device_printf(dev, "Could not find syscon node.\n"); + return (ENXIO); + } + + reg = SYSCON_READ_4(syscon, SCFG_SDHCIOVSELCR); + reg &= ~SCFG_SDHCIOVSELCR_VSELVAL_MASK; + reg |= SCFG_SDHCIOVSELCR_TGLEN; + + switch (vccq) { + case vccq_180: + reg |= SCFG_SDHCIOVSELCR_VSELVAL_1_8; + SYSCON_WRITE_4(syscon, SCFG_SDHCIOVSELCR, reg); + + DELAY(5000); + + reg = SYSCON_READ_4(syscon, SCFG_SDHCIOVSELCR); + reg |= SCFG_SDHCIOVSELCR_VS; + break; + case vccq_330: + reg |= SCFG_SDHCIOVSELCR_VSELVAL_3_3; + SYSCON_WRITE_4(syscon, SCFG_SDHCIOVSELCR, reg); + + DELAY(5000); + + reg = SYSCON_READ_4(syscon, SCFG_SDHCIOVSELCR); + reg &= ~SCFG_SDHCIOVSELCR_VS; + break; + default: + device_printf(dev, "Unsupported voltage requested.\n"); + return (ENXIO); + } + + SYSCON_WRITE_4(syscon, SCFG_SDHCIOVSELCR, reg); + + return (0); +} + static int sdhci_fsl_fdt_switch_vccq(device_t brdev, device_t reqdev) { @@ -628,7 +700,7 @@ sdhci_fsl_fdt_switch_vccq(device_t brdev, device_t reqdev) struct sdhci_slot *slot; regulator_t vqmmc_supply; uint32_t val_old, val; - int uvolt, err; + int uvolt, err = 0; sc = device_get_softc(brdev); slot = device_get_ivars(reqdev); @@ -653,6 +725,13 @@ sdhci_fsl_fdt_switch_vccq(device_t brdev, device_t reqdev) WR4(sc, SDHCI_FSL_PROT_CTRL, val); + if (sc->soc_data->errata & SDHCI_FSL_MISSING_VCCQ_REG) { + err = sdhci_fsl_fdt_switch_syscon_voltage(brdev, sc, + slot->host.ios.vccq); + if (err != 0) + goto vccq_fail; + } + vqmmc_supply = sc->fdt_helper.vqmmc_supply; /* * Even though we expect to find a fixed regulator in this controller @@ -660,15 +739,17 @@ sdhci_fsl_fdt_switch_vccq(device_t brdev, device_t reqdev) */ if (vqmmc_supply != NULL) { err = regulator_set_voltage(vqmmc_supply, uvolt, uvolt); - if (err != 0) { - device_printf(sc->dev, - "Cannot set vqmmc to %d<->%d\n", uvolt, uvolt); - WR4(sc, SDHCI_FSL_PROT_CTRL, val_old); - return (err); - } + if (err != 0) + goto vccq_fail; } return (0); + +vccq_fail: + device_printf(sc->dev, "Cannot set vqmmc to %d<->%d\n", uvolt, uvolt); + WR4(sc, SDHCI_FSL_PROT_CTRL, val_old); + + return (err); } static int