From nobody Wed Aug 10 17:22:40 2022 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4M2xb42TLnz4YXJF; Wed, 10 Aug 2022 17:22:40 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4M2xb41xczz4Q8h; Wed, 10 Aug 2022 17:22:40 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1660152160; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=pnuvFrZUzTQdLWtl3BZU3a0Y9xcnX4VQGxAGdFoY5pQ=; b=ugm9wmGWebSWdn7Sh9fFxN2oMuHMUkRcufyUXwM/527XkM3saUesfdDoPz1Y2AqML+ER6z 2s28A0WO2yF6h/ZKFTek3avbhz4CEKLndBapiiURiGa5/qnLM7tCheLceKeb+/HgyAExWZ X94R1zubuP7aAuEq4/LlxNg2z9VCdzSsfWk3LS+cNE7D9XBovUevKYsDpWSMMr2nG10T6w rW6VNZN3IM/QZ6kjYzK7BTO58Q2RA5MSoFLaM57TdzcPQW6em0z61hoAVSsYU55o6r9ylz lsMSqyVO1idMWAiWDjiUNtIDHXMoT0aAMBdBjxRoEQlfCgM0nC5dUsTOFglAcg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4M2xb410S0zKNK; Wed, 10 Aug 2022 17:22:40 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 27AHMe7W080753; Wed, 10 Aug 2022 17:22:40 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 27AHMeUB080752; Wed, 10 Aug 2022 17:22:40 GMT (envelope-from git) Date: Wed, 10 Aug 2022 17:22:40 GMT Message-Id: <202208101722.27AHMeUB080752@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Emmanuel Vadot Subject: git: 87f642ac03e3 - main - arm64: rockchip: rk_gpio: Improve mode switching List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: manu X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 87f642ac03e3cefea7048cb46b17810d01e97dd5 Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1660152160; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=pnuvFrZUzTQdLWtl3BZU3a0Y9xcnX4VQGxAGdFoY5pQ=; b=MdiMiPmGu/qdqRFskPMogbYre+7lX1BZoiYCjSzdxyQlTBORnLQxzhMA7wafdL2hKUYeas TTxbm7aJfBmajynPTDVsDeRNjIiLDfRWPorWF1XhZeabcc/427uwZVnpbQmSfjO/DpZXHv PppCAdTxmOLJtKAOtl3KhvDgDYEnogFVO3mYRylR2HJujyWB2uLeDI7Lujm5VyXS9/01cs EeqOSt1i5m46o97/U9Z7mena6Thb2YNKtuju4n93QeRUO2Ae38221rJeaIM9uzto1n3b66 +9JGdvbs2kotiP1XiZDpPy7RaFV5i+5uoOMNnOkbId6EdIQIkTYv2fvW9aX92A== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1660152160; a=rsa-sha256; cv=none; b=dWUr8AN8j01sZEuhh02UaYHCxOKbz5wVgNJHGMJoy026eJ8LTBx6ef18qBkbwfOkvmjK6R Eo3HaGkbk1f/Pc4f/LA+nsXzj1jNcapUPKkuhDZXqtvvl6LSuR2SJWLaZddVMSepW+cMKw bimvo+5i/r0n25LTC6QHwwKqv0HODHTJjaxXZcZ2GY8ptxZ/AuamwUfRWxDbNyti0CCQor i4q3h6XrIq1FKabAP/DestjGPvS4bKokJYsY7rL2c9Ym4eRaVJ+gqvkwRBIOcZ6RyyBMQL PvmLRLLBmpipihUk5cthPh5+0gLj/si3/gIp7H0TMK5NBmhJuSN+YTV6rNfDog== ARC-Authentication-Results: i=1; mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by manu: URL: https://cgit.FreeBSD.org/src/commit/?id=87f642ac03e3cefea7048cb46b17810d01e97dd5 commit 87f642ac03e3cefea7048cb46b17810d01e97dd5 Author: Emmanuel Vadot AuthorDate: 2021-09-22 14:55:54 +0000 Commit: Emmanuel Vadot CommitDate: 2022-08-10 17:22:31 +0000 arm64: rockchip: rk_gpio: Improve mode switching Changing mode on a pin (input/output/pullup/pulldown) is a bit slow. Improve this by caching what we can. We need to check if the pin is in gpio mode, do that the first time that we have a request for this pin and cache the result. We can't do that at attach as we are a child of rk_pinctrl and it didn't finished its attach then. Cache also the flags specific to the pinctrl (pullup or pulldown) if the pin is in input mode. Cache the registers that deals with input/output mode and output value. Also remove some register reads when we change the direction of a pin or when we change the output value since the bit changed in the registers only affect output pins. --- sys/arm64/rockchip/rk_gpio.c | 94 ++++++++++++++++++++++++++------------------ 1 file changed, 55 insertions(+), 39 deletions(-) diff --git a/sys/arm64/rockchip/rk_gpio.c b/sys/arm64/rockchip/rk_gpio.c index b695797f153e..46df1faee419 100644 --- a/sys/arm64/rockchip/rk_gpio.c +++ b/sys/arm64/rockchip/rk_gpio.c @@ -73,6 +73,14 @@ __FBSDID("$FreeBSD$"); #define RK_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \ GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN) +#define GPIO_FLAGS_PINCTRL GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN +#define RK_GPIO_MAX_PINS 32 + +struct pin_cached { + uint8_t is_gpio; + uint32_t flags; +}; + struct rk_gpio_softc { device_t sc_dev; device_t sc_busdev; @@ -82,6 +90,9 @@ struct rk_gpio_softc { bus_space_handle_t sc_bsh; clk_t clk; device_t pinctrl; + uint32_t swporta; + uint32_t swporta_ddr; + struct pin_cached pin_cached[RK_GPIO_MAX_PINS]; }; static struct ofw_compat_data compat_data[] = { @@ -125,7 +136,7 @@ rk_gpio_attach(device_t dev) { struct rk_gpio_softc *sc; phandle_t node; - int err; + int err, i; sc = device_get_softc(dev); sc->sc_dev = dev; @@ -166,6 +177,15 @@ rk_gpio_attach(device_t dev) return (ENXIO); } + /* Set the cached value to unknown */ + for (i = 0; i < RK_GPIO_MAX_PINS; i++) + sc->pin_cached[i].is_gpio = 2; + + RK_GPIO_LOCK(sc); + sc->swporta = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DR); + sc->swporta_ddr = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR); + RK_GPIO_UNLOCK(sc); + return (0); } @@ -229,28 +249,25 @@ static int rk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) { struct rk_gpio_softc *sc; - uint32_t reg; int rv; - bool is_gpio; sc = device_get_softc(dev); - rv = FDT_PINCTRL_IS_GPIO(sc->pinctrl, dev, pin, &is_gpio); - if (rv != 0) - return (rv); - if (!is_gpio) - return (EINVAL); + if (__predict_false(sc->pin_cached[pin].is_gpio != 1)) { + rv = FDT_PINCTRL_IS_GPIO(sc->pinctrl, dev, pin, (bool *)&sc->pin_cached[pin].is_gpio); + if (rv != 0) + return (rv); + if (sc->pin_cached[pin].is_gpio == 0) + return (EINVAL); + } *flags = 0; rv = FDT_PINCTRL_GET_FLAGS(sc->pinctrl, dev, pin, flags); if (rv != 0) return (rv); + sc->pin_cached[pin].flags = *flags; - RK_GPIO_LOCK(sc); - reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR); - RK_GPIO_UNLOCK(sc); - - if (reg & (1 << pin)) + if (sc->swporta_ddr & (1 << pin)) *flags |= GPIO_PIN_OUTPUT; else *flags |= GPIO_PIN_INPUT; @@ -270,31 +287,32 @@ static int rk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) { struct rk_gpio_softc *sc; - uint32_t reg; int rv; - bool is_gpio; sc = device_get_softc(dev); - rv = FDT_PINCTRL_IS_GPIO(sc->pinctrl, dev, pin, &is_gpio); - if (rv != 0) - return (rv); - if (!is_gpio) - return (EINVAL); + if (__predict_false(sc->pin_cached[pin].is_gpio != 1)) { + rv = FDT_PINCTRL_IS_GPIO(sc->pinctrl, dev, pin, (bool *)&sc->pin_cached[pin].is_gpio); + if (rv != 0) + return (rv); + if (sc->pin_cached[pin].is_gpio == 0) + return (EINVAL); + } - rv = FDT_PINCTRL_SET_FLAGS(sc->pinctrl, dev, pin, flags); - if (rv != 0) - return (rv); + if (__predict_false((flags & GPIO_PIN_INPUT) && ((flags & GPIO_FLAGS_PINCTRL) != sc->pin_cached[pin].flags))) { + rv = FDT_PINCTRL_SET_FLAGS(sc->pinctrl, dev, pin, flags); + sc->pin_cached[pin].flags = flags & GPIO_FLAGS_PINCTRL; + if (rv != 0) + return (rv); + } RK_GPIO_LOCK(sc); - - reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR); if (flags & GPIO_PIN_INPUT) - reg &= ~(1 << pin); + sc->swporta_ddr &= ~(1 << pin); else if (flags & GPIO_PIN_OUTPUT) - reg |= (1 << pin); + sc->swporta_ddr |= (1 << pin); - RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DDR, reg); + RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DDR, sc->swporta_ddr); RK_GPIO_UNLOCK(sc); return (0); @@ -321,17 +339,15 @@ static int rk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) { struct rk_gpio_softc *sc; - uint32_t reg; sc = device_get_softc(dev); RK_GPIO_LOCK(sc); - reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DR); if (value) - reg |= (1 << pin); + sc->swporta |= (1 << pin); else - reg &= ~(1 << pin); - RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DR, reg); + sc->swporta &= ~(1 << pin); + RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DR, sc->swporta); RK_GPIO_UNLOCK(sc); return (0); @@ -341,17 +357,15 @@ static int rk_gpio_pin_toggle(device_t dev, uint32_t pin) { struct rk_gpio_softc *sc; - uint32_t reg; sc = device_get_softc(dev); RK_GPIO_LOCK(sc); - reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DR); - if (reg & (1 << pin)) - reg &= ~(1 << pin); + if (sc->swporta & (1 << pin)) + sc->swporta &= ~(1 << pin); else - reg |= (1 << pin); - RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DR, reg); + sc->swporta |= (1 << pin); + RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DR, sc->swporta); RK_GPIO_UNLOCK(sc); return (0); @@ -370,6 +384,7 @@ rk_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins, reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DR); if (orig_pins) *orig_pins = reg; + sc->swporta = reg; if ((clear_pins | change_pins) != 0) { reg = (reg & ~clear_pins) ^ change_pins; @@ -410,6 +425,7 @@ rk_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins, reg &= ~mask; reg |= set; RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DDR, reg); + sc->swporta_ddr = reg; RK_GPIO_UNLOCK(sc); return (0);