git: 1fdced911989 - stable/14 - ig4: Add support for Lunar Lake-M I2C
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Date: Thu, 24 Sep 2026 02:34:03 UTC
The branch stable/14 has been updated by vexeduxr:
URL: https://cgit.FreeBSD.org/src/commit/?id=1fdced9119897f60fe0c942bd4109b8add50497d
commit 1fdced9119897f60fe0c942bd4109b8add50497d
Author: Defenso-EBO <etienne.bonnand@defenso.fr>
AuthorDate: 2026-01-29 09:47:13 +0000
Commit: Ahmad Khalifa <vexeduxr@FreeBSD.org>
CommitDate: 2026-09-24 02:29:31 +0000
ig4: Add support for Lunar Lake-M I2C
this patch adds PCI IDs to the ig4(4) driver:
- Lunar Lake-M (0xa878, 0xa879, 0xa87a, 0xa87b)
These controllers use the Tiger Lake hardware revision of the I2C IP.
Adding these IDs enables support for peripherals connected to the I2C Bus.
Tested on: Intel Lunar Lake (LENOVO_MT_21QX_BU_Think_FM_ThinkPad T14s Gen 6)
Signed-off-by: Defenso-EBO <etienne.bonnand@defenso.fr>
MFC after: 2 weeks
Sponsored by: Defenso
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1995
(cherry picked from commit 851dffef532ad9611fcaf02318744c8de9f397b0)
---
sys/dev/ichiic/ig4_pci.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/sys/dev/ichiic/ig4_pci.c b/sys/dev/ichiic/ig4_pci.c
index ec66ebb7aef8..b1562d3c5b5f 100644
--- a/sys/dev/ichiic/ig4_pci.c
+++ b/sys/dev/ichiic/ig4_pci.c
@@ -180,6 +180,10 @@ static int ig4iic_pci_detach(device_t dev);
#define PCI_CHIP_ARROWLAKE_U_I2C_3 0x777b8086
#define PCI_CHIP_ARROWLAKE_U_I2C_4 0x77508086
#define PCI_CHIP_ARROWLAKE_U_I2C_5 0x77518086
+#define PCI_CHIP_LUNARLAKE_M_I2C_0 0xa8788086
+#define PCI_CHIP_LUNARLAKE_M_I2C_1 0xa8798086
+#define PCI_CHIP_LUNARLAKE_M_I2C_2 0xa87a8086
+#define PCI_CHIP_LUNARLAKE_M_I2C_3 0xa87b8086
struct ig4iic_pci_device {
uint32_t devid;
@@ -304,6 +308,10 @@ static struct ig4iic_pci_device ig4iic_pci_devices[] = {
{ PCI_CHIP_ARROWLAKE_U_I2C_3, "Intel Arrow Lake-H/U I2C Controller-3", IG4_TIGERLAKE},
{ PCI_CHIP_ARROWLAKE_U_I2C_4, "Intel Arrow Lake-H/U I2C Controller-4", IG4_TIGERLAKE},
{ PCI_CHIP_ARROWLAKE_U_I2C_5, "Intel Arrow Lake-H/U I2C Controller-5", IG4_TIGERLAKE},
+ { PCI_CHIP_LUNARLAKE_M_I2C_0, "Intel Lunar Lake-M I2C Controller-0", IG4_TIGERLAKE},
+ { PCI_CHIP_LUNARLAKE_M_I2C_1, "Intel Lunar Lake-M I2C Controller-1", IG4_TIGERLAKE},
+ { PCI_CHIP_LUNARLAKE_M_I2C_2, "Intel Lunar Lake-M I2C Controller-2", IG4_TIGERLAKE},
+ { PCI_CHIP_LUNARLAKE_M_I2C_3, "Intel Lunar Lake-M I2C Controller-3", IG4_TIGERLAKE},
};
static int