From nobody Mon Oct 19 17:05:47 2026 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4j7hkz6sDBz6vfmN for ; Mon, 19 Oct 2026 17:05:47 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 4j7hkz67Myz4ZyK for ; Mon, 19 Oct 2026 17:05:47 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1792429547; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ZsfuBWbM5Xb6O4qX4kNY4HCK3FTFLOaheg+th8sQFtg=; b=PE+JIe+twkmY7l62kXhZwZbUecznyR6/yhn8He8aIHNUTvQB9gxbvYOi//0GFjkSwKd7fM cj0qXcAGckc3jsCsh4UL/VKqW37VveMzvb3O5V7zbEvKGVcIKFI6w37xooexDARIrcg6E6 jF0xXHvNepWeGLov/5IxoQDb7JYUPnIV9aQ7eS9FrfYF+5cB31VsvsiYzDqNRJ6NviUT5c kasUhwVMLAlz2agwyyd016F+bGLNY7KLc1l70oap3l5SfiwpgdtKg2jveQzleJYPhgFNhw OPJ7YTNV9P9TqnjxjLB58PdGop1Ww4ha2mIALWuCXdh0TI2zKDpsTiEfXC6wQg== ARC-Seal: i=1; a=rsa-sha256; d=freebsd.org; s=dkim; cv=none; t=1792429547; b=j7JEj4TL5d5fQB8hsvJ2y1rVNtW/1msC/aSCGj1aFVoWvh4HZEtQRiumSDAHpw/Qd8K3y3 t6fyjFeS+Y1J0PlBXMvJd1OKeBjPQr6CHT7Kk86Euiyo+ZVBz825DQxWWYQ6RXyyDxMArV rb+wzPgqL0K5LvSckZNh8uwIBrkS9Xl69NKdboN8yMH5NoRjRk/L7zoTvcGxjUsm1tLTfN 0rbnfW24b6V99/hhW5PM+FBQUfV+aa5v3nHzFc7AAx6LEC26qvgjuW/79y3Pc3eZrIU2ps KvydMo4FAcv4nToP6pEB2BFPYLkhABXYFjas8R9Jtp5mSXahCaoTtiy4BXnV/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1792429547; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ZsfuBWbM5Xb6O4qX4kNY4HCK3FTFLOaheg+th8sQFtg=; b=M6LYn4sZQcto0PaAWpHdHWHxIzK0UvxBerpHxvsu775T4LW7sZp0CB1TsOvAHqioO+/o0S 4tna1TqkBfVSVW3rAbflN9nIaQPh9D5ltE2ZhAqAbmUb0SG/McmYZ1rdc73EWuvjdw3oqn 4/Af9ORx5Y/WftXy7i8VHUXH/OhCKFW1YKb35SqkGpQWl+H3hjc9s++ThKK0e9w1KYsCWW oc+YKf4Dzxs/3XSIsMSpu6erBJGXzmabo+bj1UcLf16r13G+Hsj2d/fYOTuHdBSBWBNhNM kmYZMfXkXZZX0atC2qYVShkkwBLMYdeSassu/BN5kZ+yCV0fdJZ6Zwp0VVofqw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4j7hkz5DkLzTHC for ; Mon, 19 Oct 2026 17:05:47 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 202bc by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Mon, 19 Oct 2026 17:05:47 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Alan Cox Subject: git: 993f846e482a - stable/15 - arm64: Fix and rename midr_check_var_part_range() List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches X-BeenThere: dev-commits-src-branches@freebsd.org Sender: owner-dev-commits-src-branches@FreeBSD.org List-Id: Commits to the stable branches of the FreeBSD src repository List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: alc X-Git-Repository: src X-Git-Refname: refs/heads/stable/15 X-Git-Reftype: branch X-Git-Commit: 993f846e482a99085ee3507f03adea7b37dd7895 Auto-Submitted: auto-generated Date: Mon, 19 Oct 2026 17:05:47 +0000 Message-Id: <6ad64deb.202bc.74a0a23d@gitrepo.freebsd.org> The branch stable/15 has been updated by alc: URL: https://cgit.FreeBSD.org/src/commit/?id=993f846e482a99085ee3507f03adea7b37dd7895 commit 993f846e482a99085ee3507f03adea7b37dd7895 Author: Alan Cox AuthorDate: 2026-10-11 18:13:25 +0000 Commit: Alan Cox CommitDate: 2026-10-19 16:23:44 +0000 arm64: Fix and rename midr_check_var_part_range() At the lowest and highest variants in the specified range, midr_check_var_part_range() was comparing the part number, rather than the revision, against the bounds. In other words, the "Y" in "rXpY" should be compared to CPU_REV() instead of CPU_PART(). Apply this correction, and rename the function to midr_check_var_rev_range() to better reflect the field that we are checking. (cherry picked from commit 39d6e2226484ca434c7d980eda4aa19ed0d62c9e) --- sys/arm64/arm64/identcpu.c | 2 +- sys/arm64/arm64/pmap.c | 4 ++-- sys/arm64/include/cpu.h | 17 +++++++++++------ 3 files changed, 14 insertions(+), 9 deletions(-) diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c index c761be878d13..a03810d181e3 100644 --- a/sys/arm64/arm64/identcpu.c +++ b/sys/arm64/arm64/identcpu.c @@ -2287,7 +2287,7 @@ user_ctr_has_neoverse_n1_1542419(uint32_t midr, uint64_t ctr) * Present in r3p0 - r4p0 * Fixed in r4p1 */ - return (midr_check_var_part_range(midr, CPU_IMPL_ARM, + return (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_NEOVERSE_N1, 3, 0, 4, 0) && CTR_DIC_VAL(ctr) != 0); } diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c index 2124d41c2fe4..657ed4c445fa 100644 --- a/sys/arm64/arm64/pmap.c +++ b/sys/arm64/arm64/pmap.c @@ -1700,7 +1700,7 @@ pmap_dbm_has_errata(const struct cpu_feat *feat __unused, u_int midr, } /* Disable on Cortex-A510 for erratum 2051678 - r0p0 to r0p2 */ - if (midr_check_var_part_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, + if (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, 0, 0, 0, 2)) { static u_int errata_id = 2051678; @@ -1806,7 +1806,7 @@ pmap_multiple_tlbi_check(const struct cpu_feat *feat __unused, u_int midr) * Present in r0p0 - r1p1 * Fixed in r1p2 */ - if (midr_check_var_part_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, + if (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, 0, 0, 1, 1)) return (FEAT_DEFAULT_DISABLE); diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h index 9e452e001bbb..31a06d5d24be 100644 --- a/sys/arm64/include/cpu.h +++ b/sys/arm64/include/cpu.h @@ -198,9 +198,14 @@ ((mask) & CPU_ID_RAW((impl), (part), (var), (rev)))) #if !defined(__ASSEMBLER__) +/* + * Check whether midr identifies the given implementer and part at a product + * revision rXpY from r(var_low)p(rev_low) to r(var_high)p(rev_high) + * inclusive. X is MIDR_EL1.Variant, and Y is MIDR_EL1.Revision. + */ static inline bool -midr_check_var_part_range(u_int midr, u_int impl, u_int part, u_int var_low, - u_int part_low, u_int var_high, u_int part_high) +midr_check_var_rev_range(u_int midr, u_int impl, u_int part, u_int var_low, + u_int rev_low, u_int var_high, u_int rev_high) { /* Check for the correct part */ if (CPU_IMPL(midr) != impl || CPU_PART(midr) != part) @@ -210,12 +215,12 @@ midr_check_var_part_range(u_int midr, u_int impl, u_int part, u_int var_low, if (CPU_VAR(midr) < var_low || CPU_VAR(midr) > var_high) return (false); - /* If the variant is the low value, check if the part is high enough */ - if (CPU_VAR(midr) == var_low && CPU_PART(midr) < part_low) + /* If the variant is var_low, check if the revision is high enough */ + if (CPU_VAR(midr) == var_low && CPU_REV(midr) < rev_low) return (false); - /* If the variant is the high value, check if the part is low enough */ - if (CPU_VAR(midr) == var_high && CPU_PART(midr) > part_high) + /* If the variant is var_high, check if the revision is low enough */ + if (CPU_VAR(midr) == var_high && CPU_REV(midr) > rev_high) return (false); return (true);