From nobody Mon Oct 12 18:18:05 2026 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4j3Qgd4vWjz6jxBQ for ; Mon, 12 Oct 2026 18:18:05 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR2" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4j3Qgd4MLpz4d9l for ; Mon, 12 Oct 2026 18:18:05 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1791829085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=CUFmcNcKmvZOXhbG/Jc5qcMvsVFuopcpL8JSmWeJhLU=; b=Ayh1ubUUoNCBg9pimXhm9tXetV+WtqE/bWliTt15T7ZPCQUFau3OSZsGAvvuEHIA4/ilEW ElpRiSV6MtyJARPnTraYGdMpe+tI8dYPzI0l4o5M6o4iUWmK9DfYlskltH7oB5PvMh1dVU LCuuXmvX5A2e20vMxCFIxCQjqjSXPyoePVEff2ANKPl+rRefuOfWucS4D5BUzL0CPO6K7X Mp9gyJHfP2+hgxMRxP9R7RhRVN9xK1hXB/o2kS1Wp7GvJRQd5oPDeM0S42d5SWbocPIWfN 6W5RApgtGEwkoft0rvgrjTaX1Yn15iqPptwmLzFWBRTfkurOrwZNV1Zc99ke2w== ARC-Seal: i=1; a=rsa-sha256; d=freebsd.org; s=dkim; cv=none; t=1791829085; b=RhE+D0ITNZhgs9obtmNqL2KpZ38QepoovsboZsP9dEt/18HnGMgDw5oECwE0cwqhd9dB2M iVn2TFyPJ248JuGqUFobJCYlSej5PopGwEmR+C+mEtxlEvnZMbf5w3cEd0MLU8OnV3uC/V JW9jaB9jROo5GlBKwTJMHxSe9IwRn1OVLutQGUbQ63gSqlrpfbl1xTEiRpgHcm9DLb6Mkw psGz5UJet6sxXAfQvwsR2sGZ9/R1KzSKned9Za5i9Pqar5B4Y5FHRdEhrJ0QqAvGXJtUsO Z1+Yrcto3qvHJskkJxehyuiNrNPmtocn34fMW3F64brECJnEjn1Z3E4Sm9Zp6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1791829085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=CUFmcNcKmvZOXhbG/Jc5qcMvsVFuopcpL8JSmWeJhLU=; b=ZgyV1TSm0XPhSPSYwt0PXaxERyynDKQz0qh3tbdWBa0W5amUP8zuna5+zrG6/j7burn8xU ztXCy5dQ7Yssp53AVsCA4kDvnC8taMy8dV0SFMv/9iQ62ev+G38YjSAib1DwukcW7D9CYO Xb/56ogsYy0KangoI1U+L2sO2iZH2vGU8LqNQ+urNWs8LAjcEfslMBVFceaHeBEfBDJTUf +adD3NVawbQ1nraw79AspFxwPhWshV7GElubwaXPLpeTWnpnBHV8ic24PITjbeMXthIwIW kjw09PKTgghkjMxpb9JFiiEidRSOvd3U7JETboClCpVTlbX+gFREjhlkyx/JGQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4j3Qgd2mTyzfpY for ; Mon, 12 Oct 2026 18:18:05 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 33b7b by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Mon, 12 Oct 2026 18:18:05 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Piotr Kubaj Subject: git: 61afe54265dc - stable/15 - powerpc: keep FP, VMX and VSX ownership changes atomic with preemption List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches X-BeenThere: dev-commits-src-branches@freebsd.org Sender: owner-dev-commits-src-branches@FreeBSD.org List-Id: Commits to the stable branches of the FreeBSD src repository List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: pkubaj X-Git-Repository: src X-Git-Refname: refs/heads/stable/15 X-Git-Reftype: branch X-Git-Commit: 61afe54265dc757b42cd37d9146f4cd65d543bd4 Auto-Submitted: auto-generated Date: Mon, 12 Oct 2026 18:18:05 +0000 Message-Id: <6acd245d.33b7b.79df12c@gitrepo.freebsd.org> The branch stable/15 has been updated by pkubaj: URL: https://cgit.FreeBSD.org/src/commit/?id=61afe54265dc757b42cd37d9146f4cd65d543bd4 commit 61afe54265dc757b42cd37d9146f4cd65d543bd4 Author: Piotr Kubaj AuthorDate: 2026-09-21 12:48:06 +0000 Commit: Piotr Kubaj CommitDate: 2026-10-12 17:51:26 +0000 powerpc: keep FP, VMX and VSX ownership changes atomic with preemption trap() and set_mcontext() change the FP/VMX/VSX ownership state in several steps with preemption enabled. A context switch in between leaves the thread computing with another thread's register contents: - enable_fpu()/enable_vec() set PCB_FPU/PCB_VEC before loading the registers, so a switch mid-load saves a half-loaded unit over the PCB. - set_mcontext() clears the frame's MSR bits and then the PCB flags; a switch in between re-enables the unit, and the thread returns to user space with it enabled but not owned, so it is neither saved nor restored until the next signal. Both paths run after every sigreturn(2), setcontext(2) and swapcontext(3). A POWER9 test that keeps f14-f31 live across a signal, with other threads using the FPU on the same CPU, saw 283 corrupted round trips out of 882000; none after this change. Hold a critical section around both, as amd64 and arm64 do. Reviewed by: jhibbits MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D60054 (cherry picked from commit 1f1043d550ea2b8282e692019f17a88896212a76) --- sys/powerpc/powerpc/exec_machdep.c | 8 +++++++- sys/powerpc/powerpc/trap.c | 6 ++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/sys/powerpc/powerpc/exec_machdep.c b/sys/powerpc/powerpc/exec_machdep.c index 4df70feb31bc..390181012b92 100644 --- a/sys/powerpc/powerpc/exec_machdep.c +++ b/sys/powerpc/powerpc/exec_machdep.c @@ -522,7 +522,14 @@ set_mcontext(struct thread *td, mcontext_t *mcp) * * Additionally, ensure VSX is disabled as well, as it is illegal * to leave it turned on when FP or VEC are off. + * + * The MSR bits in the frame and the PCB flags must change together: + * if the thread is switched out in between, cpu_switchin() still + * sees the flags, reloads the registers and puts the MSR bits back + * into the frame, and the thread then runs with the units enabled + * but without owning them. */ + critical_enter(); tf->srr1 &= ~(PSL_FP | PSL_VSX | PSL_VEC); pcb->pcb_flags &= ~(PCB_FPU | PCB_VSX | PCB_VEC); @@ -536,7 +543,6 @@ set_mcontext(struct thread *td, mcontext_t *mcp) * sigresume is callled will used by the resumed thread, instead of the * previously saved data from the mcontext. */ - critical_enter(); msr = mfmsr() & ~(PSL_FP | PSL_VSX | PSL_VEC); isync(); mtmsr(msr); diff --git a/sys/powerpc/powerpc/trap.c b/sys/powerpc/powerpc/trap.c index 203d270a504b..61caaac63e8d 100644 --- a/sys/powerpc/powerpc/trap.c +++ b/sys/powerpc/powerpc/trap.c @@ -294,24 +294,30 @@ trap(struct trapframe *frame) case EXC_FPU: KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU, ("FPU already enabled for thread")); + critical_enter(); enable_fpu(td); + critical_exit(); break; case EXC_VEC: KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC, ("Altivec already enabled for thread")); + critical_enter(); enable_vec(td); + critical_exit(); break; case EXC_VSX: KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX, ("VSX already enabled for thread")); + critical_enter(); if (!(td->td_pcb->pcb_flags & PCB_VEC)) enable_vec(td); if (td->td_pcb->pcb_flags & PCB_FPU) save_fpu(td); td->td_pcb->pcb_flags |= PCB_VSX; enable_fpu(td); + critical_exit(); break; case EXC_FAC: