git: 9fb993778d3f - stable/15 - cxgbe(4): Add support for port types SFP56 and QSFP56 and speed 200Gbps
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Date: Fri, 03 Oct 2025 00:04:37 UTC
The branch stable/15 has been updated by np:
URL: https://cgit.FreeBSD.org/src/commit/?id=9fb993778d3fc37eacdec14f5d987f3d43b25896
commit 9fb993778d3fc37eacdec14f5d987f3d43b25896
Author: Navdeep Parhar <np@FreeBSD.org>
AuthorDate: 2025-09-29 14:20:07 +0000
Commit: Navdeep Parhar <np@FreeBSD.org>
CommitDate: 2025-10-02 22:09:06 +0000
cxgbe(4): Add support for port types SFP56 and QSFP56 and speed 200Gbps
This enables the 2x200/100/40Gbps and 4x50/25/10/1Gbps boards.
Sponsored by: Chelsio Communications
(cherry picked from commit a02f38ccedc2c648d57fb6e575723b0b31b67ea0)
---
sys/dev/cxgbe/t4_main.c | 23 ++++++++++++++++-------
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index 0ad162cf2231..e9cb56562abe 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -557,6 +557,9 @@ static int t4_fec = -1;
SYSCTL_INT(_hw_cxgbe, OID_AUTO, fec, CTLFLAG_RDTUN, &t4_fec, 0,
"Forward Error Correction (bit 0 = RS, bit 1 = BASER_RS)");
+static const char *
+t4_fec_bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD1\5RSVD2\6auto\7module";
+
/*
* Controls when the driver sets the FORCE_FEC bit in the L1_CFG32 that it
* issues to the firmware. If the firmware doesn't support FORCE_FEC then the
@@ -3637,6 +3640,8 @@ port_mword(struct port_info *pi, uint32_t speed)
case FW_PORT_TYPE_CR_QSFP:
case FW_PORT_TYPE_CR2_QSFP:
case FW_PORT_TYPE_SFP28:
+ case FW_PORT_TYPE_SFP56:
+ case FW_PORT_TYPE_QSFP56:
/* Pluggable transceiver */
switch (pi->mod_type) {
case FW_PORT_MOD_TYPE_LR:
@@ -3654,6 +3659,8 @@ port_mword(struct port_info *pi, uint32_t speed)
return (IFM_50G_LR2);
case FW_PORT_CAP32_SPEED_100G:
return (IFM_100G_LR4);
+ case FW_PORT_CAP32_SPEED_200G:
+ return (IFM_200G_LR4);
}
break;
case FW_PORT_MOD_TYPE_SR:
@@ -3670,6 +3677,8 @@ port_mword(struct port_info *pi, uint32_t speed)
return (IFM_50G_SR2);
case FW_PORT_CAP32_SPEED_100G:
return (IFM_100G_SR4);
+ case FW_PORT_CAP32_SPEED_200G:
+ return (IFM_200G_SR4);
}
break;
case FW_PORT_MOD_TYPE_ER:
@@ -3691,6 +3700,8 @@ port_mword(struct port_info *pi, uint32_t speed)
return (IFM_50G_CR2);
case FW_PORT_CAP32_SPEED_100G:
return (IFM_100G_CR4);
+ case FW_PORT_CAP32_SPEED_200G:
+ return (IFM_200G_CR4_PAM4);
}
break;
case FW_PORT_MOD_TYPE_LRM:
@@ -3700,6 +3711,8 @@ port_mword(struct port_info *pi, uint32_t speed)
case FW_PORT_MOD_TYPE_DR:
if (speed == FW_PORT_CAP32_SPEED_100G)
return (IFM_100G_DR);
+ if (speed == FW_PORT_CAP32_SPEED_200G)
+ return (IFM_200G_DR4);
break;
case FW_PORT_MOD_TYPE_NA:
MPASS(0); /* Not pluggable? */
@@ -8932,13 +8945,12 @@ sysctl_link_fec(SYSCTL_HANDLER_ARGS)
struct link_config *lc = &pi->link_cfg;
int rc;
struct sbuf *sb;
- static char *bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD1\5RSVD2";
sb = sbuf_new_for_sysctl(NULL, NULL, 128, req);
if (sb == NULL)
return (ENOMEM);
if (lc->link_ok)
- sbuf_printf(sb, "%b", lc->fec, bits);
+ sbuf_printf(sb, "%b", lc->fec, t4_fec_bits);
else
sbuf_printf(sb, "no link");
rc = sbuf_finish(sb);
@@ -8958,14 +8970,12 @@ sysctl_requested_fec(SYSCTL_HANDLER_ARGS)
if (req->newptr == NULL) {
struct sbuf *sb;
- static char *bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD2"
- "\5RSVD3\6auto\7module";
sb = sbuf_new_for_sysctl(NULL, NULL, 128, req);
if (sb == NULL)
return (ENOMEM);
- sbuf_printf(sb, "%b", lc->requested_fec, bits);
+ sbuf_printf(sb, "%b", lc->requested_fec, t4_fec_bits);
rc = sbuf_finish(sb);
sbuf_delete(sb);
} else {
@@ -9034,7 +9044,6 @@ sysctl_module_fec(SYSCTL_HANDLER_ARGS)
int rc;
int8_t fec;
struct sbuf *sb;
- static char *bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD2\5RSVD3";
sb = sbuf_new_for_sysctl(NULL, NULL, 128, req);
if (sb == NULL)
@@ -9068,7 +9077,7 @@ sysctl_module_fec(SYSCTL_HANDLER_ARGS)
if (fec == 0)
fec = FEC_NONE;
PORT_UNLOCK(pi);
- sbuf_printf(sb, "%b", fec & M_FW_PORT_CAP32_FEC, bits);
+ sbuf_printf(sb, "%b", fec & M_FW_PORT_CAP32_FEC, t4_fec_bits);
}
rc = sbuf_finish(sb);
done: