git: c8b9ecc1a57d - stable/13 - x86: Add Intel TD/HFI related MSR/CPUID defines to specialregs.h

The branch stable/13 has been updated by kib:

URL: https://cgit.FreeBSD.org/src/commit/?id=c8b9ecc1a57d20d49a174157f234cd26379d5a53

commit c8b9ecc1a57d20d49a174157f234cd26379d5a53
Author:     Koine Yuusuke <koinec@yahoo.co.jp>
AuthorDate: 2024-05-06 02:17:29 +0000
Commit:     Konstantin Belousov <kib@FreeBSD.org>
CommitDate: 2024-05-21 02:46:58 +0000

    x86: Add Intel TD/HFI related MSR/CPUID defines to specialregs.h
    
    (cherry picked from commit 338d53965d9f4bfb1a83c1bcff3ff78944ce3a9f)
---
 sys/x86/include/specialreg.h | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h
index 4886430c84b6..f78e04c714f0 100644
--- a/sys/x86/include/specialreg.h
+++ b/sys/x86/include/specialreg.h
@@ -347,6 +347,13 @@
 /* Ecx. */
 #define	CPUID_PERF_STAT			0x00000001
 #define	CPUID_PERF_BIAS			0x00000008
+#define	CPUID_PERF_TD_CLASSES		0x0000ff00
+
+/* Edx. */
+#define	CPUID_HF_PERFORMANCE		0x00000001
+#define	CPUID_HF_EFFICIENCY		0x00000002
+#define	CPUID_TD_CAPABLITIES		0x0000000f
+#define	CPUID_TD_TBLPAGES		0x00000f00
 
 /* 
  * CPUID instruction 0xb ebx info.
@@ -585,6 +592,8 @@
 #define	MSR_TURBO_RATIO_LIMIT	0x1ad
 #define	MSR_TURBO_RATIO_LIMIT1	0x1ae
 #define	MSR_IA32_ENERGY_PERF_BIAS	0x1b0
+#define	MSR_IA32_PKG_THERM_STATUS	0x1b1
+#define	MSR_IA32_PKG_THERM_INTERRUPT	0x1b2
 #define	MSR_DEBUGCTLMSR		0x1d9
 #define	MSR_LASTBRANCHFROMIP	0x1db
 #define	MSR_LASTBRANCHTOIP	0x1dc
@@ -768,6 +777,14 @@
 #define	TOPA_INT	(1 << 2)
 #define	TOPA_END	(1 << 0)
 
+/*
+ *  Intel Hardware Feedback Interface / Thread Director MSRs
+ */
+#define	MSR_IA32_HW_FEEDBACK_PTR		0x17d0
+#define	MSR_IA32_HW_FEEDBACK_CONFIG		0x17d1
+#define	MSR_IA32_THREAD_FEEDBACK_CHAR		0x17d2
+#define	MSR_IA32_HW_FEEDBACK_THREAD_CONFIG	0x17d4
+
 /*
  * Constants related to MSR's.
  */
@@ -838,6 +855,19 @@
 /* MSR IA32_ENERGY_PERF_BIAS */
 #define	IA32_ENERGY_PERF_BIAS_POLICY_HINT_MASK		(0xfULL << 0)
 
+/* MSR IA32_HW_FEEDBACK_PTR */
+#define	IA32_HW_FEEDBACK_PTR_ENABLE			(0x1ULL << 0)
+
+/* MSR IA32_HW_FEEDBACK_CONFIG */
+#define	IA32_HW_FEEDBACK_CONFIG_EN_HFI			(0x1ULL << 0)
+#define	IA32_HW_FEEDBACK_CONFIG_EN_THDIR		(0x1ULL << 1)
+
+/* MSR IA32_PKG_THERM_STATUS */
+#define	IA32_PKG_THERM_STATUS_HFI_UPDATED		(0x1ULL << 26)
+
+/* MSR IA32_PKG_THERM_INTERRUPT */
+#define	IA32_PKG_THERM_INTERRUPT_HFI_ENABLE		(0x1ULL << 25)
+
 /*
  * PAT modes.
  */