git: 7f352c7d5f09 - stable/14 - bnxt_en: Firmware header version update to 1.10.3.42
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Date: Mon, 03 Jun 2024 19:25:05 UTC
The branch stable/14 has been updated by imp:
URL: https://cgit.FreeBSD.org/src/commit/?id=7f352c7d5f0945c17a5f507285e3eaf891b668e4
commit 7f352c7d5f0945c17a5f507285e3eaf891b668e4
Author: Chandrakanth patil <chandrakanth.patil@broadcom.com>
AuthorDate: 2024-04-27 18:23:05 +0000
Commit: Warner Losh <imp@FreeBSD.org>
CommitDate: 2024-06-03 19:23:14 +0000
bnxt_en: Firmware header version update to 1.10.3.42
This file is automatically generated from the firmware code to
export the driver interfaces.
Reviewed by: imp
Approved by: imp
Differential revision: https://reviews.freebsd.org/D45009
(cherry picked from commit 3d8bbe001115f3e9742c128716335e654729ce1a)
---
sys/dev/bnxt/bnxt_en/bnxt.h | 2 +-
sys/dev/bnxt/bnxt_en/hsi_struct_def.h | 69997 +++++++++++++++++++-------------
2 files changed, 41564 insertions(+), 28435 deletions(-)
diff --git a/sys/dev/bnxt/bnxt_en/bnxt.h b/sys/dev/bnxt/bnxt_en/bnxt.h
index 2faea00e4266..cf4f99077b58 100644
--- a/sys/dev/bnxt/bnxt_en/bnxt.h
+++ b/sys/dev/bnxt/bnxt_en/bnxt.h
@@ -771,7 +771,7 @@ struct bnxt_ctx_mem_type {
#define BNXT_CTX_CQDBS HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_CQ_DB_SHADOW
#define BNXT_CTX_QTKC HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_QUIC_TKC
#define BNXT_CTX_QRKC HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_QUIC_RKC
-#define BNXT_CTX_MAX (BNXT_CTX_QRKC + 1)
+#define BNXT_CTX_MAX (BNXT_CTX_TIM + 1)
struct bnxt_ctx_mem_info {
u8 tqm_fp_rings_count;
diff --git a/sys/dev/bnxt/bnxt_en/hsi_struct_def.h b/sys/dev/bnxt/bnxt_en/hsi_struct_def.h
index 4aec765e1b26..baecfc8f659c 100644
--- a/sys/dev/bnxt/bnxt_en/hsi_struct_def.h
+++ b/sys/dev/bnxt/bnxt_en/hsi_struct_def.h
@@ -1,7 +1,7 @@
/*-
* BSD LICENSE
*
- * Copyright (c) 2016 Broadcom, All Rights Reserved.
+ * Copyright (c) 2024 Broadcom, All Rights Reserved.
* The term Broadcom refers to Broadcom Limited and/or its subsidiaries
*
* Redistribution and use in source and binary forms, with or without
@@ -31,7 +31,7 @@
__FBSDID("$FreeBSD$");
/*
- * Copyright(c) 2001-2023, Broadcom. All rights reserved. The
+ * Copyright(c) 2001-2024, Broadcom. All rights reserved. The
* term Broadcom refers to Broadcom Inc. and/or its subsidiaries.
* Proprietary and Confidential Information.
*
@@ -45,6 +45,10 @@ __FBSDID("$FreeBSD$");
#ifndef _HSI_STRUCT_DEF_H_
#define _HSI_STRUCT_DEF_H_
+#if defined(HAVE_STDINT_H)
+#include <stdint.h>
+#endif
+
/* This is the HWRM command header. */
/* hwrm_cmd_hdr (size:128b/16B) */
@@ -76,7 +80,7 @@ typedef struct hwrm_cmd_hdr {
* physical address (HPA) or a guest physical address (GPA) and must
* point to a physically contiguous block of memory.
*/
- uint64_t resp_addr;
+ uint64_t resp_addr;
} hwrm_cmd_hdr_t, *phwrm_cmd_hdr_t;
/* This is the HWRM response header. */
@@ -111,6 +115,10 @@ typedef struct hwrm_resp_hdr {
#define TLV_TYPE_QUERY_ROCE_CC_GEN1 UINT32_C(0x4)
/* RoCE slow path command to modify CC Gen1 support. */
#define TLV_TYPE_MODIFY_ROCE_CC_GEN1 UINT32_C(0x5)
+/* RoCE slow path command to query CC Gen2 support. */
+#define TLV_TYPE_QUERY_ROCE_CC_GEN2 UINT32_C(0x6)
+/* RoCE slow path command to modify CC Gen2 support. */
+#define TLV_TYPE_MODIFY_ROCE_CC_GEN2 UINT32_C(0x7)
/* Engine CKV - The Alias key EC curve and ECC public key information. */
#define TLV_TYPE_ENGINE_CKV_ALIAS_ECC_PUBLIC_KEY UINT32_C(0x8001)
/* Engine CKV - Initialization vector. */
@@ -193,14 +201,14 @@ typedef struct tlv {
typedef struct input {
/*
- * This value indicates what type of request this is. The format
+ * This value indicates what type of request this is. The format
* for the rest of the command is determined by this field.
*/
uint16_t req_type;
/*
* This value indicates the what completion ring the request will
- * be optionally completed on. If the value is -1, then no
- * CR completion will be generated. Any other value must be a
+ * be optionally completed on. If the value is -1, then no
+ * CR completion will be generated. Any other value must be a
* valid CR ring_id value for this function.
*/
uint16_t cmpl_ring;
@@ -216,7 +224,7 @@ typedef struct input {
uint16_t target_id;
/*
* This is the host address where the response will be written
- * when the request is complete. This area must be 16B aligned
+ * when the request is complete. This area must be 16B aligned
* and must be cleared to zero before the request is made.
*/
uint64_t resp_addr;
@@ -238,7 +246,7 @@ typedef struct output {
/* This field provides original sequence number of the command. */
uint16_t seq_id;
/*
- * This field is the length of the response in bytes. The
+ * This field is the length of the response in bytes. The
* last byte of the response is a valid flag that will read
* as '1' when the command has been completely written to
* memory.
@@ -374,6 +382,14 @@ typedef struct hwrm_short_input {
((x) == 0x85 ? "HWRM_QUEUE_VLANPRI2PRI_CFG": \
((x) == 0x86 ? "HWRM_QUEUE_GLOBAL_CFG": \
((x) == 0x87 ? "HWRM_QUEUE_GLOBAL_QCFG": \
+ ((x) == 0x88 ? "HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_QCFG": \
+ ((x) == 0x89 ? "HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_CFG": \
+ ((x) == 0x8a ? "HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_QCFG": \
+ ((x) == 0x8b ? "HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_CFG": \
+ ((x) == 0x8c ? "HWRM_QUEUE_QCAPS": \
+ ((x) == 0x8d ? "HWRM_QUEUE_ADPTV_QOS_RX_TUNING_QCFG": \
+ ((x) == 0x8e ? "HWRM_QUEUE_ADPTV_QOS_RX_TUNING_CFG": \
+ ((x) == 0x8f ? "HWRM_QUEUE_ADPTV_QOS_TX_TUNING_QCFG": \
((x) == 0x90 ? "HWRM_CFA_L2_FILTER_ALLOC": \
((x) == 0x91 ? "HWRM_CFA_L2_FILTER_FREE": \
((x) == 0x92 ? "HWRM_CFA_L2_FILTER_CFG": \
@@ -392,6 +408,7 @@ typedef struct hwrm_short_input {
((x) == 0xa0 ? "HWRM_TUNNEL_DST_PORT_QUERY": \
((x) == 0xa1 ? "HWRM_TUNNEL_DST_PORT_ALLOC": \
((x) == 0xa2 ? "HWRM_TUNNEL_DST_PORT_FREE": \
+ ((x) == 0xa3 ? "HWRM_QUEUE_ADPTV_QOS_TX_TUNING_CFG": \
((x) == 0xaf ? "HWRM_STAT_CTX_ENG_QUERY": \
((x) == 0xb0 ? "HWRM_STAT_CTX_ALLOC": \
((x) == 0xb1 ? "HWRM_STAT_CTX_FREE": \
@@ -439,6 +456,7 @@ typedef struct hwrm_short_input {
((x) == 0xdb ? "HWRM_PORT_EP_TX_CFG": \
((x) == 0xdc ? "HWRM_PORT_CFG": \
((x) == 0xdd ? "HWRM_PORT_QCFG": \
+ ((x) == 0xdf ? "HWRM_PORT_MAC_QCAPS": \
((x) == 0xe0 ? "HWRM_TEMP_MONITOR_QUERY": \
((x) == 0xe1 ? "HWRM_REG_POWER_QUERY": \
((x) == 0xe2 ? "HWRM_CORE_FREQUENCY_QUERY": \
@@ -456,7 +474,7 @@ typedef struct hwrm_short_input {
((x) == 0xfa ? "HWRM_CFA_METER_INSTANCE_CFG": \
((x) == 0xfd ? "HWRM_CFA_VFR_ALLOC": \
((x) == 0xfe ? "HWRM_CFA_VFR_FREE": \
- "Unknown decode" )))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) : \
+ "Unknown decode" )))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) : \
(((x) < 0x180) ? \
((x) == 0x100 ? "HWRM_CFA_VF_PAIR_ALLOC": \
((x) == 0x101 ? "HWRM_CFA_VF_PAIR_FREE": \
@@ -500,6 +518,7 @@ typedef struct hwrm_short_input {
((x) == 0x127 ? "HWRM_CFA_LAG_GROUP_MEMBER_UNRGTR": \
((x) == 0x128 ? "HWRM_CFA_TLS_FILTER_ALLOC": \
((x) == 0x129 ? "HWRM_CFA_TLS_FILTER_FREE": \
+ ((x) == 0x12a ? "HWRM_CFA_RELEASE_AFM_FUNC": \
((x) == 0x12e ? "HWRM_ENGINE_CKV_STATUS": \
((x) == 0x12f ? "HWRM_ENGINE_CKV_CKEK_ADD": \
((x) == 0x130 ? "HWRM_ENGINE_CKV_CKEK_DELETE": \
@@ -539,7 +558,7 @@ typedef struct hwrm_short_input {
((x) == 0x163 ? "HWRM_ENGINE_NQ_FREE": \
((x) == 0x164 ? "HWRM_ENGINE_ON_DIE_RQE_CREDITS": \
((x) == 0x165 ? "HWRM_ENGINE_FUNC_QCFG": \
- "Unknown decode" ))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) : \
+ "Unknown decode" )))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) : \
(((x) < 0x200) ? \
((x) == 0x190 ? "HWRM_FUNC_RESOURCE_QCAPS": \
((x) == 0x191 ? "HWRM_FUNC_VF_RESOURCE_CFG": \
@@ -570,7 +589,14 @@ typedef struct hwrm_short_input {
((x) == 0x1aa ? "HWRM_FUNC_DBR_RECOVERY_COMPLETED": \
((x) == 0x1ab ? "HWRM_FUNC_SYNCE_CFG": \
((x) == 0x1ac ? "HWRM_FUNC_SYNCE_QCFG": \
- "Unknown decode" ))))))))))))))))))))))))))))) : \
+ ((x) == 0x1ad ? "HWRM_FUNC_KEY_CTX_FREE": \
+ ((x) == 0x1ae ? "HWRM_FUNC_LAG_MODE_CFG": \
+ ((x) == 0x1af ? "HWRM_FUNC_LAG_MODE_QCFG": \
+ ((x) == 0x1b0 ? "HWRM_FUNC_LAG_CREATE": \
+ ((x) == 0x1b1 ? "HWRM_FUNC_LAG_UPDATE": \
+ ((x) == 0x1b2 ? "HWRM_FUNC_LAG_FREE": \
+ ((x) == 0x1b3 ? "HWRM_FUNC_LAG_QCFG": \
+ "Unknown decode" )))))))))))))))))))))))))))))))))))) : \
(((x) < 0x280) ? \
((x) == 0x200 ? "HWRM_SELFTEST_QLIST": \
((x) == 0x201 ? "HWRM_SELFTEST_EXEC": \
@@ -586,9 +612,9 @@ typedef struct hwrm_short_input {
((x) == 0x20b ? "HWRM_MFG_FRU_EEPROM_READ": \
((x) == 0x20c ? "HWRM_MFG_SOC_IMAGE": \
((x) == 0x20d ? "HWRM_MFG_SOC_QSTATUS": \
- ((x) == 0x20e ? "HWRM_MFG_PARAM_SEEPROM_SYNC": \
- ((x) == 0x20f ? "HWRM_MFG_PARAM_SEEPROM_READ": \
- ((x) == 0x210 ? "HWRM_MFG_PARAM_SEEPROM_HEALTH": \
+ ((x) == 0x20e ? "HWRM_MFG_PARAM_CRITICAL_DATA_FINALIZE": \
+ ((x) == 0x20f ? "HWRM_MFG_PARAM_CRITICAL_DATA_READ": \
+ ((x) == 0x210 ? "HWRM_MFG_PARAM_CRITICAL_DATA_HEALTH": \
((x) == 0x211 ? "HWRM_MFG_PRVSN_EXPORT_CSR": \
((x) == 0x212 ? "HWRM_MFG_PRVSN_IMPORT_CERT": \
((x) == 0x213 ? "HWRM_MFG_PRVSN_GET_STATE": \
@@ -597,12 +623,22 @@ typedef struct hwrm_short_input {
((x) == 0x216 ? "HWRM_MFG_SELFTEST_QLIST": \
((x) == 0x217 ? "HWRM_MFG_SELFTEST_EXEC": \
((x) == 0x218 ? "HWRM_STAT_GENERIC_QSTATS": \
- "Unknown decode" ))))))))))))))))))))))))) : \
+ ((x) == 0x219 ? "HWRM_MFG_PRVSN_EXPORT_CERT": \
+ ((x) == 0x21a ? "HWRM_STAT_DB_ERROR_QSTATS": \
+ ((x) == 0x258 ? "HWRM_UDCC_QCAPS": \
+ ((x) == 0x259 ? "HWRM_UDCC_CFG": \
+ ((x) == 0x25a ? "HWRM_UDCC_QCFG": \
+ ((x) == 0x25b ? "HWRM_UDCC_SESSION_CFG": \
+ ((x) == 0x25c ? "HWRM_UDCC_SESSION_QCFG": \
+ ((x) == 0x25d ? "HWRM_UDCC_SESSION_QUERY": \
+ ((x) == 0x25e ? "HWRM_UDCC_COMP_CFG": \
+ ((x) == 0x25f ? "HWRM_UDCC_COMP_QCFG": \
+ ((x) == 0x260 ? "HWRM_UDCC_COMP_QUERY": \
+ "Unknown decode" )))))))))))))))))))))))))))))))))))) : \
(((x) < 0x300) ? \
((x) == 0x2bc ? "HWRM_TF": \
((x) == 0x2bd ? "HWRM_TF_VERSION_GET": \
((x) == 0x2c6 ? "HWRM_TF_SESSION_OPEN": \
- ((x) == 0x2c7 ? "HWRM_TF_SESSION_ATTACH": \
((x) == 0x2c8 ? "HWRM_TF_SESSION_REGISTER": \
((x) == 0x2c9 ? "HWRM_TF_SESSION_UNREGISTER": \
((x) == 0x2ca ? "HWRM_TF_SESSION_CLOSE": \
@@ -617,14 +653,6 @@ typedef struct hwrm_short_input {
((x) == 0x2da ? "HWRM_TF_TBL_TYPE_GET": \
((x) == 0x2db ? "HWRM_TF_TBL_TYPE_SET": \
((x) == 0x2dc ? "HWRM_TF_TBL_TYPE_BULK_GET": \
- ((x) == 0x2e2 ? "HWRM_TF_CTXT_MEM_ALLOC": \
- ((x) == 0x2e3 ? "HWRM_TF_CTXT_MEM_FREE": \
- ((x) == 0x2e4 ? "HWRM_TF_CTXT_MEM_RGTR": \
- ((x) == 0x2e5 ? "HWRM_TF_CTXT_MEM_UNRGTR": \
- ((x) == 0x2e6 ? "HWRM_TF_EXT_EM_QCAPS": \
- ((x) == 0x2e7 ? "HWRM_TF_EXT_EM_OP": \
- ((x) == 0x2e8 ? "HWRM_TF_EXT_EM_CFG": \
- ((x) == 0x2e9 ? "HWRM_TF_EXT_EM_QCFG": \
((x) == 0x2ea ? "HWRM_TF_EM_INSERT": \
((x) == 0x2eb ? "HWRM_TF_EM_DELETE": \
((x) == 0x2ec ? "HWRM_TF_EM_HASH_INSERT": \
@@ -637,7 +665,13 @@ typedef struct hwrm_short_input {
((x) == 0x2fd ? "HWRM_TF_GLOBAL_CFG_GET": \
((x) == 0x2fe ? "HWRM_TF_IF_TBL_SET": \
((x) == 0x2ff ? "HWRM_TF_IF_TBL_GET": \
- "Unknown decode" )))))))))))))))))))))))))))))))))))))) : \
+ "Unknown decode" ))))))))))))))))))))))))))))) : \
+ (((x) < 0x380) ? \
+ ((x) == 0x300 ? "HWRM_TF_RESC_USAGE_SET": \
+ ((x) == 0x301 ? "HWRM_TF_RESC_USAGE_QUERY": \
+ ((x) == 0x302 ? "HWRM_TF_TBL_TYPE_ALLOC": \
+ ((x) == 0x303 ? "HWRM_TF_TBL_TYPE_FREE": \
+ "Unknown decode" )))) : \
(((x) < 0x400) ? \
((x) == 0x380 ? "HWRM_TFC_TBL_SCOPE_QCAPS": \
((x) == 0x381 ? "HWRM_TFC_TBL_SCOPE_ID_ALLOC": \
@@ -663,11 +697,19 @@ typedef struct hwrm_short_input {
((x) == 0x395 ? "HWRM_TFC_TCAM_ALLOC": \
((x) == 0x396 ? "HWRM_TFC_TCAM_ALLOC_SET": \
((x) == 0x397 ? "HWRM_TFC_TCAM_FREE": \
- "Unknown decode" )))))))))))))))))))))))) : \
+ ((x) == 0x398 ? "HWRM_TFC_IF_TBL_SET": \
+ ((x) == 0x399 ? "HWRM_TFC_IF_TBL_GET": \
+ ((x) == 0x39a ? "HWRM_TFC_TBL_SCOPE_CONFIG_GET": \
+ ((x) == 0x39b ? "HWRM_TFC_RESC_USAGE_QUERY": \
+ ((x) == 0x39c ? "HWRM_QUEUE_PFCWD_TIMEOUT_QCAPS": \
+ ((x) == 0x39d ? "HWRM_QUEUE_PFCWD_TIMEOUT_CFG": \
+ ((x) == 0x39e ? "HWRM_QUEUE_PFCWD_TIMEOUT_QCFG": \
+ "Unknown decode" ))))))))))))))))))))))))))))))) : \
(((x) < 0x480) ? \
((x) == 0x400 ? "HWRM_SV": \
"Unknown decode" ) : \
(((x) < 0xff80) ? \
+ ((x) == 0xff0f ? "HWRM_DBG_LOG_BUFFER_FLUSH": \
((x) == 0xff10 ? "HWRM_DBG_READ_DIRECT": \
((x) == 0xff11 ? "HWRM_DBG_READ_INDIRECT": \
((x) == 0xff12 ? "HWRM_DBG_WRITE_DIRECT": \
@@ -696,8 +738,10 @@ typedef struct hwrm_short_input {
((x) == 0xff29 ? "HWRM_DBG_USEQ_RUN": \
((x) == 0xff2a ? "HWRM_DBG_USEQ_DELIVERY_REQ": \
((x) == 0xff2b ? "HWRM_DBG_USEQ_RESP_HDR": \
- "Unknown decode" )))))))))))))))))))))))))))) : \
+ "Unknown decode" ))))))))))))))))))))))))))))) : \
(((x) <= 0xffff) ? \
+ ((x) == 0xffea ? "HWRM_NVM_GET_VPD_FIELD_INFO": \
+ ((x) == 0xffeb ? "HWRM_NVM_SET_VPD_FIELD_INFO": \
((x) == 0xffec ? "HWRM_NVM_DEFRAG": \
((x) == 0xffed ? "HWRM_NVM_REQ_ARBITRATION": \
((x) == 0xffee ? "HWRM_NVM_FACTORY_DEFAULTS": \
@@ -718,8 +762,8 @@ typedef struct hwrm_short_input {
((x) == 0xfffd ? "HWRM_NVM_READ": \
((x) == 0xfffe ? "HWRM_NVM_WRITE": \
((x) == 0xffff ? "HWRM_NVM_RAW_WRITE_BLK": \
- "Unknown decode" )))))))))))))))))))) : \
- "Unknown decode" ))))))))))
+ "Unknown decode" )))))))))))))))))))))) : \
+ "Unknown decode" )))))))))))
/*
@@ -800,7 +844,7 @@ typedef struct cmd_nums {
#define HWRM_FUNC_VLAN_QCFG UINT32_C(0x34)
#define HWRM_QUEUE_PFCENABLE_QCFG UINT32_C(0x35)
#define HWRM_QUEUE_PFCENABLE_CFG UINT32_C(0x36)
- #define HWRM_QUEUE_PRI2COS_QCFG UINT32_C(0x37)
+ #define HWRM_QUEUE_PRI2COS_QCFG UINT32_C(0x37)
#define HWRM_QUEUE_PRI2COS_CFG UINT32_C(0x38)
#define HWRM_QUEUE_COS2BW_QCFG UINT32_C(0x39)
#define HWRM_QUEUE_COS2BW_CFG UINT32_C(0x3a)
@@ -848,6 +892,14 @@ typedef struct cmd_nums {
#define HWRM_QUEUE_VLANPRI2PRI_CFG UINT32_C(0x85)
#define HWRM_QUEUE_GLOBAL_CFG UINT32_C(0x86)
#define HWRM_QUEUE_GLOBAL_QCFG UINT32_C(0x87)
+ #define HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_QCFG UINT32_C(0x88)
+ #define HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_CFG UINT32_C(0x89)
+ #define HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_QCFG UINT32_C(0x8a)
+ #define HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_CFG UINT32_C(0x8b)
+ #define HWRM_QUEUE_QCAPS UINT32_C(0x8c)
+ #define HWRM_QUEUE_ADPTV_QOS_RX_TUNING_QCFG UINT32_C(0x8d)
+ #define HWRM_QUEUE_ADPTV_QOS_RX_TUNING_CFG UINT32_C(0x8e)
+ #define HWRM_QUEUE_ADPTV_QOS_TX_TUNING_QCFG UINT32_C(0x8f)
#define HWRM_CFA_L2_FILTER_ALLOC UINT32_C(0x90)
#define HWRM_CFA_L2_FILTER_FREE UINT32_C(0x91)
#define HWRM_CFA_L2_FILTER_CFG UINT32_C(0x92)
@@ -871,6 +923,7 @@ typedef struct cmd_nums {
#define HWRM_TUNNEL_DST_PORT_QUERY UINT32_C(0xa0)
#define HWRM_TUNNEL_DST_PORT_ALLOC UINT32_C(0xa1)
#define HWRM_TUNNEL_DST_PORT_FREE UINT32_C(0xa2)
+ #define HWRM_QUEUE_ADPTV_QOS_TX_TUNING_CFG UINT32_C(0xa3)
#define HWRM_STAT_CTX_ENG_QUERY UINT32_C(0xaf)
#define HWRM_STAT_CTX_ALLOC UINT32_C(0xb0)
#define HWRM_STAT_CTX_FREE UINT32_C(0xb1)
@@ -926,6 +979,8 @@ typedef struct cmd_nums {
#define HWRM_PORT_EP_TX_CFG UINT32_C(0xdb)
#define HWRM_PORT_CFG UINT32_C(0xdc)
#define HWRM_PORT_QCFG UINT32_C(0xdd)
+ /* Queries MAC capabilities for the specified port */
+ #define HWRM_PORT_MAC_QCAPS UINT32_C(0xdf)
#define HWRM_TEMP_MONITOR_QUERY UINT32_C(0xe0)
#define HWRM_REG_POWER_QUERY UINT32_C(0xe1)
#define HWRM_CORE_FREQUENCY_QUERY UINT32_C(0xe2)
@@ -1029,7 +1084,12 @@ typedef struct cmd_nums {
#define HWRM_CFA_TLS_FILTER_ALLOC UINT32_C(0x128)
/* Experimental */
#define HWRM_CFA_TLS_FILTER_FREE UINT32_C(0x129)
- /* Engine CKV - Get the current allocation status of keys provisioned in the key vault. */
+ /* Release an AFM function for TF control */
+ #define HWRM_CFA_RELEASE_AFM_FUNC UINT32_C(0x12a)
+ /*
+ * Engine CKV - Get the current allocation status of keys provisioned in
+ * the key vault.
+ */
#define HWRM_ENGINE_CKV_STATUS UINT32_C(0x12e)
/* Engine CKV - Add a new CKEK used to encrypt keys. */
#define HWRM_ENGINE_CKV_CKEK_ADD UINT32_C(0x12f)
@@ -1089,7 +1149,10 @@ typedef struct cmd_nums {
#define HWRM_ENGINE_STATS_CLEAR UINT32_C(0x156)
/* Engine - Query the statistics accumulator for an Engine. */
#define HWRM_ENGINE_STATS_QUERY UINT32_C(0x157)
- /* Engine - Query statistics counters for continuous errors from all CDDIP Engines. */
+ /*
+ * Engine - Query statistics counters for continuous errors from all CDDIP
+ * Engines.
+ */
#define HWRM_ENGINE_STATS_QUERY_CONTINUOUS_ERROR UINT32_C(0x158)
/* Engine - Allocate an Engine RQ. */
#define HWRM_ENGINE_RQ_ALLOC UINT32_C(0x15e)
@@ -1171,6 +1234,20 @@ typedef struct cmd_nums {
#define HWRM_FUNC_SYNCE_CFG UINT32_C(0x1ab)
/* Queries SyncE configurations. */
#define HWRM_FUNC_SYNCE_QCFG UINT32_C(0x1ac)
+ /* The command is used to deallocate KTLS or QUIC key contexts. */
+ #define HWRM_FUNC_KEY_CTX_FREE UINT32_C(0x1ad)
+ /* The command is used to configure link aggr group mode. */
+ #define HWRM_FUNC_LAG_MODE_CFG UINT32_C(0x1ae)
+ /* The command is used to query link aggr group mode. */
+ #define HWRM_FUNC_LAG_MODE_QCFG UINT32_C(0x1af)
+ /* The command is used to create a link aggr group. */
+ #define HWRM_FUNC_LAG_CREATE UINT32_C(0x1b0)
+ /* The command is used to update a link aggr group. */
+ #define HWRM_FUNC_LAG_UPDATE UINT32_C(0x1b1)
+ /* The command is used to free a link aggr group. */
+ #define HWRM_FUNC_LAG_FREE UINT32_C(0x1b2)
+ /* The command is used to query a link aggr group. */
+ #define HWRM_FUNC_LAG_QCFG UINT32_C(0x1b3)
/* Experimental */
#define HWRM_SELFTEST_QLIST UINT32_C(0x200)
/* Experimental */
@@ -1202,12 +1279,12 @@ typedef struct cmd_nums {
#define HWRM_MFG_SOC_IMAGE UINT32_C(0x20c)
/* Retrieves the SoC status and image provisioning information */
#define HWRM_MFG_SOC_QSTATUS UINT32_C(0x20d)
- /* Tells the fw to program the seeprom memory */
- #define HWRM_MFG_PARAM_SEEPROM_SYNC UINT32_C(0x20e)
- /* Tells the fw to read the seeprom memory */
- #define HWRM_MFG_PARAM_SEEPROM_READ UINT32_C(0x20f)
- /* Tells the fw to get the health of seeprom data */
- #define HWRM_MFG_PARAM_SEEPROM_HEALTH UINT32_C(0x210)
+ /* Tells the fw to finalize the critical data (store and lock it) */
+ #define HWRM_MFG_PARAM_CRITICAL_DATA_FINALIZE UINT32_C(0x20e)
+ /* Tells the fw to read the critical data */
+ #define HWRM_MFG_PARAM_CRITICAL_DATA_READ UINT32_C(0x20f)
+ /* Tells the fw to get the health of critical data */
+ #define HWRM_MFG_PARAM_CRITICAL_DATA_HEALTH UINT32_C(0x210)
/*
* The command is used for certificate provisioning to export a
* Certificate Signing Request (CSR) from the device.
@@ -1242,6 +1319,37 @@ typedef struct cmd_nums {
#define HWRM_MFG_SELFTEST_EXEC UINT32_C(0x217)
/* Queries the generic stats */
#define HWRM_STAT_GENERIC_QSTATS UINT32_C(0x218)
+ /*
+ * The command is used for certificate provisioning to export a
+ * certificate chain from the device.
+ */
+ #define HWRM_MFG_PRVSN_EXPORT_CERT UINT32_C(0x219)
+ /* Query the statistics for doorbell drops due to various error conditions. */
+ #define HWRM_STAT_DB_ERROR_QSTATS UINT32_C(0x21a)
+ /*
+ * This command returns the capabilities related to User Defined
+ * Congestion Control on a function.
+ */
+ #define HWRM_UDCC_QCAPS UINT32_C(0x258)
+ /* This command configures User Defined Congestion Control on a function. */
+ #define HWRM_UDCC_CFG UINT32_C(0x259)
+ /*
+ * This command queries the configuration of User Defined Congestion
+ * Control on a function.
+ */
+ #define HWRM_UDCC_QCFG UINT32_C(0x25a)
+ /* This command configures an existing UDCC session. */
+ #define HWRM_UDCC_SESSION_CFG UINT32_C(0x25b)
+ /* This command queries the configuration of a UDCC session. */
+ #define HWRM_UDCC_SESSION_QCFG UINT32_C(0x25c)
+ /* This command queries the UDCC session. */
+ #define HWRM_UDCC_SESSION_QUERY UINT32_C(0x25d)
+ /* This command configures the computation unit. */
+ #define HWRM_UDCC_COMP_CFG UINT32_C(0x25e)
+ /* This command queries the configuration of the computation unit. */
+ #define HWRM_UDCC_COMP_QCFG UINT32_C(0x25f)
+ /* This command queries the status and statistics of the computation unit. */
+ #define HWRM_UDCC_COMP_QUERY UINT32_C(0x260)
/* Experimental */
#define HWRM_TF UINT32_C(0x2bc)
/* Experimental */
@@ -1249,8 +1357,6 @@ typedef struct cmd_nums {
/* Experimental */
#define HWRM_TF_SESSION_OPEN UINT32_C(0x2c6)
/* Experimental */
- #define HWRM_TF_SESSION_ATTACH UINT32_C(0x2c7)
- /* Experimental */
#define HWRM_TF_SESSION_REGISTER UINT32_C(0x2c8)
/* Experimental */
#define HWRM_TF_SESSION_UNREGISTER UINT32_C(0x2c9)
@@ -1279,22 +1385,6 @@ typedef struct cmd_nums {
/* Experimental */
#define HWRM_TF_TBL_TYPE_BULK_GET UINT32_C(0x2dc)
/* Experimental */
- #define HWRM_TF_CTXT_MEM_ALLOC UINT32_C(0x2e2)
- /* Experimental */
- #define HWRM_TF_CTXT_MEM_FREE UINT32_C(0x2e3)
- /* Experimental */
- #define HWRM_TF_CTXT_MEM_RGTR UINT32_C(0x2e4)
- /* Experimental */
- #define HWRM_TF_CTXT_MEM_UNRGTR UINT32_C(0x2e5)
- /* Experimental */
- #define HWRM_TF_EXT_EM_QCAPS UINT32_C(0x2e6)
- /* Experimental */
- #define HWRM_TF_EXT_EM_OP UINT32_C(0x2e7)
- /* Experimental */
- #define HWRM_TF_EXT_EM_CFG UINT32_C(0x2e8)
- /* Experimental */
- #define HWRM_TF_EXT_EM_QCFG UINT32_C(0x2e9)
- /* Experimental */
#define HWRM_TF_EM_INSERT UINT32_C(0x2ea)
/* Experimental */
#define HWRM_TF_EM_DELETE UINT32_C(0x2eb)
@@ -1318,6 +1408,14 @@ typedef struct cmd_nums {
#define HWRM_TF_IF_TBL_SET UINT32_C(0x2fe)
/* Experimental */
#define HWRM_TF_IF_TBL_GET UINT32_C(0x2ff)
+ /* Experimental */
+ #define HWRM_TF_RESC_USAGE_SET UINT32_C(0x300)
+ /* Experimental */
+ #define HWRM_TF_RESC_USAGE_QUERY UINT32_C(0x301)
+ /* Truflow command to allocate a table */
+ #define HWRM_TF_TBL_TYPE_ALLOC UINT32_C(0x302)
+ /* Truflow command to free a table */
+ #define HWRM_TF_TBL_TYPE_FREE UINT32_C(0x303)
/* TruFlow command to check firmware table scope capabilities. */
#define HWRM_TFC_TBL_SCOPE_QCAPS UINT32_C(0x380)
/* TruFlow command to allocate a table scope ID and create the pools. */
@@ -1330,9 +1428,9 @@ typedef struct cmd_nums {
#define HWRM_TFC_TBL_SCOPE_FID_ADD UINT32_C(0x384)
/* TruFlow command to remove a FID from a table scope. */
#define HWRM_TFC_TBL_SCOPE_FID_REM UINT32_C(0x385)
- /* TruFlow command to allocate a table scope pool. */
+ /* DEPRECATED */
#define HWRM_TFC_TBL_SCOPE_POOL_ALLOC UINT32_C(0x386)
- /* TruFlow command to free a table scope pool. */
+ /* DEPRECATED */
#define HWRM_TFC_TBL_SCOPE_POOL_FREE UINT32_C(0x387)
/* Experimental */
#define HWRM_TFC_SESSION_ID_ALLOC UINT32_C(0x388)
@@ -1366,8 +1464,30 @@ typedef struct cmd_nums {
#define HWRM_TFC_TCAM_ALLOC_SET UINT32_C(0x396)
/* TruFlow command to free a TCAM entry. */
#define HWRM_TFC_TCAM_FREE UINT32_C(0x397)
+ /* Truflow command to set an interface table entry */
+ #define HWRM_TFC_IF_TBL_SET UINT32_C(0x398)
+ /* Truflow command to get an interface table entry */
+ #define HWRM_TFC_IF_TBL_GET UINT32_C(0x399)
+ /* TruFlow command to get configured info about a table scope. */
+ #define HWRM_TFC_TBL_SCOPE_CONFIG_GET UINT32_C(0x39a)
+ /* TruFlow command to query the resource usage state. */
+ #define HWRM_TFC_RESC_USAGE_QUERY UINT32_C(0x39b)
+ /*
+ * This command is used to query the pfc watchdog max configurable
+ * timeout value.
+ */
+ #define HWRM_QUEUE_PFCWD_TIMEOUT_QCAPS UINT32_C(0x39c)
+ /* This command is used to set the PFC watchdog timeout value. */
+ #define HWRM_QUEUE_PFCWD_TIMEOUT_CFG UINT32_C(0x39d)
+ /*
+ * This command is used to query the current configured pfc watchdog
+ * timeout value.
+ */
+ #define HWRM_QUEUE_PFCWD_TIMEOUT_QCFG UINT32_C(0x39e)
/* Experimental */
#define HWRM_SV UINT32_C(0x400)
+ /* Flush any trace buffer data that has not been sent to the host. */
+ #define HWRM_DBG_LOG_BUFFER_FLUSH UINT32_C(0xff0f)
/* Experimental */
#define HWRM_DBG_READ_DIRECT UINT32_C(0xff10)
/* Experimental */
@@ -1423,6 +1543,8 @@ typedef struct cmd_nums {
#define HWRM_DBG_USEQ_DELIVERY_REQ UINT32_C(0xff2a)
/* Experimental */
#define HWRM_DBG_USEQ_RESP_HDR UINT32_C(0xff2b)
+ #define HWRM_NVM_GET_VPD_FIELD_INFO UINT32_C(0xffea)
+ #define HWRM_NVM_SET_VPD_FIELD_INFO UINT32_C(0xffeb)
#define HWRM_NVM_DEFRAG UINT32_C(0xffec)
#define HWRM_NVM_REQ_ARBITRATION UINT32_C(0xffed)
/* Experimental */
@@ -1518,14 +1640,14 @@ typedef struct ret_codes {
#define HWRM_ERR_CODE_NO_FLOW_COUNTER_DURING_ALLOC UINT32_C(0xc)
/*
* This error code is only reported by firmware when the registered
- * driver instances requested to offloaded a flow but was unable to because
- * the requested key's hash collides with the installed keys.
+ * driver instances requested to offloaded a flow but was unable to
+ * because the requested key's hash collides with the installed keys.
*/
#define HWRM_ERR_CODE_KEY_HASH_COLLISION UINT32_C(0xd)
/*
* This error code is only reported by firmware when the registered
- * driver instances requested to offloaded a flow but was unable to because
- * the same key has already been installed.
+ * driver instances requested to offloaded a flow but was unable to
+ * because the same key has already been installed.
*/
#define HWRM_ERR_CODE_KEY_ALREADY_EXISTS UINT32_C(0xe)
/*
@@ -1534,8 +1656,8 @@ typedef struct ret_codes {
*/
#define HWRM_ERR_CODE_HWRM_ERROR UINT32_C(0xf)
/*
- * Firmware is unable to service the request at the present time. Caller
- * may try again later.
+ * Firmware is unable to service the request at the present time.
+ * Caller may try again later.
*/
#define HWRM_ERR_CODE_BUSY UINT32_C(0x10)
/*
@@ -1550,6 +1672,11 @@ typedef struct ret_codes {
* async completion ring or associated forwarding buffers configured.
*/
#define HWRM_ERR_CODE_PF_UNAVAILABLE UINT32_C(0x12)
+ /*
+ * This error code is reported by Firmware when the specific entity
+ * requested by the host is not present or does not exist.
+ */
+ #define HWRM_ERR_CODE_ENTITY_NOT_PRESENT UINT32_C(0x13)
/*
* This value indicates that the HWRM response is in TLV format and
* should be interpreted as one or more TLVs starting with the
@@ -1587,7 +1714,8 @@ typedef struct ret_codes {
((x) == 0x10 ? "BUSY": \
((x) == 0x11 ? "RESOURCE_LOCKED": \
((x) == 0x12 ? "PF_UNAVAILABLE": \
- "Unknown decode" ))))))))))))))))))) : \
+ ((x) == 0x13 ? "ENTITY_NOT_PRESENT": \
+ "Unknown decode" )))))))))))))))))))) : \
(((x) < 0x8080) ? \
((x) == 0x8000 ? "TLV_ENCAPSULATED_RESPONSE": \
"Unknown decode" ) : \
@@ -1614,7 +1742,7 @@ typedef struct hwrm_err_output {
/* This field provides original sequence number of the command. */
uint16_t seq_id;
/*
- * This field is the length of the response in bytes. The
+ * This field is the length of the response in bytes. The
* last byte of the response is a valid flag that will read
* as '1' when the command has been completely written to
* memory.
@@ -1631,9 +1759,9 @@ typedef struct hwrm_err_output {
uint8_t cmd_err;
/*
* This field is used in Output records to indicate that the output
- * is completely written to RAM. This field should be read as '1'
- * to indicate that the output has been completely written.
- * When writing a command completion or response to an internal processor,
+ * is completely written to RAM. This field should be read as '1'
+ * to indicate that the output has been completely written. When
+ * writing a command completion or response to an internal processor,
* the order of writes has to be such that this field is written last.
*/
uint8_t valid;
@@ -1644,7 +1772,12 @@ typedef struct hwrm_err_output {
* applicable (All F's). Need to cast it the size of the field if needed.
*/
#define HWRM_NA_SIGNATURE ((uint32_t)(-1))
-/* hwrm_func_buf_rgtr */
+/*
+ * This is reflecting the size of the PF mailbox and not the maximum
+ * command size for any of the HWRM command structures. To determine
+ * the maximum size of an HWRM command supported by the firmware, see
+ * the max_ext_req_len field in the response of the HWRM_VER_GET command.
+ */
#define HWRM_MAX_REQ_LEN 128
/* hwrm_cfa_flow_info */
#define HWRM_MAX_RESP_LEN 704
@@ -1668,10 +1801,10 @@ typedef struct hwrm_err_output {
#define HWRM_TARGET_ID_TOOLS 0xFFFD
#define HWRM_VERSION_MAJOR 1
#define HWRM_VERSION_MINOR 10
-#define HWRM_VERSION_UPDATE 2
+#define HWRM_VERSION_UPDATE 3
/* non-zero means beta version */
-#define HWRM_VERSION_RSVD 136
-#define HWRM_VERSION_STR "1.10.2.136"
+#define HWRM_VERSION_RSVD 42
+#define HWRM_VERSION_STR "1.10.3.42"
/****************
* hwrm_ver_get *
@@ -1887,47 +2020,52 @@ typedef struct hwrm_ver_get_output {
/*
* If set to 1, then the KONG host mailbox channel is supported.
* If set to 0, then the KONG host mailbox channel is not supported.
- * By default, this flag should be 0 for older version of core firmware.
+ * By default, this flag should be 0 for older version of core
+ * firmware.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_KONG_MB_CHNL_SUPPORTED UINT32_C(0x10)
/*
- * If set to 1, then the 64bit flow handle is supported in addition to the
- * legacy 16bit flow handle. If set to 0, then the 64bit flow handle is not
- * supported. By default, this flag should be 0 for older version of core firmware.
+ * If set to 1, then the 64bit flow handle is supported in addition
+ * to the legacy 16bit flow handle. If set to 0, then the 64bit flow
+ * handle is not supported. By default, this flag should be 0 for
+ * older version of core firmware.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FLOW_HANDLE_64BIT_SUPPORTED UINT32_C(0x20)
/*
- * If set to 1, then filter type can be provided in filter_alloc or filter_cfg
- * filter types like L2 for l2 traffic and ROCE for roce & l2 traffic.
- * If set to 0, then filter types not supported.
- * By default, this flag should be 0 for older version of core firmware.
+ * If set to 1, then filter type can be provided in filter_alloc or
+ * filter_cfg filter types like L2 for l2 traffic and ROCE for roce &
+ * l2 traffic. If set to 0, then filter types not supported. By
+ * default, this flag should be 0 for older version of core firmware.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_L2_FILTER_TYPES_ROCE_OR_L2_SUPPORTED UINT32_C(0x40)
/*
- * If set to 1, firmware is capable to support virtio vSwitch offload model.
- * If set to 0, firmware can't supported virtio vSwitch offload model.
- * By default, this flag should be 0 for older version of core firmware.
+ * If set to 1, firmware is capable to support virtio vSwitch offload
+ * model. If set to 0, firmware can't supported virtio vSwitch
+ * offload model.
+ * By default, this flag should be 0 for older version of core
+ * firmware.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_VIRTIO_VSWITCH_OFFLOAD_SUPPORTED UINT32_C(0x80)
/*
* If set to 1, firmware is capable to support trusted VF.
* If set to 0, firmware is not capable to support trusted VF.
- * By default, this flag should be 0 for older version of core firmware.
+ * By default, this flag should be 0 for older version of core
+ * firmware.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_TRUSTED_VF_SUPPORTED UINT32_C(0x100)
/*
* If set to 1, firmware is capable to support flow aging.
* If set to 0, firmware is not capable to support flow aging.
- * By default, this flag should be 0 for older version of core firmware.
- * (deprecated)
+ * By default, this flag should be 0 for older version of core
+ * firmware. (deprecated)
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FLOW_AGING_SUPPORTED UINT32_C(0x200)
/*
- * If set to 1, firmware is capable to support advanced flow counters like,
- * Meter drop counters and EEM counters.
- * If set to 0, firmware is not capable to support advanced flow counters.
- * By default, this flag should be 0 for older version of core firmware.
- * (deprecated)
+ * If set to 1, firmware is capable to support advanced flow counters
+ * like, Meter drop counters and EEM counters.
+ * If set to 0, firmware is not capable to support advanced flow
+ * counters. By default, this flag should be 0 for older version of
+ * core firmware. (deprecated)
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_ADV_FLOW_COUNTERS_SUPPORTED UINT32_C(0x400)
/*
@@ -1935,28 +2073,30 @@ typedef struct hwrm_ver_get_output {
* Extended Exact Match(EEM) feature.
* If set to 0, firmware is not capable to support the use of the
* CFA EEM feature.
- * By default, this flag should be 0 for older version of core firmware.
- * (deprecated)
+ * By default, this flag should be 0 for older version of core
+ * firmware. (deprecated)
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_EEM_SUPPORTED UINT32_C(0x800)
/*
- * If set to 1, the firmware is able to support advance CFA flow management
- * features reported in the HWRM_CFA_FLOW_MGNT_QCAPS.
- * If set to 0, then the firmware doesn’t support the advance CFA flow management
- * features.
- * By default, this flag should be 0 for older version of core firmware.
+ * If set to 1, the firmware is able to support advance CFA flow
+ * management features reported in the HWRM_CFA_FLOW_MGNT_QCAPS.
+ * If set to 0, then the firmware doesn't support the advance CFA
+ * flow management features.
+ * By default, this flag should be 0 for older version of core
+ * firmware.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED UINT32_C(0x1000)
/*
* Deprecated and replaced with cfa_truflow_supported.
* If set to 1, the firmware is able to support TFLIB features.
- * If set to 0, then the firmware doesn’t support TFLIB features.
- * By default, this flag should be 0 for older version of core firmware.
+ * If set to 0, then the firmware doesn't support TFLIB features.
+ * By default, this flag should be 0 for older version of core
+ * firmware.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_TFLIB_SUPPORTED UINT32_C(0x2000)
/*
* If set to 1, the firmware is able to support TruFlow features.
- * If set to 0, then the firmware doesn’t support TruFlow features.
+ * If set to 0, then the firmware doesn't support TruFlow features.
* By default, this flag should be 0 for older version of
* core firmware.
*/
@@ -1966,6 +2106,13 @@ typedef struct hwrm_ver_get_output {
* If set to 0, then firmware doesn't support secure boot.
*/
#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_BOOT_CAPABLE UINT32_C(0x8000)
+ /*
+ * If set to 1, then firmware is able to support the secure solution
+ * feature.
+ * If set to 0, then firmware does not support the secure solution
+ * feature.
+ */
+ #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_SOC_CAPABLE UINT32_C(0x10000)
/*
* This field represents the major version of RoCE firmware.
* A change in major version represents a major release.
@@ -2018,7 +2165,10 @@ typedef struct hwrm_ver_get_output {
uint8_t chip_metal;
/* This field returns the bond id of the chip. */
uint8_t chip_bond_id;
- /* This value indicates the type of platform used for chip implementation. */
+ /*
+ * This value indicates the type of platform used for chip
+ * implementation.
+ */
uint8_t chip_platform_type;
/* ASIC */
#define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
@@ -2071,8 +2221,8 @@ typedef struct hwrm_ver_get_output {
* host drivers that it has not completed resource initialization
* required for data path operations. Host drivers should not send
* any HWRM command that requires data path resources. Firmware will
- * fail those commands with HWRM_ERR_CODE_BUSY. Host drivers can retry
- * those commands once both the flags are cleared.
+ * fail those commands with HWRM_ERR_CODE_BUSY. Host drivers can
+ * retry those commands once both the flags are cleared.
* If this flag and dev_not_rdy flag are set to 0, device is ready
* to accept all HWRM commands.
*/
@@ -2232,9 +2382,9 @@ typedef struct hwrm_ver_get_output {
uint8_t unused_1[3];
/*
* This field is used in Output records to indicate that the output
- * is completely written to RAM. This field should be read as '1'
- * to indicate that the output has been completely written.
- * When writing a command completion or response to an internal processor,
+ * is completely written to RAM. This field should be read as '1'
+ * to indicate that the output has been completely written. When
+ * writing a command completion or response to an internal processor,
* the order of writes has to be such that this field is written last.
*/
uint8_t valid;
@@ -2801,11 +2951,11 @@ typedef struct crypto_presync_bd_cmd {
* Typically, presync BDs are used for packet retransmissions. Source
* port sends all the packets in order over the network to destination
* port and packets get dropped in the network. The destination port
- * will request retranmission of dropped packets and source port driver
- * will send presync BD to setup the transmitter appropriately. It will
- * provide the start and end TCP sequence number of the data to be
- * transmitted. HW keeps two sets of context variable, one for in order
- * traffic and one for retransmission traffic. HW is designed to
+ * will request retransmission of dropped packets and source port
+ * driver will send presync BD to setup the transmitter appropriately.
+ * It will provide the start and end TCP sequence number of the data to
+ * be transmitted. HW keeps two sets of context variable, one for in
+ * order traffic and one for retransmission traffic. HW is designed to
* transmit everything posted in the presync BD and return to in order
* mode after that. No inorder context variables are updated in the
* process. There is a special case where packets can be dropped
@@ -2955,22 +3105,22 @@ typedef struct ce_bds_quic_add_data_msg {
* exchanged as part of sessions setup between the two end
* points for QUIC operations.
*/
- uint64_t quic_iv_lo;
+ uint8_t quic_iv_lo[8];
/*
* Most-significant 32 bits (of 96) of additional IV that is
* exchanged as part of sessions setup between the two end
* points for QUIC operations.
*/
- uint32_t quic_iv_hi;
+ uint8_t quic_iv_hi[4];
uint32_t unused_1;
/*
* Key used for encrypting or decrypting records. The Key is exchanged
* as part of sessions setup between the two end points through this
* mid-path BD.
*/
- uint32_t session_key[8];
+ uint8_t session_key[32];
/* Header protection key. */
- uint32_t hp_key[8];
+ uint8_t hp_key[32];
/* Packet number associated with the QUIC connection. */
uint64_t pkt_number;
} ce_bds_quic_add_data_msg_t, *pce_bds_quic_add_data_msg_t;
@@ -3149,7 +3299,8 @@ typedef struct tx_bd_short {
*
* This value must be valid on all BDs of a packet.
*/
- uint64_t addr;
+ uint32_t addr_lo;
+ uint32_t addr_hi;
} tx_bd_short_t, *ptx_bd_short_t;
/* tx_bd_long (size:128b/16B) */
@@ -3359,7 +3510,7 @@ typedef struct tx_bd_long_hi {
* 0xffff.
*
* If set to one when LSO is '1', then the IPID will be treated
- * as a 15b number and will be wrapped if it exceeds a value 0f
+ * as a 15b number and will be wrapped if it exceeds a value of
* 0x7fff.
*/
#define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
@@ -3418,7 +3569,7 @@ typedef struct tx_bd_long_hi {
* will be the following behavior for all cases independent of
* settings of inner LSO and checksum offload BD flags.
* If outer UDP checksum is 0, then do not update it.
- * If outer UDP checksum is non zero, then the hardware should
+ * If outer UDP checksum is non zero, then the hardware should
* compute and update it.
*/
#define TX_BD_LONG_LFLAGS_OT_IP_CHKSUM UINT32_C(0x2000)
@@ -3554,7 +3705,7 @@ typedef struct tx_bd_long_hi {
* - Wh+/SR - this option is not supported.
* - Thor - cfa_meta[15:0] is used for metadata output if en_bd_meta
* is set in the Lookup Table.
- * - SR2 - {4’d0, cfa_meta[27:0]} is used for metadata output if
+ * - SR2 - {4'd0, cfa_meta[27:0]} is used for metadata output if
* en_bd_meta is set in the Lookup Table.
*/
#define TX_BD_LONG_CFA_META_KEY_METADATA_TRANSFER (UINT32_C(0x2) << 28)
@@ -3650,7 +3801,8 @@ typedef struct tx_bd_long_inline {
* This field must be valid on the first BD of a packet.
*/
uint32_t opaque;
- uint64_t unused1;
+ uint32_t unused1_lo;
+ uint32_t unused1_hi;
/*
* All bits in this field must be valid on the first BD of a packet.
* Their value on other BDs of the packet is ignored.
@@ -3859,7 +4011,7 @@ typedef struct tx_bd_long_inline {
* - Wh+/SR - this option is not supported.
* - Thor - cfa_meta[15:0] is used for metadata output if en_bd_meta
* is set in the Lookup Table.
- * - SR2 - {4’d0, cfa_meta[27:0]} is used for metadata output if
+ * - SR2 - {4'd0, cfa_meta[27:0]} is used for metadata output if
* en_bd_meta is set in the Lookup Table.
*/
#define TX_BD_LONG_INLINE_CFA_META_KEY_METADATA_TRANSFER (UINT32_C(0x2) << 28)
@@ -3927,7 +4079,8 @@ typedef struct tx_bd_mp_cmd {
* Tx mid-path command.
*/
uint32_t opaque;
- uint64_t unused1;
+ uint32_t unused1_lo;
+ uint32_t unused1_hi;
} tx_bd_mp_cmd_t, *ptx_bd_mp_cmd_t;
/* tx_bd_presync_cmd (size:128b/16B) */
@@ -3987,6 +4140,96 @@ typedef struct tx_bd_presync_cmd {
uint32_t unused_1;
} tx_bd_presync_cmd_t, *ptx_bd_presync_cmd_t;
+/*
+ * This structure is used to send additional information for transmitting
+ * packets using timed transmit scheduling. It must only to be applied as
+ * the second BD of a BD chain that represents a packet. Any subsequent
+ * BDs will follow the timed transmit BD.
+ */
+/* tx_bd_timedtx (size:128b/16B) */
+
+typedef struct tx_bd_timedtx {
+ uint16_t flags_type;
+ /* This value identifies the type of buffer descriptor. */
+ #define TX_BD_TIMEDTX_TYPE_MASK UINT32_C(0x3f)
+ #define TX_BD_TIMEDTX_TYPE_SFT 0
+ /*
+ * Indicates a timed transmit BD. This is a 16b BD that is inserted
+ * into a packet BD chain immediately after the first BD. It is used
+ * to control the flow in a timed transmit operation.
+ */
+ #define TX_BD_TIMEDTX_TYPE_TX_BD_TIMEDTX UINT32_C(0xa)
+ #define TX_BD_TIMEDTX_TYPE_LAST TX_BD_TIMEDTX_TYPE_TX_BD_TIMEDTX
+ /* Unless otherwise stated, sub-fields of this field are always valid. */
+ #define TX_BD_TIMEDTX_FLAGS_MASK UINT32_C(0xffc0)
+ #define TX_BD_TIMEDTX_FLAGS_SFT 6
+ /*
+ * This value identifies the kind of buffer timed transmit mode that
+ * is to be enabled for the packet.
+ */
+ #define TX_BD_TIMEDTX_FLAGS_KIND_MASK UINT32_C(0x1c0)
+ #define TX_BD_TIMEDTX_FLAGS_KIND_SFT 6
+ /*
+ * This timed transmit mode indicates that the packet will be
+ * scheduled and send immediately (or as soon as possible), once
+ * it is scheduled in the transmitter.
+ * Note: This mode is similar to regular (non-timed transmit)
+ * operation. Its main purpose is to cancel pace mode timed
+ * transmit.
+ */
+ #define TX_BD_TIMEDTX_FLAGS_KIND_ASAP (UINT32_C(0x0) << 6)
+ /*
+ * This timed transmit mode is used to schedule transmission of
+ * the packet no earlier than the time given in the tx_time
+ * field of the BD.
+ * Note: In case subsequent packets don't include a timed transmit
+ * BD, they will be scheduled subsequently for transmission
+ * without any timed transmit constraint.
+ */
+ #define TX_BD_TIMEDTX_FLAGS_KIND_SO_TXTIME (UINT32_C(0x1) << 6)
+ /*
+ * This timed transmit mode is used to enable rate control for the
+ * flow (QP) at a rate as defined by the rate field of this BD.
+ * Note: In case subsequent, adjacent packets on the same flow
*** 82442 LINES SKIPPED ***