git: 788cf499da8a - stable/13 - arm64: Add MRS_REG_ALT_NAME ID register macros
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Date: Mon, 15 Jul 2024 12:38:18 UTC
The branch stable/13 has been updated by andrew:
URL: https://cgit.FreeBSD.org/src/commit/?id=788cf499da8ab80570a868a3ad0ffc74595ac720
commit 788cf499da8ab80570a868a3ad0ffc74595ac720
Author: Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2024-05-13 13:58:45 +0000
Commit: Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2024-07-15 12:34:29 +0000
arm64: Add MRS_REG_ALT_NAME ID register macros
These can be used even when the compiler is too old for the register
to be included.
Reviewed by: Zachary Leaf <zachary.leaf@arm.com>
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D45176
(cherry picked from commit d6d860c7ff5c4cbe9475d98000407d6f0ea84b47)
---
sys/arm64/include/armreg.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 9add7515967a..92ad96550e56 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -494,6 +494,7 @@
/* ID_AA64AFR0_EL1 */
#define ID_AA64AFR0_EL1 MRS_REG(ID_AA64AFR0_EL1)
+#define ID_AA64AFR0_EL1_REG MRS_REG_ALT_NAME(ID_AA64AFR0_EL1)
#define ID_AA64AFR0_EL1_op0 3
#define ID_AA64AFR0_EL1_op1 0
#define ID_AA64AFR0_EL1_CRn 0
@@ -502,6 +503,7 @@
/* ID_AA64AFR1_EL1 */
#define ID_AA64AFR1_EL1 MRS_REG(ID_AA64AFR1_EL1)
+#define ID_AA64AFR1_EL1_REG MRS_REG_ALT_NAME(ID_AA64AFR1_EL1)
#define ID_AA64AFR1_EL1_op0 3
#define ID_AA64AFR1_EL1_op1 0
#define ID_AA64AFR1_EL1_CRn 0
@@ -510,6 +512,7 @@
/* ID_AA64DFR0_EL1 */
#define ID_AA64DFR0_EL1 MRS_REG(ID_AA64DFR0_EL1)
+#define ID_AA64DFR0_EL1_REG MRS_REG_ALT_NAME(ID_AA64DFR0_EL1)
#define ID_AA64DFR0_EL1_op0 3
#define ID_AA64DFR0_EL1_op1 0
#define ID_AA64DFR0_EL1_CRn 0
@@ -599,6 +602,7 @@
/* ID_AA64DFR1_EL1 */
#define ID_AA64DFR1_EL1 MRS_REG(ID_AA64DFR1_EL1)
+#define ID_AA64DFR1_EL1_REG MRS_REG_ALT_NAME(ID_AA64DFR1_EL1)
#define ID_AA64DFR1_EL1_op0 3
#define ID_AA64DFR1_EL1_op1 0
#define ID_AA64DFR1_EL1_CRn 0
@@ -607,6 +611,7 @@
/* ID_AA64ISAR0_EL1 */
#define ID_AA64ISAR0_EL1 MRS_REG(ID_AA64ISAR0_EL1)
+#define ID_AA64ISAR0_EL1_REG MRS_REG_ALT_NAME(ID_AA64ISAR0_EL1)
#define ID_AA64ISAR0_EL1_op0 3
#define ID_AA64ISAR0_EL1_op1 0
#define ID_AA64ISAR0_EL1_CRn 0
@@ -693,6 +698,7 @@
/* ID_AA64ISAR1_EL1 */
#define ID_AA64ISAR1_EL1 MRS_REG(ID_AA64ISAR1_EL1)
+#define ID_AA64ISAR1_EL1_REG MRS_REG_ALT_NAME(ID_AA64ISAR1_EL1)
#define ID_AA64ISAR1_EL1_op0 3
#define ID_AA64ISAR1_EL1_op1 0
#define ID_AA64ISAR1_EL1_CRn 0
@@ -794,6 +800,7 @@
/* ID_AA64ISAR2_EL1 */
#define ID_AA64ISAR2_EL1 MRS_REG(ID_AA64ISAR2_EL1)
+#define ID_AA64ISAR2_EL1_REG MRS_REG_ALT_NAME(ID_AA64ISAR2_EL1)
#define ID_AA64ISAR2_EL1_op0 3
#define ID_AA64ISAR2_EL1_op1 0
#define ID_AA64ISAR2_EL1_CRn 0
@@ -841,6 +848,7 @@
/* ID_AA64MMFR0_EL1 */
#define ID_AA64MMFR0_EL1 MRS_REG(ID_AA64MMFR0_EL1)
+#define ID_AA64MMFR0_EL1_REG MRS_REG_ALT_NAME(ID_AA64MMFR0_EL1)
#define ID_AA64MMFR0_EL1_op0 3
#define ID_AA64MMFR0_EL1_op1 0
#define ID_AA64MMFR0_EL1_CRn 0
@@ -932,6 +940,7 @@
/* ID_AA64MMFR1_EL1 */
#define ID_AA64MMFR1_EL1 MRS_REG(ID_AA64MMFR1_EL1)
+#define ID_AA64MMFR1_EL1_REG MRS_REG_ALT_NAME(ID_AA64MMFR1_EL1)
#define ID_AA64MMFR1_EL1_op0 3
#define ID_AA64MMFR1_EL1_op1 0
#define ID_AA64MMFR1_EL1_CRn 0
@@ -1019,6 +1028,7 @@
/* ID_AA64MMFR2_EL1 */
#define ID_AA64MMFR2_EL1 MRS_REG(ID_AA64MMFR2_EL1)
+#define ID_AA64MMFR2_EL1_REG MRS_REG_ALT_NAME(ID_AA64MMFR2_EL1)
#define ID_AA64MMFR2_EL1_op0 3
#define ID_AA64MMFR2_EL1_op1 0
#define ID_AA64MMFR2_EL1_CRn 0
@@ -1105,6 +1115,7 @@
/* ID_AA64MMFR3_EL1 */
#define ID_AA64MMFR3_EL1 MRS_REG(ID_AA64MMFR3_EL1)
+#define ID_AA64MMFR3_EL1_REG MRS_REG_ALT_NAME(ID_AA64MMFR3_EL1)
#define ID_AA64MMFR3_EL1_op0 3
#define ID_AA64MMFR3_EL1_op1 0
#define ID_AA64MMFR3_EL1_CRn 0
@@ -1133,6 +1144,7 @@
/* ID_AA64MMFR4_EL1 */
#define ID_AA64MMFR4_EL1 MRS_REG(ID_AA64MMFR4_EL1)
+#define ID_AA64MMFR4_EL1_REG MRS_REG_ALT_NAME(ID_AA64MMFR4_EL1)
#define ID_AA64MMFR4_EL1_op0 3
#define ID_AA64MMFR4_EL1_op1 0
#define ID_AA64MMFR4_EL1_CRn 0
@@ -1141,6 +1153,7 @@
/* ID_AA64PFR0_EL1 */
#define ID_AA64PFR0_EL1 MRS_REG(ID_AA64PFR0_EL1)
+#define ID_AA64PFR0_EL1_REG MRS_REG_ALT_NAME(ID_AA64PFR0_EL1)
#define ID_AA64PFR0_EL1_op0 3
#define ID_AA64PFR0_EL1_op1 0
#define ID_AA64PFR0_EL1_CRn 0
@@ -1239,6 +1252,7 @@
/* ID_AA64PFR1_EL1 */
#define ID_AA64PFR1_EL1 MRS_REG(ID_AA64PFR1_EL1)
+#define ID_AA64PFR1_EL1_REG MRS_REG_ALT_NAME(ID_AA64PFR1_EL1)
#define ID_AA64PFR1_EL1_op0 3
#define ID_AA64PFR1_EL1_op1 0
#define ID_AA64PFR1_EL1_CRn 0
@@ -1297,6 +1311,7 @@
/* ID_AA64PFR2_EL1 */
#define ID_AA64PFR2_EL1 MRS_REG(ID_AA64PFR2_EL1)
+#define ID_AA64PFR2_EL1_REG MRS_REG_ALT_NAME(ID_AA64PFR2_EL1)
#define ID_AA64PFR2_EL1_op0 3
#define ID_AA64PFR2_EL1_op1 0
#define ID_AA64PFR2_EL1_CRn 0