git: df3e8fcf651e - stable/13 - Mark the arm64 PSR register fields with UL

From: Andrew Turner <andrew_at_FreeBSD.org>
Date: Mon, 15 Jul 2024 12:37:59 UTC
The branch stable/13 has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=df3e8fcf651e8dc6c489ccb94fd777cd4511b1e3

commit df3e8fcf651e8dc6c489ccb94fd777cd4511b1e3
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2023-03-22 16:46:25 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2024-07-15 12:34:28 +0000

    Mark the arm64 PSR register fields with UL
    
    These are for a 64 bit register. Make them 64 bit values on arm64.
    
    Sponsored by:   Arm Ltd
    
    (cherry picked from commit 6a4f5fdd19d6de8612998eb7c62273fd8b8c3908)
---
 sys/arm64/include/armreg.h | 46 +++++++++++++++++++++++-----------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 22bb71dbea51..3feb048b2bc8 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -2052,32 +2052,32 @@
  *         0: always SP0
  *         1: current ELs SP
  */
-#define	PSR_M_EL0t	0x00000000
-#define	PSR_M_EL1t	0x00000004
-#define	PSR_M_EL1h	0x00000005
-#define	PSR_M_EL2t	0x00000008
-#define	PSR_M_EL2h	0x00000009
-#define	PSR_M_64	0x00000000
-#define	PSR_M_32	0x00000010
-#define	PSR_M_MASK	0x0000000f
-
-#define	PSR_T		0x00000020
-
-#define	PSR_AARCH32	0x00000010
-#define	PSR_F		0x00000040
-#define	PSR_I		0x00000080
-#define	PSR_A		0x00000100
-#define	PSR_D		0x00000200
+#define	PSR_M_EL0t	0x00000000UL
+#define	PSR_M_EL1t	0x00000004UL
+#define	PSR_M_EL1h	0x00000005UL
+#define	PSR_M_EL2t	0x00000008UL
+#define	PSR_M_EL2h	0x00000009UL
+#define	PSR_M_64	0x00000000UL
+#define	PSR_M_32	0x00000010UL
+#define	PSR_M_MASK	0x0000000fUL
+
+#define	PSR_T		0x00000020UL
+
+#define	PSR_AARCH32	0x00000010UL
+#define	PSR_F		0x00000040UL
+#define	PSR_I		0x00000080UL
+#define	PSR_A		0x00000100UL
+#define	PSR_D		0x00000200UL
 #define	PSR_DAIF	(PSR_D | PSR_A | PSR_I | PSR_F)
 /* The default DAIF mask. These bits are valid in spsr_el1 and daif */
 #define	PSR_DAIF_DEFAULT (PSR_F)
-#define	PSR_IL		0x00100000
-#define	PSR_SS		0x00200000
-#define	PSR_V		0x10000000
-#define	PSR_C		0x20000000
-#define	PSR_Z		0x40000000
-#define	PSR_N		0x80000000
-#define	PSR_FLAGS	0xf0000000
+#define	PSR_IL		0x00100000UL
+#define	PSR_SS		0x00200000UL
+#define	PSR_V		0x10000000UL
+#define	PSR_C		0x20000000UL
+#define	PSR_Z		0x40000000UL
+#define	PSR_N		0x80000000UL
+#define	PSR_FLAGS	0xf0000000UL
 /* PSR fields that can be set from 32-bit and 64-bit processes */
 #define	PSR_SETTABLE_32	PSR_FLAGS
 #define	PSR_SETTABLE_64	(PSR_FLAGS | PSR_SS)