git: 0ea3e76c4bae - stable/14 - arm64: Add ISS_MSR_REG for ESR_ELx.ISS values
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Date: Mon, 15 Jul 2024 12:37:55 UTC
The branch stable/14 has been updated by andrew:
URL: https://cgit.FreeBSD.org/src/commit/?id=0ea3e76c4baef06c344267209d45c778e2cab04d
commit 0ea3e76c4baef06c344267209d45c778e2cab04d
Author: Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2024-02-21 18:10:19 +0000
Commit: Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2024-07-15 12:21:45 +0000
arm64: Add ISS_MSR_REG for ESR_ELx.ISS values
Add a macro to get the ESR_ELx ISS value when we trap accessing a
special register.
(cherry picked from commit 09ac9cf8971a0709bb8d5a3a703cd3dbff882b6f)
---
sys/arm64/include/armreg.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index f3af9edec4c4..6f9e109f4b70 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -365,6 +365,12 @@
#define ISS_MSR_REG_MASK \
(ISS_MSR_OP0_MASK | ISS_MSR_OP2_MASK | ISS_MSR_OP1_MASK | \
ISS_MSR_CRn_MASK | ISS_MSR_CRm_MASK)
+#define ISS_MSR_REG(reg) \
+ (((reg ## _op0) << ISS_MSR_OP0_SHIFT) | \
+ ((reg ## _op1) << ISS_MSR_OP1_SHIFT) | \
+ ((reg ## _CRn) << ISS_MSR_CRn_SHIFT) | \
+ ((reg ## _CRm) << ISS_MSR_CRm_SHIFT) | \
+ ((reg ## _op2) << ISS_MSR_OP2_SHIFT))
#define ISS_DATA_ISV_SHIFT 24
#define ISS_DATA_ISV (0x01 << ISS_DATA_ISV_SHIFT)