git: e4d8fe76c5d4 - stable/14 - amdsmn(4), amdtemp(4): add support for AMD Family 19h Models 10h-1Fh.
- Go to: [ bottom of page ] [ top of archives ] [ this month ]
Date: Sun, 21 Apr 2024 03:16:07 UTC
The branch stable/14 has been updated by delphij:
URL: https://cgit.FreeBSD.org/src/commit/?id=e4d8fe76c5d4833d2ba5b889b8af3e0d2907a531
commit e4d8fe76c5d4833d2ba5b889b8af3e0d2907a531
Author: Xin LI <delphij@FreeBSD.org>
AuthorDate: 2024-04-14 07:45:17 +0000
Commit: Xin LI <delphij@FreeBSD.org>
CommitDate: 2024-04-21 03:15:52 +0000
amdsmn(4), amdtemp(4): add support for AMD Family 19h Models 10h-1Fh.
Tested on AMD Threadripper 7960X.
PR: kern/278311
Tested by: jbo
(cherry picked from commit 51c69c8682e8ab0e5d82ab3d6f2d16419d40bad4)
---
sys/dev/amdsmn/amdsmn.c | 7 +++++++
sys/dev/amdtemp/amdtemp.c | 14 +++++++++++++-
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/sys/dev/amdsmn/amdsmn.c b/sys/dev/amdsmn/amdsmn.c
index bf2222bed5e3..36e3c5a5cae7 100644
--- a/sys/dev/amdsmn/amdsmn.c
+++ b/sys/dev/amdsmn/amdsmn.c
@@ -59,6 +59,7 @@
#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
+#define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
struct pciid;
@@ -103,6 +104,12 @@ static const struct pciid {
.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
+ {
+ .amdsmn_vendorid = CPU_VENDOR_AMD,
+ .amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M10H_ROOT,
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
{
.amdsmn_vendorid = CPU_VENDOR_AMD,
.amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT,
diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c
index b01ebe101c6b..73a4ba86bb84 100644
--- a/sys/dev/amdtemp/amdtemp.c
+++ b/sys/dev/amdtemp/amdtemp.c
@@ -70,7 +70,11 @@ typedef enum {
CCD6,
CCD7,
CCD8,
- CCD_MAX = CCD8,
+ CCD9,
+ CCD10,
+ CCD11,
+ CCD12,
+ CCD_MAX = CCD12,
NUM_CCDS = CCD_MAX - CCD_BASE + 1,
} amdsensor_t;
@@ -110,6 +114,7 @@ struct amdtemp_softc {
#define DEVICEID_AMD_HOSTB17H_M10H_ROOT 0x15d0
#define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630
+#define DEVICEID_AMD_HOSTB19H_M10H_ROOT 0x14a4
#define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8
static const struct amdtemp_product {
@@ -135,6 +140,7 @@ static const struct amdtemp_product {
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M10H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },
+ { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M10H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },
};
@@ -181,6 +187,7 @@ static const struct amdtemp_product {
#define AMDTEMP_17H_CCD_TMP_BASE 0x59954
#define AMDTEMP_17H_CCD_TMP_VALID (1u << 11)
+#define AMDTEMP_ZEN4_10H_CCD_TMP_BASE 0x59b00
#define AMDTEMP_ZEN4_CCD_TMP_BASE 0x59b08
/*
@@ -861,6 +868,11 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
maxreg = 8;
_Static_assert((int)NUM_CCDS >= 8, "");
break;
+ case 0x10 ... 0x1f:
+ sc->sc_temp_base = AMDTEMP_ZEN4_10H_CCD_TMP_BASE;
+ maxreg = 12;
+ _Static_assert((int)NUM_CCDS >= 12, "");
+ break;
case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE;
maxreg = 8;