git: 98796fffb6cd - stable/13 - bhyve/ioapic: only account for asserted line in level mode

The branch stable/13 has been updated by jhb:

URL: https://cgit.FreeBSD.org/src/commit/?id=98796fffb6cd86d604f3f3c13f2a777346a2f0fa

commit 98796fffb6cd86d604f3f3c13f2a777346a2f0fa
Author:     Roger Pau Monné <royger@FreeBSD.org>
AuthorDate: 2021-01-19 12:41:03 +0000
Commit:     John Baldwin <jhb@FreeBSD.org>
CommitDate: 2023-01-26 18:33:06 +0000

    bhyve/ioapic: only account for asserted line in level mode
    
    After modifying a redirection entry only try to inject an interrupt if
    the pin is in level mode, pins in edge mode shouldn't take into
    account the line assert status as they are triggered by edge changes,
    not the line status itself.
    
    Reviewed by:            grehan
    Differential revision:  https://reviews.freebsd.org/D28237
    
    (cherry picked from commit d7d067698a38a3464a58eb34f68f63e529c45136)
---
 sys/amd64/vmm/io/vioapic.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sys/amd64/vmm/io/vioapic.c b/sys/amd64/vmm/io/vioapic.c
index 682e862da63e..941f7c7364bc 100644
--- a/sys/amd64/vmm/io/vioapic.c
+++ b/sys/amd64/vmm/io/vioapic.c
@@ -364,9 +364,11 @@ vioapic_write(struct vioapic *vioapic, int vcpuid, uint32_t addr, uint32_t data)
 		/*
 		 * Generate an interrupt if the following conditions are met:
 		 * - previous interrupt has been EOIed
+		 * - pin trigger mode is level
 		 * - pin level is asserted
 		 */
 		if ((vioapic->rtbl[pin].reg & IOART_REM_IRR) == 0 &&
+		    (vioapic->rtbl[pin].reg & IOART_TRGRMOD) == IOART_TRGRLVL &&
 		    (vioapic->rtbl[pin].acnt > 0)) {
 			VIOAPIC_CTR2(vioapic, "ioapic pin%d: asserted at rtbl "
 			    "write, acnt %d", pin, vioapic->rtbl[pin].acnt);