From nobody Mon Jan 23 12:37:43 2023 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4P0qPg2v8xz3bT5w; Mon, 23 Jan 2023 12:37:43 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4P0qPg1xMhz3CP3; Mon, 23 Jan 2023 12:37:43 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1674477463; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=//TKDj+TZsnCFh43GVidwNL1YZJ6cPwXVPh4TrhpYsM=; b=bVrZXj4Tbl341GdRsyVnLPHsD4G2I0N+z1GPY+UKvlhrnBWzRFOfQd9rh/WHD6SQaM1dFu Zu+sYH8t85ZbqhuAwGMpcvX6PtIFG3blpyra3PL51cA4BmEpgNUFtMb6WNF2yEsh9Wy8IK B4WUU/TwKAy2I4xaveM4NkyHi7X2NTgo5Ztf9IXza9aBXLhBfUQTV3IGWVYEqbIaIAFR23 yEsOeM9FlF+R1hGR5Kal5GW5ANLh17LNYOE6V/wGK3y6uhtfOcu8i++iPXNCpZYLUW3B21 srNIqhhf5Dy8I5VrmVD22Cmy97KEBjAzXn2SgWEADF8yhzzGZ+bUPN3Cy5N75Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1674477463; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=//TKDj+TZsnCFh43GVidwNL1YZJ6cPwXVPh4TrhpYsM=; b=O27C0tuNsfiwjlpaOeTPl6lCVUTlisoWyRWCqu8zf8lAV28Gy7QpAycFJ/mcHsXEFBgI67 PoIQlZ60+EFVXM1iQ/cARrw5kLZnBKZR8F8LSU8yjKVyFr6T+c1gPJ7jKpMXfJvuPwvo8q /DulnZd24MtXg4JhIjeNJHJPA5AiL1VJk+c5IFnqpWeQy5ADAYuKMnTH/kmIiZCNb6qP2h izTjj54XXhwVFbidRFOHMQYcfwStXXg+wtbMurk0hAs0GTdTU3SeY9i8Vxot0fP+cbMtFJ bZ4BpXdcnIuuGKgmRHU0WfnH5aePKaAOxzQSs7VfosytOoA4wr03QffvN4Spbw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1674477463; a=rsa-sha256; cv=none; b=FemL8h2SQvwuSB6tiKgcY99dfLxQFEV2+0apJv+QF6g76azEEF9n55CWUoilwICnsU/bQO DLQl1lGeTLJIFZvsoJoAsPfUGkFUj/H1ZxEmbO2mTyRHOF+ypugzoBjLoQyoOKLT6NaSjW qNXUM+hYJ550lnUxZTyFx5nzPKwbDFyDG3DIwGkcvW3Conq4SIvf26wDt/bM/hhgneYqdg eoYNSwuLb0Jb/Fl4w3xdquUtzMb4qCzsPd45sGyOnOUra9NuciRFgqfpFlU7iSe/UI+yYV C0VIC0hz0T7/xfZbJzoLpv2B8oHYnss1nii1zOPpVRElhEKQNSXgV9fMgLqTkw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4P0qPg12t6zTHM; Mon, 23 Jan 2023 12:37:43 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 30NCbhXD085473; Mon, 23 Jan 2023 12:37:43 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 30NCbhVG085472; Mon, 23 Jan 2023 12:37:43 GMT (envelope-from git) Date: Mon, 23 Jan 2023 12:37:43 GMT Message-Id: <202301231237.30NCbhVG085472@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Andrew Turner Subject: git: 359cfad59e01 - stable/13 - Split out the arm64 EL2 exception vectors List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 359cfad59e011221aa697e87eae19217a58bf698 Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=359cfad59e011221aa697e87eae19217a58bf698 commit 359cfad59e011221aa697e87eae19217a58bf698 Author: Andrew Turner AuthorDate: 2022-10-31 15:08:26 +0000 Commit: Andrew Turner CommitDate: 2023-01-23 12:36:28 +0000 Split out the arm64 EL2 exception vectors These were originally in locore.S as they are only needed so we have a valid value to put into the vbar_el2 register. As these will soon be used by bhyve so move them to a new file as we already have with the EL1 exception vectors in exception.S. Obtained from: https://github.com/FreeBSD-UPB/freebsd-src (earlier version) Sponsored by: Innovate UK Sponsored by: The FreeBSD Foundation (cherry picked from commit 8a2adde1e4b3fb4230cd39c151c79e73e26b575d) --- sys/arm64/arm64/hyp_stub.S | 65 ++++++++++++++++++++++++++++++++++++++++++++++ sys/arm64/arm64/locore.S | 30 ++------------------- sys/conf/files.arm64 | 1 + 3 files changed, 68 insertions(+), 28 deletions(-) diff --git a/sys/arm64/arm64/hyp_stub.S b/sys/arm64/arm64/hyp_stub.S new file mode 100644 index 000000000000..42f76da95062 --- /dev/null +++ b/sys/arm64/arm64/hyp_stub.S @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2017 Alexandru Elisei + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include + +.macro vempty + .align 7 + 1: b 1b +.endm + +/* + * Install a new exception vector table with the base address supplied by the + * parameter in register x0. + */ +.macro vector_stub_el1h_sync + .align 7 + msr vbar_el2, x0 + ERET +.endm + + .align 11 + .globl hyp_stub_vectors +hyp_stub_vectors: + vempty /* Synchronous EL2t */ + vempty /* IRQ EL2t */ + vempty /* FIQ EL2t */ + vempty /* SError EL2t */ + + vempty /* Synchronous EL2h */ + vempty /* IRQ EL2h */ + vempty /* FIQ EL2h */ + vempty /* SError EL2h */ + + vector_stub_el1h_sync /* Synchronous 64-bit EL1 */ + vempty /* IRQ 64-bit EL1 */ + vempty /* FIQ 64-bit EL1 */ + vempty /* SError 64-bit EL1 */ + + vempty /* Synchronous 32-bit EL1 */ + vempty /* IRQ 32-bit EL1 */ + vempty /* FIQ 32-bit EL1 */ + vempty /* SError 32-bit EL1 */ diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index 70ddfe4893f3..bcf60ea0540e 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -279,8 +279,8 @@ LENTRY(drop_to_el1) msr cntvoff_el2, xzr /* Hypervisor trap functions */ - adrp x2, hyp_vectors - add x2, x2, :lo12:hyp_vectors + adrp x2, hyp_stub_vectors + add x2, x2, :lo12:hyp_stub_vectors msr vbar_el2, x2 /* Zero vttbr_el2 so a hypervisor can tell the host and guest apart */ @@ -314,32 +314,6 @@ LENTRY(drop_to_el1) .quad SCTLR_RES1 LEND(drop_to_el1) -#define VECT_EMPTY \ - .align 7; \ - 1: b 1b - - .align 11 -hyp_vectors: - VECT_EMPTY /* Synchronous EL2t */ - VECT_EMPTY /* IRQ EL2t */ - VECT_EMPTY /* FIQ EL2t */ - VECT_EMPTY /* Error EL2t */ - - VECT_EMPTY /* Synchronous EL2h */ - VECT_EMPTY /* IRQ EL2h */ - VECT_EMPTY /* FIQ EL2h */ - VECT_EMPTY /* Error EL2h */ - - VECT_EMPTY /* Synchronous 64-bit EL1 */ - VECT_EMPTY /* IRQ 64-bit EL1 */ - VECT_EMPTY /* FIQ 64-bit EL1 */ - VECT_EMPTY /* Error 64-bit EL1 */ - - VECT_EMPTY /* Synchronous 32-bit EL1 */ - VECT_EMPTY /* IRQ 32-bit EL1 */ - VECT_EMPTY /* FIQ 32-bit EL1 */ - VECT_EMPTY /* Error 32-bit EL1 */ - /* * Get the delta between the physical address we were loaded to and the * virtual address we expect to run from. This is used when building the diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64 index f136779ad874..563d62859258 100644 --- a/sys/conf/files.arm64 +++ b/sys/conf/files.arm64 @@ -51,6 +51,7 @@ arm64/arm64/gicv3_its.c optional intrng fdt arm64/arm64/gic_v3.c standard arm64/arm64/gic_v3_acpi.c optional acpi arm64/arm64/gic_v3_fdt.c optional fdt +arm64/arm64/hyp_stub.S standard arm64/arm64/identcpu.c standard arm64/arm64/locore.S standard no-obj arm64/arm64/machdep.c standard