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Fri, 20 Jan 2023 03:23:57 GMT (envelope-from git) Date: Fri, 20 Jan 2023 03:23:57 GMT Message-Id: <202301200323.30K3NvKn042871@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Konstantin Belousov Subject: git: 1532ec2ba279 - stable/13 - amd64: be more precise when enabling the AlderLake small core PCID workaround List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: kib X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 1532ec2ba2794af0d0b20832a154eeda2fa0e1cc Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch stable/13 has been updated by kib: URL: https://cgit.FreeBSD.org/src/commit/?id=1532ec2ba2794af0d0b20832a154eeda2fa0e1cc commit 1532ec2ba2794af0d0b20832a154eeda2fa0e1cc Author: Konstantin Belousov AuthorDate: 2023-01-03 10:13:07 +0000 Commit: Konstantin Belousov CommitDate: 2023-01-20 03:22:10 +0000 amd64: be more precise when enabling the AlderLake small core PCID workaround Tested by: pho (cherry picked from commit a2c08eba43a2c0ebeac7117f708fb9392022a300) --- sys/amd64/amd64/initcpu.c | 35 ++++++++++++++++++++++------------- sys/amd64/amd64/machdep.c | 8 ++++++++ sys/amd64/amd64/pmap.c | 3 --- sys/amd64/include/md_var.h | 1 + 4 files changed, 31 insertions(+), 16 deletions(-) diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 08385d3095d0..cddf8502437e 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -247,6 +247,26 @@ cpu_auxmsr(void) return (PCPU_GET(cpuid)); } +void +cpu_init_small_core(void) +{ + u_int r[4]; + + if (cpu_high < 0x1a) + return; + + cpuid_count(0x1a, 0, r); + if ((r[0] & CPUID_HYBRID_CORE_MASK) != CPUID_HYBRID_SMALL_CORE) + return; + + PCPU_SET(small_core, 1); + if (pmap_pcid_enabled && invpcid_works && + pmap_pcid_invlpg_workaround_uena) { + PCPU_SET(pcid_invlpg_workaround, 1); + pmap_pcid_invlpg_workaround = 1; + } +} + /* * Initialize CPU control registers */ @@ -255,7 +275,6 @@ initializecpu(void) { uint64_t msr; uint32_t cr4; - u_int r[4]; cr4 = rcr4(); if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) { @@ -319,18 +338,8 @@ initializecpu(void) (cpu_stdext_feature2 & CPUID_STDEXT2_RDPID) != 0) wrmsr(MSR_TSC_AUX, cpu_auxmsr()); - if (cpu_high >= 0x1a) { - cpuid_count(0x1a, 0, r); - if ((r[0] & CPUID_HYBRID_CORE_MASK) == - CPUID_HYBRID_SMALL_CORE) { - PCPU_SET(small_core, 1); - if (pmap_pcid_enabled && - pmap_pcid_invlpg_workaround_uena) { - PCPU_SET(pcid_invlpg_workaround, 1); - pmap_pcid_invlpg_workaround = 1; - } - } - } + if (!IS_BSP()) + cpu_init_small_core(); } void diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c index cfe7e2518e58..3c365b5d6e62 100644 --- a/sys/amd64/amd64/machdep.c +++ b/sys/amd64/amd64/machdep.c @@ -1352,6 +1352,14 @@ hammer_time(u_int64_t modulep, u_int64_t physfree) pmap_pcid_enabled = 0; } + /* + * Now we can do small core initialization, after the PCID + * CPU features and user knobs are evaluated. + */ + TUNABLE_INT_FETCH("vm.pmap.pcid_invlpg_workaround", + &pmap_pcid_invlpg_workaround_uena); + cpu_init_small_core(); + link_elf_ireloc(kmdp); /* diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index e990ed0b93af..facbc6d3dd81 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -2524,9 +2524,6 @@ pmap_init(void) VM_PAGE_TO_PHYS(m); } } - - TUNABLE_INT_FETCH("vm.pmap.pcid_invlpg_workaround", - &pmap_pcid_invlpg_workaround_uena); } SYSCTL_UINT(_vm_pmap, OID_AUTO, large_map_pml4_entries, diff --git a/sys/amd64/include/md_var.h b/sys/amd64/include/md_var.h index 53139711bbff..c8610f495bfe 100644 --- a/sys/amd64/include/md_var.h +++ b/sys/amd64/include/md_var.h @@ -66,6 +66,7 @@ void amd64_bsp_ist_init(struct pcpu *pc); void amd64_syscall(struct thread *td, int traced); void amd64_syscall_ret_flush_l1d(int error); void amd64_syscall_ret_flush_l1d_recalc(void); +void cpu_init_small_core(void); void doreti_iret(void) __asm(__STRING(doreti_iret)); void doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault)); void flush_l1d_sw_abi(void);