git: d4cae9c5e63e - stable/13 - bhyve: add config option to modify LPC IDs

From: Corvin Köhne <corvink_at_FreeBSD.org>
Date: Fri, 28 Apr 2023 10:40:16 UTC
The branch stable/13 has been updated by corvink:

URL: https://cgit.FreeBSD.org/src/commit/?id=d4cae9c5e63e110fbdc954f9366bf5c7e567b88a

commit d4cae9c5e63e110fbdc954f9366bf5c7e567b88a
Author:     Corvin Köhne <corvink@FreeBSD.org>
AuthorDate: 2021-11-23 12:14:41 +0000
Commit:     Corvin Köhne <corvink@FreeBSD.org>
CommitDate: 2023-04-28 07:28:13 +0000

    bhyve: add config option to modify LPC IDs
    
    The Intel GOP driver checks the LPC IDs to detect the platform it's
    running on. The GOP driver only works on the platforms it's written for.
    Maybe other Intel driver have the same behaviour. For that reason, we
    should use the LPC IDs of the FreeBSD host for GPU passthrough to work
    properly.
    
    We don't know if setting different LPC IDs have any side effect.
    Therefore, don't use the host LPC IDs by default on Intel system. Give
    the user the opportunity to modify the LPC IDs.
    
    Reviewed by:            jhb
    MFC after:              1 week
    Sponsored by:           Beckhoff Automation GmbH & Co. KG
    Differential Revision:  https://reviews.freebsd.org/D28280
    
    (cherry picked from commit f4ceaff56ddaacc151df07d2d205a2d7fcb736a8)
    
    bhyve: fix spelling mistake of pcireg option
    
    The option is spelled "pcireg" not "pcir".
    
    MFC after:              1 week
    Fixes:                  f4ceaff56ddaacc151df07d2d205a2d7fcb736a8
    Sponsored by:           Beckhoff Automation GmbH & Co. KG
    
    (cherry picked from commit c98d13fbf9c9b75a49e48789932cd1395c95e7bf)
    
    bhyve: scan PCI device functions to find host LPC
    
    At least on some AMD devices the host LPC bridge could be located as
    seperate function of another PCI device.
    
    Fixes:                  f4ceaff56ddaacc151df07d2d205a2d7fcb736a8
    MFC after:              1 week
    Sponsored by:           Beckhoff Automation GmbH & Co. KG
    Differential Revision:  https://reviews.freebsd.org/D39310
    
    (cherry picked from commit d3e03d235e3133f79ff9e3879fd4ed61ace38d73)
    
    bhyve: do not exit if LPC finds no host selector
    
    The host selector is only required when the user likes to use the same
    LPC device IDs as the physical LPC device. This is an uncommon use case.
    For that reason, it makes no sense to exit when we don't find the host
    selector.
    
    Reviewed by:            markj
    MFC after:              1 week
    Sponsored by:           Beckhoff Automation GmbH & Co. KG
    Differential Revision:  https://reviews.freebsd.org/D39311
    
    (cherry picked from commit 0d29d750b9a7188c435d3701b2183f4df15ac98b)
---
 usr.sbin/bhyve/bhyve_config.5 | 14 ++++++++++
 usr.sbin/bhyve/pci_lpc.c      | 61 ++++++++++++++++++++++++++++++++++++++++---
 2 files changed, 72 insertions(+), 3 deletions(-)

diff --git a/usr.sbin/bhyve/bhyve_config.5 b/usr.sbin/bhyve/bhyve_config.5
index 9482d1260e05..26387da0d59e 100644
--- a/usr.sbin/bhyve/bhyve_config.5
+++ b/usr.sbin/bhyve/bhyve_config.5
@@ -542,6 +542,20 @@ for fwctl and
 for fwcfg.
 .It Va pc-testdev Ta bool Ta false Ta
 Enable the PC debug/test device.
+.It Va pcireg.* Ta integer Ta Ta
+Values of PCI register.
+It also accepts the value
+.Ar host
+to use the pci id of the host system.
+This value is required for the Intel GOP driver to work properly.
+.Bl -column "subvendor" "Default"
+.It Sy Name Ta Sy Default
+.It Va vendor Ta 0x8086
+.It Va device Ta 0x7000
+.It Va revid Ta 0
+.It Va subvendor Ta 0
+.It Va subdevice Ta 0
+.El
 .El
 .Ss NVMe Controller Settings
 Each NVMe controller supports a single storage device.
diff --git a/usr.sbin/bhyve/pci_lpc.c b/usr.sbin/bhyve/pci_lpc.c
index ad47230c005e..8213f32985ef 100644
--- a/usr.sbin/bhyve/pci_lpc.c
+++ b/usr.sbin/bhyve/pci_lpc.c
@@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$");
 #include "pci_emul.h"
 #include "pci_irq.h"
 #include "pci_lpc.h"
+#include "pci_passthru.h"
 #include "pctestdev.h"
 #include "uart_emul.h"
 
@@ -448,10 +449,50 @@ pci_lpc_read(struct pci_devinst *pi __unused, int baridx __unused,
 
 #define	LPC_DEV		0x7000
 #define	LPC_VENDOR	0x8086
+#define LPC_REVID	0x00
+#define LPC_SUBVEND_0	0x0000
+#define LPC_SUBDEV_0	0x0000
 
 static int
-pci_lpc_init(struct pci_devinst *pi, nvlist_t *nvl __unused)
+pci_lpc_get_sel(struct pcisel *const sel)
 {
+	assert(sel != NULL);
+
+	memset(sel, 0, sizeof(*sel));
+
+	for (uint8_t slot = 0; slot <= PCI_SLOTMAX; ++slot) {
+		uint8_t max_func = 0;
+
+		sel->pc_dev = slot;
+		sel->pc_func = 0;
+
+		if (read_config(sel, PCIR_HDRTYPE, 1) & PCIM_MFDEV)
+			max_func = PCI_FUNCMAX;
+
+		for (uint8_t func = 0; func <= max_func; ++func) {
+			sel->pc_func = func;
+
+			if ((read_config(sel, PCIR_CLASS, 1) == PCIC_BRIDGE) &&
+			    (read_config(sel, PCIR_SUBCLASS, 1) ==
+				PCIS_BRIDGE_ISA)) {
+				return (0);
+			}
+		}
+	}
+
+	warnx("%s: Unable to find host selector of LPC bridge.", __func__);
+
+	return (-1);
+}
+
+static int
+pci_lpc_init(struct pci_devinst *pi, nvlist_t *nvl)
+{
+	struct pcisel sel = { 0 };
+	struct pcisel *selp = NULL;
+	uint16_t device, subdevice, subvendor, vendor;
+	uint8_t revid;
+
 	/*
 	 * Do not allow more than one LPC bridge to be configured.
 	 */
@@ -473,11 +514,25 @@ pci_lpc_init(struct pci_devinst *pi, nvlist_t *nvl __unused)
 	if (lpc_init(pi->pi_vmctx) != 0)
 		return (-1);
 
+	if (pci_lpc_get_sel(&sel) == 0)
+		selp = &sel;
+
+	vendor = pci_config_read_reg(selp, nvl, PCIR_VENDOR, 2, LPC_VENDOR);
+	device = pci_config_read_reg(selp, nvl, PCIR_DEVICE, 2, LPC_DEV);
+	revid = pci_config_read_reg(selp, nvl, PCIR_REVID, 1, LPC_REVID);
+	subvendor = pci_config_read_reg(selp, nvl, PCIR_SUBVEND_0, 2,
+	    LPC_SUBVEND_0);
+	subdevice = pci_config_read_reg(selp, nvl, PCIR_SUBDEV_0, 2,
+	    LPC_SUBDEV_0);
+
 	/* initialize config space */
-	pci_set_cfgdata16(pi, PCIR_DEVICE, LPC_DEV);
-	pci_set_cfgdata16(pi, PCIR_VENDOR, LPC_VENDOR);
+	pci_set_cfgdata16(pi, PCIR_VENDOR, vendor);
+	pci_set_cfgdata16(pi, PCIR_DEVICE, device);
 	pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_BRIDGE);
 	pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_BRIDGE_ISA);
+	pci_set_cfgdata8(pi, PCIR_REVID, revid);
+	pci_set_cfgdata16(pi, PCIR_SUBVEND_0, subvendor);
+	pci_set_cfgdata16(pi, PCIR_SUBDEV_0, subdevice);
 
 	lpc_bridge = pi;