git: ba50bbb6a20e - stable/13 - amd64 pmap: add comment explaining why INVLPG is functional for PCID config
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Date: Thu, 13 Oct 2022 04:46:09 UTC
The branch stable/13 has been updated by kib:
URL: https://cgit.FreeBSD.org/src/commit/?id=ba50bbb6a20e2649aca73d1f205b0567f906f3ab
commit ba50bbb6a20e2649aca73d1f205b0567f906f3ab
Author: Konstantin Belousov <kib@FreeBSD.org>
AuthorDate: 2022-10-10 00:19:45 +0000
Commit: Konstantin Belousov <kib@FreeBSD.org>
CommitDate: 2022-10-13 04:46:01 +0000
amd64 pmap: add comment explaining why INVLPG is functional for PCID config
(cherry picked from commit e0612ed490c723174607823378d9e883a4b1c257)
---
sys/amd64/amd64/pmap.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c
index 548b7d66dd2b..5d8e636e183d 100644
--- a/sys/amd64/amd64/pmap.c
+++ b/sys/amd64/amd64/pmap.c
@@ -2855,8 +2855,16 @@ pmap_update_pde_invalidate(pmap_t pmap, vm_offset_t va, pd_entry_t newpde)
* page table, and INVPCID(INVPCID_CTXGLOB)/invltlb_glob() for a
* user space page table(s).
*
- * If the INVPCID instruction is available, it is used to flush entries
- * from the kernel page table.
+ * If the INVPCID instruction is available, it is used to flush user
+ * entries from the kernel page table.
+ *
+ * When PCID is enabled, the INVLPG instruction invalidates all TLB
+ * entries for the given page that either match the current PCID or
+ * are global. Since TLB entries for the same page under different
+ * PCIDs are unaffected, kernel pages which reside in all address
+ * spaces could be problematic. We avoid the problem by creating
+ * all kernel PTEs with the global flag (PG_G) set, when PTI is
+ * disabled.
*
* * mode: PTI disabled, PCID present. The kernel reserves PCID 0 for its
* address space, all other 4095 PCIDs are used for user mode spaces