From nobody Tue Oct 05 18:57:59 2021 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 1BBBA17ED1DE; Tue, 5 Oct 2021 18:58:00 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4HP6Kh0Km1z4jkm; Tue, 5 Oct 2021 18:58:00 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id DFA1312020; Tue, 5 Oct 2021 18:57:59 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 195IvxW5048535; Tue, 5 Oct 2021 18:57:59 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 195IvxuP048534; Tue, 5 Oct 2021 18:57:59 GMT (envelope-from git) Date: Tue, 5 Oct 2021 18:57:59 GMT Message-Id: <202110051857.195IvxuP048534@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Ed Maste Subject: git: 9130e0ace0bb - stable/13 - mgb: sync with version in main List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: emaste X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 9130e0ace0bb3e6cd1ad052b8a69ecbf37eb2b62 Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch stable/13 has been updated by emaste: URL: https://cgit.FreeBSD.org/src/commit/?id=9130e0ace0bb3e6cd1ad052b8a69ecbf37eb2b62 commit 9130e0ace0bb3e6cd1ad052b8a69ecbf37eb2b62 Author: Ed Maste AuthorDate: 2021-08-13 20:57:04 +0000 Commit: Ed Maste CommitDate: 2021-10-05 18:57:21 +0000 mgb: sync with version in main This is a combination of 7 commits. mgb: update Microchip URLs Sponsored by: The FreeBSD Foundation (cherry picked from commit 6b25b4a73fbe56e15d094895b4c7acdb424ee80d) mgb: enable multicast in mgb_init Receive Filtering Engine (RFE) configuration is not yet implemented, and mgb intended to enable all broadcast, multicast, and unicast. However, MGB_RFE_ALLOW_MULTICAST was missed (MGB_RFE_ALLOW_UNICAST was included twice). MFC after: 1 week Fixes: 8890ab7758b8 ("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commit ecac5c2928eead57c05ee7d376ff58de0a575d49) mgb: Do not KASSERT on error in mgb_init There's not much we can do if mii_mediachg() fails, but KASSERT is not appropriate. MFC after: 1 week Fixes: 8890ab7758b8 ("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commit 8b889b8953828fe22e5de68647a35610dd87ff8f) mgb: Staticize devclass and iflib structs (as is typical) MFC after: 1 week Fixes: 8890ab7758b8 ("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commit c83ae596f3c2ce8c4ef2bacfb63100aaf8d48bb7) mgb: Apply some style(9) Add parens around return values, rewrap lines MFC after: 1 week Fixes: 8890ab7758b8 ("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commit 820da5820e60f538d3598d8cb226f51a01bdf01c) mgb: Fix DEBUG (and LINT) build Sponsored by: The FreeBSD Foundation (cherry picked from commit 5f07d7fe408bbca5c2f6755c363128107916c08d) mgb: Fix nop admin interrupt handling Previously mgb_admin_intr printed a diagnostic message if no interrupt status bits were set, but it's not valid to call device_printf() from a filter. Just drop the message as it has no user-facing value. Also return FILTER_STRAY in this case - there is nothing further for the driver to do. Reviewed by: kbowling MFC after: 1 week Fixes: 8890ab7758b8 ("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D32231 (cherry picked from commit 1ad2d87778970582854082bcedd2df0394fd4933) --- sys/dev/mgb/if_mgb.c | 106 +++++++++++++++++++++++---------------------------- 1 file changed, 47 insertions(+), 59 deletions(-) diff --git a/sys/dev/mgb/if_mgb.c b/sys/dev/mgb/if_mgb.c index 3f7a9d1a9dbb..6d94f96c09db 100644 --- a/sys/dev/mgb/if_mgb.c +++ b/sys/dev/mgb/if_mgb.c @@ -34,9 +34,9 @@ __FBSDID("$FreeBSD$"); * Microchip LAN7430/LAN7431 PCIe to Gigabit Ethernet Controller driver. * * Product information: - * LAN7430 https://www.microchip.com/wwwproducts/en/LAN7430 + * LAN7430 https://www.microchip.com/en-us/product/LAN7430 * - Integrated IEEE 802.3 compliant PHY - * LAN7431 https://www.microchip.com/wwwproducts/en/LAN7431 + * LAN7431 https://www.microchip.com/en-us/product/LAN7431 * - RGMII Interface * * This driver uses the iflib interface and the default 'ukphy' PHY driver. @@ -206,7 +206,7 @@ static driver_t mgb_driver = { "mgb", mgb_methods, sizeof(struct mgb_softc) }; -devclass_t mgb_devclass; +static devclass_t mgb_devclass; DRIVER_MODULE(mgb, pci, mgb_driver, mgb_devclass, NULL, NULL); IFLIB_PNP_INFO(pci, mgb, mgb_vendor_info_array); MODULE_VERSION(mgb, 1); @@ -270,7 +270,7 @@ static driver_t mgb_iflib_driver = { "mgb", mgb_iflib_methods, sizeof(struct mgb_softc) }; -struct if_txrx mgb_txrx = { +static struct if_txrx mgb_txrx = { .ift_txd_encap = mgb_isc_txd_encap, .ift_txd_flush = mgb_isc_txd_flush, .ift_txd_credits_update = mgb_isc_txd_credits_update, @@ -282,7 +282,7 @@ struct if_txrx mgb_txrx = { .ift_legacy_intr = mgb_legacy_intr }; -struct if_shared_ctx mgb_sctx_init = { +static struct if_shared_ctx mgb_sctx_init = { .isc_magic = IFLIB_MAGIC, .isc_q_align = PAGE_SIZE, @@ -397,8 +397,7 @@ mgb_attach_pre(if_ctx_t ctx) goto fail; } - switch (pci_get_device(sc->dev)) - { + switch (pci_get_device(sc->dev)) { case MGB_LAN7430_DEVICE_ID: phyaddr = 1; break; @@ -556,7 +555,7 @@ mgb_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs, rdata->head_wb = (uint32_t *) vaddrs[q * ntxqs + 1]; rdata->head_wb_bus_addr = paddrs[q * ntxqs + 1]; } - return 0; + return (0); } static int @@ -580,7 +579,7 @@ mgb_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nrxqs, rdata->head_wb = (uint32_t *) vaddrs[q * nrxqs + 1]; rdata->head_wb_bus_addr = paddrs[q * nrxqs + 1]; } - return 0; + return (0); } static void @@ -611,11 +610,14 @@ mgb_init(if_ctx_t ctx) CSR_CLEAR_REG(sc, MGB_RFE_CTL, MGB_RFE_ALLOW_PERFECT_FILTER); CSR_UPDATE_REG(sc, MGB_RFE_CTL, MGB_RFE_ALLOW_BROADCAST | - MGB_RFE_ALLOW_UNICAST | + MGB_RFE_ALLOW_MULTICAST | MGB_RFE_ALLOW_UNICAST); error = mii_mediachg(miid); - KASSERT(!error, ("mii_mediachg returned: %d", error)); + /* Not much we can do if this fails. */ + if (error) + device_printf(sc->dev, "%s: mii_mediachg returned %d", __func__, + error); } #ifdef DEBUG @@ -691,7 +693,6 @@ mgb_dump_some_stats(struct mgb_softc *sc) i, sc->tx_ring_data.ring[i].addr.high, i, sc->tx_ring_data.ring[i].sts); device_printf(sc->dev, "==== DUMP_TX_DMA_RAM ====\n"); - int i; CSR_WRITE_REG(sc, 0x24, 0xF); // DP_SEL & TX_RAM_0 for (i = 0; i < 128; i++) { CSR_WRITE_REG(sc, 0x2C, i); // DP_ADDR @@ -778,25 +779,15 @@ mgb_admin_intr(void *xsc) intr_en = CSR_READ_REG(sc, MGB_INTR_ENBL_SET); intr_sts &= intr_en; - /* - * NOTE: Debugging printfs here - * will likely cause interrupt test failure. - */ - /* TODO: shouldn't continue if suspended */ if ((intr_sts & MGB_INTR_STS_ANY) == 0) - { - device_printf(sc->dev, "non-mgb interrupt triggered.\n"); - return (FILTER_SCHEDULE_THREAD); - } - if ((intr_sts & MGB_INTR_STS_TEST) != 0) - { + return (FILTER_STRAY); + if ((intr_sts & MGB_INTR_STS_TEST) != 0) { sc->isr_test_flag = true; CSR_WRITE_REG(sc, MGB_INTR_STS, MGB_INTR_STS_TEST); return (FILTER_HANDLED); } - if ((intr_sts & MGB_INTR_STS_RX_ANY) != 0) - { + if ((intr_sts & MGB_INTR_STS_RX_ANY) != 0) { for (qidx = 0; qidx < scctx->isc_nrxqsets; qidx++) { if ((intr_sts & MGB_INTR_STS_RX(qidx))){ iflib_rx_intr_deferred(sc->ctx, qidx); @@ -805,8 +796,7 @@ mgb_admin_intr(void *xsc) return (FILTER_HANDLED); } /* XXX: TX interrupts should not occur */ - if ((intr_sts & MGB_INTR_STS_TX_ANY) != 0) - { + if ((intr_sts & MGB_INTR_STS_TX_ANY) != 0) { for (qidx = 0; qidx < scctx->isc_ntxqsets; qidx++) { if ((intr_sts & MGB_INTR_STS_RX(qidx))) { /* clear the interrupt sts and run handler */ @@ -957,7 +947,7 @@ mgb_intr_test(struct mgb_softc *sc) MGB_INTR_STS_ANY | MGB_INTR_STS_TEST); CSR_WRITE_REG(sc, MGB_INTR_SET, MGB_INTR_STS_TEST); if (sc->isr_test_flag) - return true; + return (true); for (i = 0; i < MGB_TIMEOUT; i++) { DELAY(10); if (sc->isr_test_flag) @@ -965,7 +955,7 @@ mgb_intr_test(struct mgb_softc *sc) } CSR_WRITE_REG(sc, MGB_INTR_ENBL_CLR, MGB_INTR_STS_TEST); CSR_WRITE_REG(sc, MGB_INTR_STS, MGB_INTR_STS_TEST); - return sc->isr_test_flag; + return (sc->isr_test_flag); } static int @@ -1052,7 +1042,7 @@ mgb_isc_txd_credits_update(void *xsc, uint16_t txqid, bool clear) while (*(rdata->head_wb) != rdata->last_head) { if (!clear) - return 1; + return (1); txd = &rdata->ring[rdata->last_head]; memset(txd, 0, sizeof(struct mgb_ring_desc)); @@ -1077,8 +1067,7 @@ mgb_isc_rxd_available(void *xsc, uint16_t rxqid, qidx_t idx, qidx_t budget) rdata = &sc->rx_ring_data; scctx = iflib_get_softc_ctx(sc->ctx); - for (; idx != *(rdata->head_wb); - idx = MGB_NEXT_RING_IDX(idx)) { + for (; idx != *(rdata->head_wb); idx = MGB_NEXT_RING_IDX(idx)) { avail++; /* XXX: Could verify desc is device owned here */ if (avail == budget) @@ -1113,21 +1102,21 @@ mgb_isc_rxd_pkt_get(void *xsc, if_rxd_info_t ri) device_printf(sc->dev, "Tried to read descriptor ... " "found that it's owned by the driver\n"); - return EINVAL; + return (EINVAL); } if ((rxd.ctl & MGB_RX_DESC_CTL_FS) == 0) { device_printf(sc->dev, "Tried to read descriptor ... " "found that FS is not set.\n"); device_printf(sc->dev, "Tried to read descriptor ... that it FS is not set.\n"); - return EINVAL; + return (EINVAL); } /* XXX: Multi-packet support */ if ((rxd.ctl & MGB_RX_DESC_CTL_LS) == 0) { device_printf(sc->dev, "Tried to read descriptor ... " "found that LS is not set. (Multi-buffer packets not yet supported)\n"); - return EINVAL; + return (EINVAL); } ri->iri_frags[0].irf_flid = 0; ri->iri_frags[0].irf_idx = rdata->last_head; @@ -1209,10 +1198,10 @@ mgb_test_bar(struct mgb_softc *sc) rev = id_rev & 0xFFFF; if (dev_id == MGB_LAN7430_DEVICE_ID || dev_id == MGB_LAN7431_DEVICE_ID) { - return 0; + return (0); } else { device_printf(sc->dev, "ID check failed.\n"); - return ENXIO; + return (ENXIO); } } @@ -1226,7 +1215,7 @@ mgb_alloc_regs(struct mgb_softc *sc) sc->regs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->regs == NULL) - return ENXIO; + return (ENXIO); return (0); } @@ -1241,7 +1230,7 @@ mgb_release_regs(struct mgb_softc *sc) rman_get_rid(sc->regs), sc->regs); sc->regs = NULL; pci_disable_busmaster(sc->dev); - return error; + return (error); } static int @@ -1261,7 +1250,7 @@ mgb_dma_init(struct mgb_softc *sc) goto fail; fail: - return error; + return (error); } static int @@ -1391,7 +1380,7 @@ mgb_dma_tx_ring_init(struct mgb_softc *sc, int channel) DMAC_START))) device_printf(sc->dev, "Failed to start TX DMAC.\n"); fail: - return error; + return (error); } static int @@ -1415,7 +1404,7 @@ mgb_dmac_control(struct mgb_softc *sc, int start, int channel, */ error = mgb_dmac_control(sc, start, channel, DMAC_STOP); if (error != 0) - return error; + return (error); CSR_WRITE_REG(sc, MGB_DMAC_CMD, MGB_DMAC_CMD_START(start, channel)); break; @@ -1428,7 +1417,7 @@ mgb_dmac_control(struct mgb_softc *sc, int start, int channel, MGB_DMAC_CMD_START(start, channel)); break; } - return error; + return (error); } static int @@ -1439,13 +1428,13 @@ mgb_fct_control(struct mgb_softc *sc, int reg, int channel, switch (cmd) { case FCT_RESET: CSR_WRITE_REG(sc, reg, MGB_FCT_RESET(channel)); - return mgb_wait_for_bits(sc, reg, 0, MGB_FCT_RESET(channel)); + return (mgb_wait_for_bits(sc, reg, 0, MGB_FCT_RESET(channel))); case FCT_ENABLE: CSR_WRITE_REG(sc, reg, MGB_FCT_ENBL(channel)); return (0); case FCT_DISABLE: CSR_WRITE_REG(sc, reg, MGB_FCT_DSBL(channel)); - return mgb_wait_for_bits(sc, reg, 0, MGB_FCT_ENBL(channel)); + return (mgb_wait_for_bits(sc, reg, 0, MGB_FCT_ENBL(channel))); } } @@ -1484,7 +1473,7 @@ mgb_hw_init(struct mgb_softc *sc) goto fail; fail: - return error; + return (error); } static int @@ -1507,7 +1496,7 @@ mgb_mac_init(struct mgb_softc *sc) CSR_UPDATE_REG(sc, MGB_MAC_TX, MGB_MAC_ENBL); CSR_UPDATE_REG(sc, MGB_MAC_RX, MGB_MAC_ENBL); - return MGB_STS_OK; + return (MGB_STS_OK); } static int @@ -1517,7 +1506,7 @@ mgb_phy_reset(struct mgb_softc *sc) CSR_UPDATE_BYTE(sc, MGB_PMT_CTL, MGB_PHY_RESET); if (mgb_wait_for_bits(sc, MGB_PMT_CTL, 0, MGB_PHY_RESET) == MGB_STS_TIMEOUT) - return MGB_STS_TIMEOUT; + return (MGB_STS_TIMEOUT); return (mgb_wait_for_bits(sc, MGB_PMT_CTL, MGB_PHY_READY, 0)); } @@ -1542,12 +1531,11 @@ mgb_wait_for_bits(struct mgb_softc *sc, int reg, int set_bits, int clear_bits) */ DELAY(100); val = CSR_READ_REG(sc, reg); - if ((val & set_bits) == set_bits && - (val & clear_bits) == 0) - return MGB_STS_OK; + if ((val & set_bits) == set_bits && (val & clear_bits) == 0) + return (MGB_STS_OK); } while (i++ < MGB_TIMEOUT); - return MGB_STS_TIMEOUT; + return (MGB_STS_TIMEOUT); } static void @@ -1568,14 +1556,14 @@ mgb_miibus_readreg(device_t dev, int phy, int reg) if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) == MGB_STS_TIMEOUT) - return EIO; + return (EIO); mii_access = (phy & MGB_MII_PHY_ADDR_MASK) << MGB_MII_PHY_ADDR_SHIFT; mii_access |= (reg & MGB_MII_REG_ADDR_MASK) << MGB_MII_REG_ADDR_SHIFT; mii_access |= MGB_MII_BUSY | MGB_MII_READ; CSR_WRITE_REG(sc, MGB_MII_ACCESS, mii_access); if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) == MGB_STS_TIMEOUT) - return EIO; + return (EIO); return (CSR_READ_2_BYTES(sc, MGB_MII_DATA)); } @@ -1587,9 +1575,9 @@ mgb_miibus_writereg(device_t dev, int phy, int reg, int data) sc = iflib_get_softc(device_get_softc(dev)); - if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, - 0, MGB_MII_BUSY) == MGB_STS_TIMEOUT) - return EIO; + if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) == + MGB_STS_TIMEOUT) + return (EIO); mii_access = (phy & MGB_MII_PHY_ADDR_MASK) << MGB_MII_PHY_ADDR_SHIFT; mii_access |= (reg & MGB_MII_REG_ADDR_MASK) << MGB_MII_REG_ADDR_SHIFT; mii_access |= MGB_MII_BUSY | MGB_MII_WRITE; @@ -1597,8 +1585,8 @@ mgb_miibus_writereg(device_t dev, int phy, int reg, int data) CSR_WRITE_REG(sc, MGB_MII_ACCESS, mii_access); if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) == MGB_STS_TIMEOUT) - return EIO; - return 0; + return (EIO); + return (0); } /* XXX: May need to lock these up */