git: e6140a05bc52 - stable/13 - hwpmc: Add IDs for Intel Comet/Ice/Tiger/Rocketlake CPUs.
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Date: Sun, 26 Dec 2021 00:47:29 UTC
The branch stable/13 has been updated by mav: URL: https://cgit.FreeBSD.org/src/commit/?id=e6140a05bc5298d2abf56c8e53e28f5d82ae4f42 commit e6140a05bc5298d2abf56c8e53e28f5d82ae4f42 Author: Alexander Motin <mav@FreeBSD.org> AuthorDate: 2021-11-26 00:17:58 +0000 Commit: Alexander Motin <mav@FreeBSD.org> CommitDate: 2021-12-26 00:47:16 +0000 hwpmc: Add IDs for Intel Comet/Ice/Tiger/Rocketlake CPUs. MFC after: 1 month (cherry picked from commit 913c07a04998b8cd11dc428f5d00fae7dd392244) --- sys/dev/hwpmc/hwpmc_core.c | 4 +++- sys/dev/hwpmc/hwpmc_intel.c | 23 +++++++++++++++++++++++ sys/sys/pmc.h | 2 ++ 3 files changed, 28 insertions(+), 1 deletion(-) diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index afd587296e01..a0263c783df5 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -765,6 +765,8 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm, break; case PMC_CPU_INTEL_SKYLAKE: case PMC_CPU_INTEL_SKYLAKE_XEON: + case PMC_CPU_INTEL_ICELAKE: + case PMC_CPU_INTEL_ICELAKE_XEON: case PMC_CPU_INTEL_BROADWELL: case PMC_CPU_INTEL_BROADWELL_XEON: case PMC_CPU_INTEL_SANDYBRIDGE: @@ -1267,7 +1269,7 @@ pmc_core_initialize(struct pmc_mdep *md, int maxcpu, int version_override) PMCDBG3(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d", core_cputype, maxcpu, ipa_version); - if (ipa_version < 1 || ipa_version > 4 || + if (ipa_version < 1 || ipa_version > 5 || (core_cputype != PMC_CPU_INTEL_CORE && ipa_version == 1)) { /* Unknown PMC architecture. */ printf("hwpc_core: unknown PMC architecture: %d\n", diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index 02b8fd9431d1..1f05489023c6 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -169,6 +169,9 @@ pmc_intel_initialize(void) /* Kabylake */ case 0x8E: /* Per Intel document 325462-063US July 2017. */ case 0x9E: /* Per Intel document 325462-063US July 2017. */ + /* Cometlake */ + case 0xA5: + case 0xA6: cputype = PMC_CPU_INTEL_SKYLAKE; nclasses = 3; break; @@ -176,6 +179,22 @@ pmc_intel_initialize(void) cputype = PMC_CPU_INTEL_SKYLAKE_XEON; nclasses = 3; break; + /* Icelake */ + case 0x7D: + case 0x7E: + /* Tigerlake */ + case 0x8C: + case 0x8D: + /* Rocketlake */ + case 0xA7: + cputype = PMC_CPU_INTEL_ICELAKE; + nclasses = 3; + break; + case 0x6A: + case 0x6C: + cputype = PMC_CPU_INTEL_ICELAKE_XEON; + nclasses = 3; + break; case 0x3D: case 0x47: cputype = PMC_CPU_INTEL_BROADWELL; @@ -242,6 +261,8 @@ pmc_intel_initialize(void) case PMC_CPU_INTEL_BROADWELL_XEON: case PMC_CPU_INTEL_SKYLAKE_XEON: case PMC_CPU_INTEL_SKYLAKE: + case PMC_CPU_INTEL_ICELAKE: + case PMC_CPU_INTEL_ICELAKE_XEON: case PMC_CPU_INTEL_CORE: case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: @@ -323,6 +344,8 @@ pmc_intel_finalize(struct pmc_mdep *md) case PMC_CPU_INTEL_BROADWELL_XEON: case PMC_CPU_INTEL_SKYLAKE_XEON: case PMC_CPU_INTEL_SKYLAKE: + case PMC_CPU_INTEL_ICELAKE: + case PMC_CPU_INTEL_ICELAKE_XEON: case PMC_CPU_INTEL_CORE: case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: diff --git a/sys/sys/pmc.h b/sys/sys/pmc.h index 9328a7bdfa05..31b0e6094e04 100644 --- a/sys/sys/pmc.h +++ b/sys/sys/pmc.h @@ -111,6 +111,8 @@ extern char pmc_cpuid[PMC_CPUID_LEN]; __PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \ __PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \ __PMC_CPU(INTEL_ATOM_GOLDMONT, 0x9A, "Intel Atom Goldmont") \ + __PMC_CPU(INTEL_ICELAKE, 0x9B, "Intel Icelake") \ + __PMC_CPU(INTEL_ICELAKE_XEON, 0x9C, "Intel Icelake Xeon") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \