From nobody Mon Sep 28 16:13:22 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4htmZC0vvnz6Wscg for ; Mon, 28 Sep 2026 16:13:23 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR2" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4htmZC04crz4WNQ for ; Mon, 28 Sep 2026 16:13:23 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1790612003; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=C4DW87pf5KDLVnFVAYqsfH6sAayGxodhpgcUwzoPOrc=; b=GnTRUbsfoTIbYBC0EtccvXw7W4mSuis1xKRK2hUffbcGMllejo9KqWJ+8XVPn1UpA0+SRa lorHrAC/SHtpo+EIM7+yNkVJRR7MtsVzUyuEqDR9wdHMjekS7UimUjJ3++/XUacEhIGwey j4dgClRFDnBEYoBi2DNdTCDepTCpfhUgIEA5+CpkMfmFgmymfRAoVi7cAB+AfTn3e9zAtF /L0UXR0+8iGM2MWpLDIt6QtAy6Yit5RMokneJvoEY4hj93fQWqqk5/FuPXLjljKdsG7V1I jCaVsKSkwLPhbKwUH/JiY5MmJIs8LzK4hugqDkpK0YzB9LvLU9Ttj3WzqOoIwA== ARC-Seal: i=1; a=rsa-sha256; d=freebsd.org; s=dkim; cv=none; t=1790612003; b=CkndzTfKYjcRkRA41JBinbHjZ/6o1RKfMhofGveQw3yRblvz7LuPADWvBRO5aIueunsHlJ UpTNEkPrbrBcXm1bD0vf7IJdqNtDL6/EzPyoWFfMuANfkb4oJMAF2pM6a56FBjgAhPLHvK 3b1I4bvrMeUKsDPrWYeSlZsHAaITonhHnxNhV5GDgkxCV2sNYz45Hbh1Kir3hRyIXC841Q fqgz7ywEzzz/pQ+gVvYgU9Ij+ubZy3nhyA7BQ8w23gPBX5tqqhAo4U4eDnKHZW90pMtoFh jfFKWqxjIo5KKeHtIda0hSWrSs+cZyfGKeoGaHOJk60t7oY50ZbohQsU8kYr2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1790612003; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=C4DW87pf5KDLVnFVAYqsfH6sAayGxodhpgcUwzoPOrc=; b=GWMWCTPuiDG/mLMAzKOEZtCoDcTmfpvPFpH8kSubCx4FeGbk/u/53ck5N9tYO0jOzb/lWf 4YggOYdJ2h4XKG9wyUcKIlxr7LzdyAmABJS9P9hkV6DYGKF2W8f2KeiMaXfwdGt2bXbeL8 UNO5xJdy705lBiNlR8pSooRTcfVv8kVyaDVx0jY6LCvKKFYVZ8bx5yAGCd/VZuYbs6bMmX tzD8Q26Is9JG/wCvI3hj9ktUDLP7r4XZNGl1hSnkLWv6qIEo+/aQn48sheXE64b3MMjmTm SrxYBb4hOde58aUxTbOoH1RK0IgFxaLTUSVZBRS96I4UlA7JJg5CcbkLz4+h4Q== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4htmZB6Dnmzc2Y for ; Mon, 28 Sep 2026 16:13:22 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 2634f by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Mon, 28 Sep 2026 16:13:22 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Xiaoqiang Zhao From: Dimitry Andric Subject: git: 2f49e40a684a - main - llvm: add LoongArch target support, not enabled by default List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: dim X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 2f49e40a684a4bffd8e368a6878384ec4f735ea8 Auto-Submitted: auto-generated Date: Mon, 28 Sep 2026 16:13:22 +0000 Message-Id: <6aba9222.2634f.50fbdac6@gitrepo.freebsd.org> The branch main has been updated by dim: URL: https://cgit.FreeBSD.org/src/commit/?id=2f49e40a684a4bffd8e368a6878384ec4f735ea8 commit 2f49e40a684a4bffd8e368a6878384ec4f735ea8 Author: Xiaoqiang Zhao AuthorDate: 2026-09-28 15:14:09 +0000 Commit: Dimitry Andric CommitDate: 2026-09-28 16:13:02 +0000 llvm: add LoongArch target support, not enabled by default Note there is ongoing work to add LoongArch support to the base system, but having target support in llvm is an essential component. This must be explicitly enabled using WITH_LLVM_TARGET_LOONGARCH. Reviewed by: dim MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D59899 --- lib/clang/include/llvm/Config/AsmParsers.def | 3 ++ lib/clang/include/llvm/Config/AsmPrinters.def | 3 ++ lib/clang/include/llvm/Config/Disassemblers.def | 3 ++ lib/clang/include/llvm/Config/Targets.def | 3 ++ lib/clang/libllvm/Makefile | 55 ++++++++++++++++++++--- lib/clang/llvm.build.mk | 6 +++ share/man/man5/src.conf.5 | 7 ++- share/mk/src.opts.mk | 2 +- tools/build/options/WITHOUT_LLVM_TARGET_BPF | 1 + tools/build/options/WITHOUT_LLVM_TARGET_LOONGARCH | 1 + tools/build/options/WITH_LLVM_TARGET_BPF | 3 -- tools/build/options/WITH_LLVM_TARGET_LOONGARCH | 1 + 12 files changed, 74 insertions(+), 14 deletions(-) diff --git a/lib/clang/include/llvm/Config/AsmParsers.def b/lib/clang/include/llvm/Config/AsmParsers.def index 8cf3ffd6b0d4..a10e12bb10c7 100644 --- a/lib/clang/include/llvm/Config/AsmParsers.def +++ b/lib/clang/include/llvm/Config/AsmParsers.def @@ -33,6 +33,9 @@ LLVM_ASM_PARSER(ARM) #ifdef LLVM_TARGET_ENABLE_BPF LLVM_ASM_PARSER(BPF) #endif +#ifdef LLVM_TARGET_ENABLE_LOONGARCH +LLVM_ASM_PARSER(LoongArch) +#endif #ifdef LLVM_TARGET_ENABLE_POWERPC LLVM_ASM_PARSER(PowerPC) #endif diff --git a/lib/clang/include/llvm/Config/AsmPrinters.def b/lib/clang/include/llvm/Config/AsmPrinters.def index b88e60ada874..2f45fe174db7 100644 --- a/lib/clang/include/llvm/Config/AsmPrinters.def +++ b/lib/clang/include/llvm/Config/AsmPrinters.def @@ -33,6 +33,9 @@ LLVM_ASM_PRINTER(ARM) #ifdef LLVM_TARGET_ENABLE_BPF LLVM_ASM_PRINTER(BPF) #endif +#ifdef LLVM_TARGET_ENABLE_LOONGARCH +LLVM_ASM_PRINTER(LoongArch) +#endif #ifdef LLVM_TARGET_ENABLE_POWERPC LLVM_ASM_PRINTER(PowerPC) #endif diff --git a/lib/clang/include/llvm/Config/Disassemblers.def b/lib/clang/include/llvm/Config/Disassemblers.def index 72c0dcab0ab3..2530e01e635f 100644 --- a/lib/clang/include/llvm/Config/Disassemblers.def +++ b/lib/clang/include/llvm/Config/Disassemblers.def @@ -33,6 +33,9 @@ LLVM_DISASSEMBLER(ARM) #ifdef LLVM_TARGET_ENABLE_BPF LLVM_DISASSEMBLER(BPF) #endif +#ifdef LLVM_TARGET_ENABLE_LOONGARCH +LLVM_DISASSEMBLER(LoongArch) +#endif #ifdef LLVM_TARGET_ENABLE_POWERPC LLVM_DISASSEMBLER(PowerPC) #endif diff --git a/lib/clang/include/llvm/Config/Targets.def b/lib/clang/include/llvm/Config/Targets.def index 725efe253ced..70ef796f5d0a 100644 --- a/lib/clang/include/llvm/Config/Targets.def +++ b/lib/clang/include/llvm/Config/Targets.def @@ -32,6 +32,9 @@ LLVM_TARGET(ARM) #ifdef LLVM_TARGET_ENABLE_BPF LLVM_TARGET(BPF) #endif +#ifdef LLVM_TARGET_ENABLE_LOONGARCH +LLVM_TARGET(LoongArch) +#endif #ifdef LLVM_TARGET_ENABLE_POWERPC LLVM_TARGET(PowerPC) #endif diff --git a/lib/clang/libllvm/Makefile b/lib/clang/libllvm/Makefile index 9baa95c19242..8516573e6fdf 100644 --- a/lib/clang/libllvm/Makefile +++ b/lib/clang/libllvm/Makefile @@ -27,14 +27,15 @@ CFLAGS+= -I${.OBJDIR} CFLAGS+= -I${SRCTOP}/sys/contrib/zstd/lib .if ${MK_LLVM_TARGET_AARCH64} == "no" && ${MK_LLVM_TARGET_ARM} == "no" && \ - ${MK_LLVM_TARGET_BPF} == "no" && ${MK_LLVM_TARGET_POWERPC} == "no" && \ - ${MK_LLVM_TARGET_RISCV} == "no" && ${MK_LLVM_TARGET_X86} == "no" + ${MK_LLVM_TARGET_BPF} == "no" && ${MK_LLVM_TARGET_LOONGARCH} == "no" && \ + ${MK_LLVM_TARGET_POWERPC} == "no" && ${MK_LLVM_TARGET_RISCV} == "no" && \ + ${MK_LLVM_TARGET_X86} == "no" .error Please enable at least one of: MK_LLVM_TARGET_AARCH64,\ - MK_LLVM_TARGET_ARM, MK_LLVM_TARGET_BPF, MK_LLVM_TARGET_POWERPC,\ - MK_LLVM_TARGET_RISCV, or MK_LLVM_TARGET_X86 + MK_LLVM_TARGET_ARM, MK_LLVM_TARGET_BPF, MK_LLVM_TARGET_LOONGARCH, \ + MK_LLVM_TARGET_POWERPC, MK_LLVM_TARGET_RISCV, or MK_LLVM_TARGET_X86 .endif -.for arch in AArch64 ARM BPF PowerPC RISCV X86 +.for arch in AArch64 ARM BPF LoongArch PowerPC RISCV X86 . if ${MK_LLVM_TARGET_${arch:tu}} != "no" CFLAGS+= -I${LLVM_SRCS}/lib/Target/${arch} . endif @@ -1758,6 +1759,36 @@ SRCS_MIN+= Target/X86/X86VZeroUpper.cpp SRCS_MIN+= Target/X86/X86WinEHState.cpp SRCS_MIN+= Target/X86/X86WinEHUnwindV2.cpp .endif # MK_LLVM_TARGET_X86 +.if ${MK_LLVM_TARGET_LOONGARCH} != "no" +SRCS_MIN+= Target/LoongArch/AsmParser/LoongArchAsmParser.cpp +SRCS_MIN+= Target/LoongArch/Disassembler/LoongArchDisassembler.cpp +SRCS_MIN+= Target/LoongArch/LoongArchAsmPrinter.cpp +SRCS_MIN+= Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp +SRCS_MIN+= Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp +SRCS_MIN+= Target/LoongArch/LoongArchExpandPseudoInsts.cpp +SRCS_MIN+= Target/LoongArch/LoongArchFrameLowering.cpp +SRCS_MIN+= Target/LoongArch/LoongArchISelDAGToDAG.cpp +SRCS_MIN+= Target/LoongArch/LoongArchISelLowering.cpp +SRCS_MIN+= Target/LoongArch/LoongArchInstrInfo.cpp +SRCS_MIN+= Target/LoongArch/LoongArchMCInstLower.cpp +SRCS_MIN+= Target/LoongArch/LoongArchMergeBaseOffset.cpp +SRCS_MIN+= Target/LoongArch/LoongArchOptWInstrs.cpp +SRCS_MIN+= Target/LoongArch/LoongArchRegisterInfo.cpp +SRCS_MIN+= Target/LoongArch/LoongArchSubtarget.cpp +SRCS_MIN+= Target/LoongArch/LoongArchTargetMachine.cpp +SRCS_MIN+= Target/LoongArch/LoongArchTargetTransformInfo.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchMatInt.cpp +SRCS_MIN+= Target/LoongArch/MCTargetDesc/LoongArchTargetStreamer.cpp +SRCS_MIN+= Target/LoongArch/TargetInfo/LoongArchTargetInfo.cpp +.endif # MK_LLVM_TARGET_LOONGARCH SRCS_MIN+= TargetParser/AArch64TargetParser.cpp SRCS_MIN+= TargetParser/ARMTargetParser.cpp SRCS_MIN+= TargetParser/ARMTargetParserCommon.cpp @@ -2271,7 +2302,8 @@ beforebuild: # Note: some rules are superfluous, not every combination is valid. .for arch in \ - AArch64/AArch64 ARM/ARM BPF/BPF PowerPC/PPC RISCV/RISCV X86/X86 + AArch64/AArch64 ARM/ARM BPF/BPF LoongArch/LoongArch PowerPC/PPC \ + RISCV/RISCV X86/X86 . for hdr in \ AsmMatcher/-gen-asm-matcher \ AsmWriter/-gen-asm-writer \ @@ -2418,6 +2450,17 @@ TGHDRS+= X86GenRegisterBank.inc TGHDRS+= X86GenRegisterInfo.inc TGHDRS+= X86GenSubtargetInfo.inc .endif # MK_LLVM_TARGET_X86 +.if ${MK_LLVM_TARGET_LOONGARCH} != "no" +TGHDRS+= LoongArchGenAsmMatcher.inc +TGHDRS+= LoongArchGenAsmWriter.inc +TGHDRS+= LoongArchGenDAGISel.inc +TGHDRS+= LoongArchGenDisassemblerTables.inc +TGHDRS+= LoongArchGenInstrInfo.inc +TGHDRS+= LoongArchGenMCCodeEmitter.inc +TGHDRS+= LoongArchGenMCPseudoLowering.inc +TGHDRS+= LoongArchGenRegisterInfo.inc +TGHDRS+= LoongArchGenSubtargetInfo.inc +.endif # MK_LLVM_TARGET_LOONGARCH DEPENDFILES+= ${TGHDRS:C/$/.d/} DPSRCS+= ${TGHDRS} diff --git a/lib/clang/llvm.build.mk b/lib/clang/llvm.build.mk index d06a2f42479c..3e67200abc66 100644 --- a/lib/clang/llvm.build.mk +++ b/lib/clang/llvm.build.mk @@ -83,6 +83,12 @@ CFLAGS+= -DLLVM_TARGET_ENABLE_RISCV LLVM_NATIVE_ARCH= RISCV . endif .endif +.if ${MK_LLVM_TARGET_LOONGARCH} != "no" +CFLAGS+= -DLLVM_TARGET_ENABLE_LOONGARCH +. if ${MACHINE_CPUARCH} == "loongarch" +LLVM_NATIVE_ARCH= LoongArch +. endif +.endif .if ${MK_LLVM_TARGET_X86} != "no" CFLAGS+= -DLLVM_TARGET_ENABLE_X86 . if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64" diff --git a/share/man/man5/src.conf.5 b/share/man/man5/src.conf.5 index 37747ac4fb53..46e489f30f8f 100644 --- a/share/man/man5/src.conf.5 +++ b/share/man/man5/src.conf.5 @@ -1,5 +1,5 @@ .\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman. -.Dd September 24, 2026 +.Dd September 28, 2026 .Dt SRC.CONF 5 .Os .Sh NAME @@ -1040,9 +1040,8 @@ The option should be used rather than this in most cases. .It Va WITH_LLVM_TARGET_BPF Build LLVM target support for BPF. -The -.Va LLVM_TARGET_ALL -option should be used rather than this in most cases. +.It Va WITH_LLVM_TARGET_LOONGARCH +Build LLVM target support for LoongArch. .It Va WITHOUT_LLVM_TARGET_POWERPC Do not build LLVM target support for PowerPC. The diff --git a/share/mk/src.opts.mk b/share/mk/src.opts.mk index 8ca5fbd1873b..3e177d373c05 100644 --- a/share/mk/src.opts.mk +++ b/share/mk/src.opts.mk @@ -293,7 +293,7 @@ __DEFAULT_DEPENDENT_OPTIONS+= LLVM_TARGET_${__llt:${__LLVM_TARGET_FILT}:tu}/LLVM .endif .endfor -__DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF +__DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF LLVM_TARGET_LOONGARCH .include diff --git a/tools/build/options/WITHOUT_LLVM_TARGET_BPF b/tools/build/options/WITHOUT_LLVM_TARGET_BPF new file mode 100644 index 000000000000..392e930d8008 --- /dev/null +++ b/tools/build/options/WITHOUT_LLVM_TARGET_BPF @@ -0,0 +1 @@ +Do not build LLVM target support for BPF. diff --git a/tools/build/options/WITHOUT_LLVM_TARGET_LOONGARCH b/tools/build/options/WITHOUT_LLVM_TARGET_LOONGARCH new file mode 100644 index 000000000000..e6d5d8be834f --- /dev/null +++ b/tools/build/options/WITHOUT_LLVM_TARGET_LOONGARCH @@ -0,0 +1 @@ +Do not build LLVM target support for LoongArch. diff --git a/tools/build/options/WITH_LLVM_TARGET_BPF b/tools/build/options/WITH_LLVM_TARGET_BPF index 664cc85a52b9..45811be6174d 100644 --- a/tools/build/options/WITH_LLVM_TARGET_BPF +++ b/tools/build/options/WITH_LLVM_TARGET_BPF @@ -1,4 +1 @@ Build LLVM target support for BPF. -The -.Va LLVM_TARGET_ALL -option should be used rather than this in most cases. diff --git a/tools/build/options/WITH_LLVM_TARGET_LOONGARCH b/tools/build/options/WITH_LLVM_TARGET_LOONGARCH new file mode 100644 index 000000000000..157b18a9df9a --- /dev/null +++ b/tools/build/options/WITH_LLVM_TARGET_LOONGARCH @@ -0,0 +1 @@ +Build LLVM target support for LoongArch.