git: b94772d9bcea - main - clk: Fix a few typos in the spacemit CCU driver

The branch main has been updated by bnovkov:

URL: https://cgit.FreeBSD.org/src/commit/?id=b94772d9bcea0cb8b9123dc9e7e4440c6a2857d4

commit b94772d9bcea0cb8b9123dc9e7e4440c6a2857d4
Author:     Bojan Novković <bnovkov@FreeBSD.org>
AuthorDate: 2026-09-22 15:15:56 +0000
Commit:     Bojan Novković <bnovkov@FreeBSD.org>
CommitDate: 2026-09-22 20:12:16 +0000

    clk: Fix a few typos in the spacemit CCU driver
    
    Fixes:  dcb10e3add17
    Reported by:    Bruno Banelli <bruno.banelli@sartura.hr> (p_idx typo)
---
 sys/dev/clk/spacemit/k1_apmu.c | 6 +++---
 sys/dev/clk/spacemit/k1_clk.c  | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/sys/dev/clk/spacemit/k1_apmu.c b/sys/dev/clk/spacemit/k1_apmu.c
index 8bcecb9bb6a2..375539574285 100644
--- a/sys/dev/clk/spacemit/k1_apmu.c
+++ b/sys/dev/clk/spacemit/k1_apmu.c
@@ -50,17 +50,17 @@ K1_CLK_GATE(sdh_axi_aclk, CLK_SDH_AXI, K1_SDH0_CLK_RES_CTRL, 4,
 K1_CLK_DIV_MUX_GATE(sdh0_clk, CLK_SDH0, K1_SDH0_CLK_RES_CTRL,
 	3, 8, 3, 5, 4, 11,
 	"pll1_d6", "pll1_d4", "pll2_d8", "pll2_d5",
-	"pll1_d11", "pll1_d11" , "pll1_d13", "pll1_d23"),
+	"pll1_d11", "pll1_d13", "pll1_d23"),
 
 K1_CLK_DIV_MUX_GATE(sdh1_clk, CLK_SDH1, K1_SDH1_CLK_RES_CTRL,
 	3, 8, 3, 5, 4, 11,
 	"pll1_d6", "pll1_d4", "pll2_d8", "pll2_d5",
-	"pll1_d11", "pll1_d11" , "pll1_d13", "pll1_d23"),
+	"pll1_d11", "pll1_d13", "pll1_d23"),
 
 K1_CLK_DIV_MUX_GATE(sdh2_clk, CLK_SDH2, K1_SDH2_CLK_RES_CTRL,
 	3, 8, 3, 5, 4, 11,
 	"pll1_d6", "pll1_d4", "pll2_d8", "pll1_d3",
-	"pll1_d11", "pll1_d11" , "pll1_d13", "pll1_d23")
+	"pll1_d11", "pll1_d13", "pll1_d23")
 };
 
 static const struct k1_reset_def apmu_resets[] = {
diff --git a/sys/dev/clk/spacemit/k1_clk.c b/sys/dev/clk/spacemit/k1_clk.c
index 3ee1ae66c1b5..63a05355dd32 100644
--- a/sys/dev/clk/spacemit/k1_clk.c
+++ b/sys/dev/clk/spacemit/k1_clk.c
@@ -338,7 +338,7 @@ k1_clk_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
 		mux_mask <<= clk_sc->mux_shift;
 		val = READ4(sc, clk_sc->reg);
 		val &= ~mux_mask;
-		val |= (p_idx << clk_sc->mux_shift);
+		val |= (best_parent << clk_sc->mux_shift);
 		WRITE4(sc, clk_sc->reg, val);
 
 		if (k1_clk_send_fc_req(clk) != 0) {
@@ -383,7 +383,7 @@ k1_clk_init(struct clknode *clk, device_t dev)
 	sc = device_get_softc(clknode_get_device(clk));
 	clk_sc = clknode_get_softc(clk);
 
-	if (clk_sc->mux_shift == 0) {
+	if (clk_sc->mux_nbits == 0) {
 		clknode_init_parent_idx(clk, 0);
 		return (0);
 	}