From nobody Sat Sep 12 02:40:44 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4hhbHy0hJ7z6rmSp for ; Sat, 12 Sep 2026 02:40:46 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR2" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4hhbHx5Lrcz4Ddl for ; Sat, 12 Sep 2026 02:40:45 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1789180845; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=GQb2ScW1Sb3Id31pX55ERDajA05ug6A4n+7Vw9LiEuY=; b=UG51sTb9rHhsRoKsb0PXrX8hXcfLPE/W1g+CuRgyAmf36dRVTqgqHuZiLYg/fYtyFCwo+0 TpfCDRt323TvQhneGOxhMbi1kSp5BfROAg230yZhtEX3jK1CPgsWCBGu/fUr5RBz4GonPr Yyg/RHaSY1yS0Y7VaS0Uq7rhGkVF30Jdzakj0xR1M5OhIAiDmZg812PxuQ7hmqOEQjXrNH ttzWNmyyAiqth4q327Jx3hSrMIi/dpYFwX7hvFsRgvAuhm1WQI+84wRLqdDUomCVmKbxjw imbeTAVXaXADpMtBb6HHa50KWZK6FNQ6BBQuVuKFMxkPFQxAh/xZVqEAH5tevg== ARC-Seal: i=1; a=rsa-sha256; d=freebsd.org; s=dkim; cv=none; t=1789180845; b=vIPHZgysn/IFFVFS8FqaN8gdZ9VBYpw/k0azmWVoHqwmjT8NQWBu/Zotn8VzSWp7dRiSem 6a7j1/LhVekAQHD9y0cVNyvhmvf8rn6l8Is2R/d6eMXgbMMyCRUpIq+qxbz/X97TGZFqMU PhB8pJQ6wEF2QOgvRFRDDJDWmV17w8r4IJjMdHboZanHOxqNs/yqO0XFz6AwTo4a847Itx A1GytBpY/AZHDC/fSTpk8kleSo+EE7jXCCqnJzpp66y4JhbJf3SSBiYG+11eZBesr7Cn4A 8H9SsElHOkE0jcmf3dkntMvMJ+3Mz1PGq4AF26BnrYq8mhVcUhHvhjDWH4VXnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1789180845; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=GQb2ScW1Sb3Id31pX55ERDajA05ug6A4n+7Vw9LiEuY=; b=fwOufq62dNkVF+w7L+JNoxuVQRBumoeAxpjrJ7VxWiKjBYs/Bb561ou1GK/4oUQIcBxoVp yxQhUFjzFkEm+1SwLeUIbKP9CeZBPzvMcW5DY8HX3N7gIYRGoFvFE2LeCxTM6R9GS0f5ga 9SB+mt+VLLE1qykSSGJsqEq1WW29ZYVujt02haYd9r8w9UkIuJBNhavt7mjy1Jfz8/D3G9 D+UhAHAYfJx5yH0UTMDPKc5iE1oqco1Kdkvhv5c/4eSz9juRAudJjCcgAcsSm33kI9xNED vcJFMRsYHwVbjXU94j20cAc3WeU/ma8kN7HN/anM5mIkohkXavQQBC47G2N7/g== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4hhbHw5qntzhQs for ; Sat, 12 Sep 2026 02:40:44 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 27a08 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Sat, 12 Sep 2026 02:40:44 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Justin Hibbits Subject: git: de5fcd166502 - main - powerpc/booke: Add a machine check stack List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jhibbits X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: de5fcd16650207f6f2e7c50afd1ebbaeb36612c7 Auto-Submitted: auto-generated Date: Sat, 12 Sep 2026 02:40:44 +0000 Message-Id: <6aa4bbac.27a08.5efb348c@gitrepo.freebsd.org> The branch main has been updated by jhibbits: URL: https://cgit.FreeBSD.org/src/commit/?id=de5fcd16650207f6f2e7c50afd1ebbaeb36612c7 commit de5fcd16650207f6f2e7c50afd1ebbaeb36612c7 Author: Justin Hibbits AuthorDate: 2026-09-05 18:38:55 +0000 Commit: Justin Hibbits CommitDate: 2026-09-12 02:40:30 +0000 powerpc/booke: Add a machine check stack Machine check and critical exceptions are independent of each other, and can interrupt each other. Since they're asynchronous we cannot trust that the existing stack pointer (%r1) is correct at time of entry, so add a private machine check stack separate from the critical exception stack. As part of this, switch to the STANDARD_CRIT_PROLOG() for machine check exceptions, and overload the macro to specify the stack to switch to. Also add a savearea argument to CRIT_SRR_RESTORE() so that we can restore machine check exception state from the right location. --- sys/powerpc/booke/booke_machdep.c | 14 ++++++++++++-- sys/powerpc/booke/trap_subr.S | 30 ++++++++++++++++++------------ sys/powerpc/include/pcpu.h | 7 ++++--- sys/powerpc/powerpc/genassym.c | 1 + 4 files changed, 35 insertions(+), 17 deletions(-) diff --git a/sys/powerpc/booke/booke_machdep.c b/sys/powerpc/booke/booke_machdep.c index 58b847766d46..21b9852945d6 100644 --- a/sys/powerpc/booke/booke_machdep.c +++ b/sys/powerpc/booke/booke_machdep.c @@ -398,22 +398,32 @@ extern uintptr_t tlb0_miss_locks[]; * MAXCPU array here would reserve megabytes for CPUs that do not exist. */ static char booke_boot_critstack[BOOKE_CRITSTACK_SIZE] __aligned(16); +static char booke_boot_mchkstack[BOOKE_CRITSTACK_SIZE] __aligned(16); static bool booke_boot_critstack_used; /* Initialise a struct pcpu. */ void cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz) { - char *critstack; + char *critstack, *mchkstack; pcpu->pc_booke.tid_next = TID_MIN; + /* + * Machine check and critical interrupts have their own stacks with + * their own stack pointer, because regular mode registers cannot be + * trusted. + */ if (!booke_boot_critstack_used) { booke_boot_critstack_used = true; critstack = booke_boot_critstack; - } else + mchkstack = booke_boot_mchkstack; + } else { critstack = malloc(BOOKE_CRITSTACK_SIZE, M_DEVBUF, M_WAITOK); + mchkstack = malloc(BOOKE_CRITSTACK_SIZE, M_DEVBUF, M_WAITOK); + } pcpu->pc_booke.critstack = critstack + BOOKE_CRITSTACK_SIZE; + pcpu->pc_booke.mchkstack = mchkstack + BOOKE_CRITSTACK_SIZE; #ifdef SMP uintptr_t *ptr; diff --git a/sys/powerpc/booke/trap_subr.S b/sys/powerpc/booke/trap_subr.S index 55e4d03639d4..69ed40cdd8ca 100644 --- a/sys/powerpc/booke/trap_subr.S +++ b/sys/powerpc/booke/trap_subr.S @@ -136,7 +136,7 @@ LOAD %r1, PC_CURPCB(%r1); /* Per-thread kernel stack */ \ 1: -#define STANDARD_CRIT_PROLOG(sprg_sp, savearea, isrr0, isrr1) \ +#define STANDARD_CRIT_PROLOG(sprg_sp, savearea, stack, isrr0, isrr1) \ mtspr sprg_sp, %r1; /* Save SP */ \ GET_CPUINFO(%r1); /* Per-cpu structure */ \ STORE %r30, (savearea+CPUSAVE_R30)(%r1); \ @@ -166,7 +166,7 @@ bf 17, 1f; \ LOAD %r1, PC_CURPCB(%r1); /* Per-thread kernel stack */ \ b 2f; \ -1: LOAD %r1, PC_BOOKE_CRITSTACK(%r1); \ +1: LOAD %r1, stack(%r1); \ 2: /* @@ -177,10 +177,10 @@ * a TLB miss return. Nested exceptions taken by the C dispatcher clobber * them either way, so restore before returning. */ -#define CRIT_SRR_RESTORE \ +#define CRIT_SRR_RESTORE(savearea) \ GET_CPUINFO(%r3); \ - LOAD %r4, (PC_BOOKE_CRITSAVE+BOOKE_CRITSAVE_SRR0)(%r3); \ - LOAD %r5, (PC_BOOKE_CRITSAVE+BOOKE_CRITSAVE_SRR1)(%r3); \ + LOAD %r4, (savearea+BOOKE_CRITSAVE_SRR0)(%r3); \ + LOAD %r5, (savearea+BOOKE_CRITSAVE_SRR1)(%r3); \ mtspr SPR_SRR0, %r4; \ mtspr SPR_SRR1, %r5 @@ -554,13 +554,14 @@ INTERRUPT(int_unknown) * Critical input interrupt ****************************************************************************/ INTERRUPT(int_critical_input) - STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) + STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, + PC_BOOKE_CRITSTACK, SPR_CSRR0, SPR_CSRR1) FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_CRIT) GET_TOCBASE(%r2) addi %r3, %r1, CALLSIZE bl CNAME(powerpc_interrupt) TOC_RESTORE - CRIT_SRR_RESTORE + CRIT_SRR_RESTORE(PC_BOOKE_CRITSAVE) FRAME_LEAVE(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) rfci @@ -569,12 +570,14 @@ INTERRUPT(int_critical_input) * Machine check interrupt ****************************************************************************/ INTERRUPT(int_machine_check) - STANDARD_PROLOG(SPR_SPRG3, PC_BOOKE_MCHKSAVE, SPR_MCSRR0, SPR_MCSRR1) + STANDARD_CRIT_PROLOG(SPR_SPRG3, PC_BOOKE_MCHKSAVE, PC_BOOKE_MCHKSTACK, + SPR_MCSRR0, SPR_MCSRR1) FRAME_SETUP(SPR_SPRG3, PC_BOOKE_MCHKSAVE, EXC_MCHK) GET_TOCBASE(%r2) addi %r3, %r1, CALLSIZE bl CNAME(powerpc_interrupt) TOC_RESTORE + CRIT_SRR_RESTORE(PC_BOOKE_MCHKSAVE) FRAME_LEAVE(SPR_SPRG3, PC_BOOKE_MCHKSAVE, SPR_MCSRR0, SPR_MCSRR1) rfmci @@ -655,13 +658,14 @@ INTERRUPT(int_fixed_interval_timer) * Watchdog interrupt ****************************************************************************/ INTERRUPT(int_watchdog) - STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) + STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, + PC_BOOKE_CRITSTACK, SPR_CSRR0, SPR_CSRR1) FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_WDOG) GET_TOCBASE(%r2) addi %r3, %r1, CALLSIZE bl CNAME(powerpc_interrupt) TOC_RESTORE - CRIT_SRR_RESTORE + CRIT_SRR_RESTORE(PC_BOOKE_CRITSAVE) FRAME_LEAVE(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) rfci @@ -981,14 +985,16 @@ interrupt_vector_top: * Debug interrupt ****************************************************************************/ INTERRUPT(int_debug) - STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) + STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, + PC_BOOKE_CRITSTACK, SPR_CSRR0, SPR_CSRR1) FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_DEBUG) bl int_debug_int FRAME_LEAVE(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) rfci INTERRUPT(int_debug_ed) - STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_DSRR0, SPR_DSRR1) + STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, + PC_BOOKE_CRITSTACK, SPR_DSRR0, SPR_DSRR1) FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_DEBUG) bl int_debug_int FRAME_LEAVE(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_DSRR0, SPR_DSRR1) diff --git a/sys/powerpc/include/pcpu.h b/sys/powerpc/include/pcpu.h index 18f0e3209b92..752e34639640 100644 --- a/sys/powerpc/include/pcpu.h +++ b/sys/powerpc/include/pcpu.h @@ -93,17 +93,18 @@ struct pvo_entry; #define BOOKE_CRITSTACK_SIZE 16384 #ifdef __powerpc64__ -#define BOOKE_PCPU_PAD 893 +#define BOOKE_PCPU_PAD 869 #else -#define BOOKE_PCPU_PAD 361 +#define BOOKE_PCPU_PAD 349 #endif #define PCPU_MD_BOOKE_FIELDS \ register_t critsave[BOOKE_CRITSAVE_LEN]; \ - register_t mchksave[CPUSAVE_LEN]; \ + register_t mchksave[BOOKE_CRITSAVE_LEN]; \ register_t tlbsave[BOOKE_TLBSAVE_LEN]; \ register_t tlb_level; \ uintptr_t *tlb_lock; \ void *critstack; \ + void *mchkstack; \ int tid_next; \ char __pad[BOOKE_PCPU_PAD]; diff --git a/sys/powerpc/powerpc/genassym.c b/sys/powerpc/powerpc/genassym.c index e8c08867d778..4105575b11ee 100644 --- a/sys/powerpc/powerpc/genassym.c +++ b/sys/powerpc/powerpc/genassym.c @@ -70,6 +70,7 @@ ASSYM(PC_BOOKE_TLBSAVE, offsetof(struct pcpu, pc_booke.tlbsave)); ASSYM(PC_BOOKE_TLB_LEVEL, offsetof(struct pcpu, pc_booke.tlb_level)); ASSYM(PC_BOOKE_TLB_LOCK, offsetof(struct pcpu, pc_booke.tlb_lock)); ASSYM(PC_BOOKE_CRITSTACK, offsetof(struct pcpu, pc_booke.critstack)); +ASSYM(PC_BOOKE_MCHKSTACK, offsetof(struct pcpu, pc_booke.mchkstack)); #endif ASSYM(CPUSAVE_R27, CPUSAVE_R27*sizeof(register_t));