From nobody Wed Sep 02 02:07:58 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4hZR2r1QbWz6qQSg for ; Wed, 02 Sep 2026 02:08:04 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR2" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4hZR2q2hCxz3lVp for ; Wed, 02 Sep 2026 02:08:03 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1788314883; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=RfukT6nH2PR3BMTDyNv5ixCzQmCK8MsgHnxkpiuv6dI=; b=t7q6fWAZzoKOVXE9L7tc8MCBLkhmGL6RJasd8yeVXNQCgkoNymV0OqXeYtF+bxSCJMz1kw qYWzU36jFsmOzue93PdVFE72FKaRI3/Rq0WxVHAP2kLJ6opd7t2KyziHXKDRC1I9W7QEBV 2uXnzB+dS60njNcLuGETNZUEh+L3zSQhs9dhD7M6VQmnS8xAp6a6Zcutavoo0XxWkgZxFx w4S+SlRb9pf0/8aXGRmxLxxVpVXAfSpAxOzAOCDqeJvqggtCSebNENd2yzN4dpaR3OXU2Z NVokErRNLhxkQCfgM9HUhXDmEyKlDr4bbnA7TrB1IO3q43N5V00Sg0cSvzaMdQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1788314883; a=rsa-sha256; cv=none; b=Ramg5TK1KJQlo22p5CS67X1YvELXUsbyOCiWvZ+E3uVFQ4fLCv0F3VoSlGZcNNIVH0VWF/ Bpm6+Pl7Vo5J+bFf2+GK5PABPRAlYE+/jrLmQ6EeijU+ZXhc4iZfDPd29UQAZFW6TYSFqX 6xPkDsY5kpY131Xtoq85P7ci4Y/dt0gIrDczAApa2gE6Yut9fFZG4g5IQicwTP7hVpTnSz B5e37p1S9XNzUMXyl/mAd0QIkgPYXtDtjku/DiGib52+9aon8gFhx0MP/v/nLU0dkf9nVF UmJXirhGRKIt0dQBbQjaf2pijZDu7pFf5G+v1a8uortKCVeVUtQ5AwqbeIJ+Gg== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1788314883; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=RfukT6nH2PR3BMTDyNv5ixCzQmCK8MsgHnxkpiuv6dI=; b=MRHsDDU4SQFGrQgBj6ITNtY71KXg2Ye2UNcP+2r32wYuPq63jj9/IbYMNEcQzUP/iFm7tc wvlzbV6Efu7fQFhlRSEMR97hjE625AfX46b9UoFyo9OgJK0mTwcbhHkRAmuI7w6nGsCapm WFnbI7sJu4q/3SxnPCxiNRUZ4QDzwco+IpPEaVByKAps3jnVq5Zxz/3WcugLnObaY2nZ72 9ipAJGSR+GwFpkQzq9ARuBDxNcMII1eH8myF102vJasVOG2sc5sOXK0Ke0bN8+Ojll6XbV qlKs1Pmt4hHOuPzk2qyOwdnwGtfUMrKyWvyifgjXMW6VXPpShtU23ibSXkumdg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4hZR2q0ntqz8J1 for ; Wed, 02 Sep 2026 02:08:03 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 207e5 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Wed, 02 Sep 2026 02:07:58 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Jaeyoon Choi Subject: git: 973783515e7d - main - ufshci: fix the Snapdragon X Elite reference clock List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jaeyoon X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 973783515e7db6e19550c57c8f9d94d907e3bd0e Auto-Submitted: auto-generated Date: Wed, 02 Sep 2026 02:07:58 +0000 Message-Id: <6a9784fe.207e5.56ddd780@gitrepo.freebsd.org> The branch main has been updated by jaeyoon: URL: https://cgit.FreeBSD.org/src/commit/?id=973783515e7db6e19550c57c8f9d94d907e3bd0e commit 973783515e7db6e19550c57c8f9d94d907e3bd0e Author: Jaeyoon Choi AuthorDate: 2026-09-02 01:47:18 +0000 Commit: Jaeyoon Choi CommitDate: 2026-09-02 02:05:09 +0000 ufshci: fix the Snapdragon X Elite reference clock The driver's ACPI table set bRefClkFreq to 19.2 MHz. The Snapdragon X Elite feeds the device 38.4 MHz from its CXO. The firmware has no property for it. The device ran its PLL from the wrong base. Every HS mode failed. PWM still worked. The attribute is persistent. The wrong value survived reboots. Set 38.4 MHz in the table. Read the attribute first. Write it only when the value differs or the read fails. Log a changed value and a failed read. Verified on the Galaxy Book 4 Edge. Reviewed by: imp (mentor) Sponsored by: Samsung Electronics Differential Revision: https://reviews.freebsd.org/D59297 --- sys/dev/ufshci/ufshci_acpi.c | 6 +++++- sys/dev/ufshci/ufshci_dev.c | 17 +++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/sys/dev/ufshci/ufshci_acpi.c b/sys/dev/ufshci/ufshci_acpi.c index 94da0d3cb411..f96a4c29e15e 100644 --- a/sys/dev/ufshci/ufshci_acpi.c +++ b/sys/dev/ufshci/ufshci_acpi.c @@ -51,8 +51,12 @@ static struct ufshci_acpi_device { uint32_t ref_clk; uint32_t quirks; } ufshci_acpi_devices[] = { + /* + * The SoC feeds the device 38.4 MHz from its CXO. The firmware + * has no property for it. Verified on the Galaxy Book 4 Edge. + */ { "QCOM24A5", "Qualcomm Snapdragon X Elite UFS Host Controller", - UFSHCI_REF_CLK_19_2MHz, + UFSHCI_REF_CLK_38_4MHz, UFSHCI_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH | UFSHCI_QUIRK_BROKEN_LSDBS_MCQS_CAP }, { 0x00000000, NULL, 0, 0 } diff --git a/sys/dev/ufshci/ufshci_dev.c b/sys/dev/ufshci/ufshci_dev.c index 063b65aaf579..dd467f85c795 100644 --- a/sys/dev/ufshci/ufshci_dev.c +++ b/sys/dev/ufshci/ufshci_dev.c @@ -242,10 +242,27 @@ ufshci_dev_init_reference_clock(struct ufshci_controller *ctrlr) { int error; uint8_t index, selector; + uint64_t value; index = 0; /* bRefClkFreq is device type attribute */ selector = 0; /* bRefClkFreq is device type attribute */ + /* + * bRefClkFreq is a persistent attribute. Skip the write when + * the device already holds the wanted value. + */ + error = ufshci_dev_read_attribute(ctrlr, UFSHCI_ATTR_B_REF_CLK_FREQ, + index, selector, &value); + if (error != 0) { + ufshci_printf(ctrlr, "bRefClkFreq read failed, writing %u\n", + ctrlr->ref_clk); + } else if ((uint32_t)value == ctrlr->ref_clk) { + return (0); + } else { + ufshci_printf(ctrlr, "changing bRefClkFreq from %u to %u\n", + (uint32_t)value, ctrlr->ref_clk); + } + error = ufshci_dev_write_attribute(ctrlr, UFSHCI_ATTR_B_REF_CLK_FREQ, index, selector, ctrlr->ref_clk); if (error)