git: 6a0610cb5018 - main - powerpc/pic: fix the openpic CPU logic to work on powermac

The branch main has been updated by adrian:

URL: https://cgit.FreeBSD.org/src/commit/?id=6a0610cb50181d1797d1a8c5d60ad76c666a625e

commit 6a0610cb50181d1797d1a8c5d60ad76c666a625e
Author:     Adrian Chadd <adrian@FreeBSD.org>
AuthorDate: 2026-05-01 00:07:48 +0000
Commit:     Adrian Chadd <adrian@FreeBSD.org>
CommitDate: 2026-05-01 00:07:48 +0000

    powerpc/pic: fix the openpic CPU logic to work on powermac
    
    Earlier work (40bcad56f - powerpc/pic: Add a PIC_AP_INIT() to
    set up AP PIC info) broke booting my dual G5 powermac.
    
    After much digging, jhibbits@ and I discovered that the openpic
    implementation for the memory/bus controller used in the G5 CPUs
    doesn't implement /all/ of the openpic specification.
    Notably it sticks the WHOAMI register in a different location.
    This is reading 0x0 back for all the PICs which is .. very not great.
    
    So to restore the previous behaviour, use a quick for now that jhibbits@
    can set appropriately to trust WHOAMI.
    
    I've tested this on my dual G5 PPC and it boots/runs fine.
    
    Fixes: 40bcad56f
    
    Reviewed by:    jhibbits
    Differential Revision:  https://reviews.freebsd.org/D56751
---
 sys/powerpc/include/openpicvar.h |  1 +
 sys/powerpc/ofw/openpic_ofw.c    |  1 +
 sys/powerpc/powerpc/openpic.c    | 17 ++++++++++++++++-
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/sys/powerpc/include/openpicvar.h b/sys/powerpc/include/openpicvar.h
index 4f086f809f08..2aca4b38e845 100644
--- a/sys/powerpc/include/openpicvar.h
+++ b/sys/powerpc/include/openpicvar.h
@@ -36,6 +36,7 @@
 
 #define	OPENPIC_QUIRK_SINGLE_BIND	1	/* Bind interrupts to only 1 CPU */
 #define	OPENPIC_QUIRK_HIDDEN_IRQS	2	/* May have IRQs beyond FRR[NIRQ] */
+#define	OPENPIC_QUIRK_WHOAMI_WORKS	4	/* WHOAMI register is present */
 
 /* Names match the macros in openpicreg.h. */
 struct openpic_timer {
diff --git a/sys/powerpc/ofw/openpic_ofw.c b/sys/powerpc/ofw/openpic_ofw.c
index 4083e9eba749..48e2038f2f53 100644
--- a/sys/powerpc/ofw/openpic_ofw.c
+++ b/sys/powerpc/ofw/openpic_ofw.c
@@ -125,6 +125,7 @@ openpic_ofw_attach(device_t dev)
 	if (ofw_bus_is_compatible(dev, "fsl,mpic")) {
 		sc->sc_quirks = OPENPIC_QUIRK_SINGLE_BIND;
 		sc->sc_quirks |= OPENPIC_QUIRK_HIDDEN_IRQS;
+		sc->sc_quirks |= OPENPIC_QUIRK_WHOAMI_WORKS;
 	}
 
 	return (openpic_common_attach(dev, xref));
diff --git a/sys/powerpc/powerpc/openpic.c b/sys/powerpc/powerpc/openpic.c
index 3cb4c544a91a..d0c0cc59afe5 100644
--- a/sys/powerpc/powerpc/openpic.c
+++ b/sys/powerpc/powerpc/openpic.c
@@ -469,8 +469,23 @@ openpic_ap_init(device_t dev)
 	if (dev != root_pic)
 		return;
 
+	/*
+	 * Not everything implements the full OpenPIC specification.
+	 *
+	 * Notably the CPC945 Bridge and Memory Controller User Manual, which
+	 * is in the PPC 970 (ie Apple G5) CPUs, calls out a set of
+	 * deviations from the specification.  Thus we can't just assume
+	 * WHOAMI is available everywhere.
+	 *
+	 * See 9.5.3.3 - Deviations from the OpenPIC specification.
+	 * Notably - the WhoAmI register is actually 0xF8000050 for all CPUs.
+	 */
+
 	sc = device_get_softc(dev);
-	PCPU_SET(pic, bus_read_4(sc->sc_memr, OPENPIC_WHOAMI));
+	if (sc->sc_quirks & OPENPIC_QUIRK_WHOAMI_WORKS)
+		PCPU_SET(pic, bus_read_4(sc->sc_memr, OPENPIC_WHOAMI));
+	else
+		PCPU_SET(pic, PCPU_GET(cpuid));
 }
 
 static device_method_t openpic_methods[] = {