git: 9209e04d76c5 - main - hwpstate_intel(4): Debug sysctl: Rename struct/field

The branch main has been updated by olce:

URL: https://cgit.FreeBSD.org/src/commit/?id=9209e04d76c577863210dbc9faa94d4dd7498af6

commit 9209e04d76c577863210dbc9faa94d4dd7498af6
Author:     Olivier Certner <olce@FreeBSD.org>
AuthorDate: 2026-06-26 13:51:10 +0000
Commit:     Olivier Certner <olce@FreeBSD.org>
CommitDate: 2026-06-26 21:36:16 +0000

    hwpstate_intel(4): Debug sysctl: Rename struct/field
    
    New names are better descriptions and match what is done in
    hwpstate_amd(4).
    
    No functional change (intended).
    
    MFC after:      2 weeks
    Event:          Halifax Hackathon 202606
    Location:       Dalhousie CS Faculty building
    Sponsored by:   The FreeBSD Foundation
---
 sys/x86/cpufreq/hwpstate_intel.c | 37 ++++++++++++++++++++-----------------
 1 file changed, 20 insertions(+), 17 deletions(-)

diff --git a/sys/x86/cpufreq/hwpstate_intel.c b/sys/x86/cpufreq/hwpstate_intel.c
index 3ee97772e122..d67e83b33af7 100644
--- a/sys/x86/cpufreq/hwpstate_intel.c
+++ b/sys/x86/cpufreq/hwpstate_intel.c
@@ -141,42 +141,45 @@ hwp_has_error(u_int res, u_int err)
 	return ((res & err) != 0);
 }
 
-struct dump_cppc_request_cb {
+struct get_cppc_regs_data {
+	/* Inputs */
 	struct hwp_softc *sc;
+	/* Outputs */
 	uint64_t enabled;
 	uint64_t caps;
 	uint64_t request;
 	uint64_t request_pkg;
-	int err;
+	/* HWP_ERROR_CPPC_* except HWP_ERROR_*_WRITE */
+	u_int res;
 };
 
 static void
-dump_cppc_request_cb(void *args)
+get_cppc_regs_cb(void *args)
 {
-	struct dump_cppc_request_cb *const data = args;
+	struct get_cppc_regs_data *const data = args;
 
-	data->err = 0;
+	data->res = 0;
 
 	if (rdmsr_safe(MSR_IA32_PM_ENABLE, &data->enabled))
-		data->err |= HWP_ERROR_CPPC_ENABLE;
+		data->res |= HWP_ERROR_CPPC_ENABLE;
 	if (rdmsr_safe(MSR_IA32_HWP_CAPABILITIES, &data->caps))
-		data->err |= HWP_ERROR_CPPC_CAPS;
+		data->res |= HWP_ERROR_CPPC_CAPS;
 	if (rdmsr_safe(MSR_IA32_HWP_REQUEST, &data->request))
-		data->err |= HWP_ERROR_CPPC_REQUEST;
+		data->res |= HWP_ERROR_CPPC_REQUEST;
 
 	if (data->sc->hwp_pkg_ctrl &&
 	    (data->request & IA32_HWP_REQUEST_PACKAGE_CONTROL)) {
 		if (rdmsr_safe(MSR_IA32_HWP_REQUEST_PKG, &data->request_pkg))
-			data->err |= HWP_ERROR_CPPC_REQUEST_PKG;
+			data->res |= HWP_ERROR_CPPC_REQUEST_PKG;
 	}
 }
 
 static inline void
-dump_cppc_request_one(struct hwp_softc *sc, struct dump_cppc_request_cb *req)
+get_cppc_regs_one(struct hwp_softc *sc, struct get_cppc_regs_data *req)
 {
 	req->sc = sc;
 	smp_rendezvous_cpu(cpu_get_pcpu(sc->dev)->pc_cpuid,
-	    smp_no_rendezvous_barrier, dump_cppc_request_cb,
+	    smp_no_rendezvous_barrier, get_cppc_regs_cb,
 	    smp_no_rendezvous_barrier, req);
 }
 
@@ -189,7 +192,7 @@ intel_hwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS)
 	struct pcpu *pc;
 	struct sbuf *sb;
 	struct hwp_softc *sc;
-	struct dump_cppc_request_cb data;
+	struct get_cppc_regs_data data;
 	int ret = 0;
 
 	sc = (struct hwp_softc *)arg1;
@@ -199,11 +202,11 @@ intel_hwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS)
 	if (pc == NULL)
 		return (ENXIO);
 
-	dump_cppc_request_one(sc, &data);
+	get_cppc_regs_one(sc, &data);
 	sb = sbuf_new(NULL, NULL, 1024, SBUF_FIXEDLEN | SBUF_INCLUDENUL);
 	sbuf_putc(sb, '\n');
 
-	if (hwp_has_error(data.err, HWP_ERROR_CPPC_ENABLE))
+	if (hwp_has_error(data.res, HWP_ERROR_CPPC_ENABLE))
 		sbuf_printf(sb, "CPU%u: IA32_PM_ENABLE: " MSR_NOT_READ_MSG "\n",
 		    pc->pc_cpuid);
 	else
@@ -212,7 +215,7 @@ intel_hwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS)
 
 	if (data.enabled == 0)
 		goto out;
-	if (hwp_has_error(data.err, HWP_ERROR_CPPC_CAPS)) {
+	if (hwp_has_error(data.res, HWP_ERROR_CPPC_CAPS)) {
 		sbuf_printf(sb,
 		    "IA32_HWP_CAPABILITIES: " MSR_NOT_READ_MSG "\n");
 	} else {
@@ -235,9 +238,9 @@ intel_hwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS)
 		sbuf_printf(sb, "\t%s: %03u\n", name,			\
 		    (unsigned)(data.request_pkg >> offset) & 0xff);		\
 } while (0)
-	if (hwp_has_error(data.err, HWP_ERROR_CPPC_REQUEST)) {
+	if (hwp_has_error(data.res, HWP_ERROR_CPPC_REQUEST)) {
 		sbuf_printf(sb, "IA32_HWP_REQUEST: " MSR_NOT_READ_MSG "\n");
-	} else if (hwp_has_error(data.err, HWP_ERROR_CPPC_REQUEST_PKG)) {
+	} else if (hwp_has_error(data.res, HWP_ERROR_CPPC_REQUEST_PKG)) {
 		sbuf_printf(sb, "IA32_HWP_REQUEST_PKG: " MSR_NOT_READ_MSG "\n");
 	} else {
 		pkg_print(IA32_HWP_REQUEST_EPP_VALID,