git: 39e297bf54a5 - main - ig4iic: Add PantherLake IDs

The branch main has been updated by aokblast:

URL: https://cgit.FreeBSD.org/src/commit/?id=39e297bf54a57a17d8b44c20e502d6f2c6db08f6

commit 39e297bf54a57a17d8b44c20e502d6f2c6db08f6
Author:     Daniel Schaefer <dhs@frame.work>
AuthorDate: 2026-05-31 11:18:31 +0000
Commit:     ShengYi Hung <aokblast@FreeBSD.org>
CommitDate: 2026-06-01 06:02:52 +0000

    ig4iic: Add PantherLake IDs
    
    MFC after:      2 weeks
    Sponsored by:   Framework Computer Inc
    Signed-off-by: Daniel Schaefer <dhs@frame.work>
---
 sys/dev/ichiic/ig4_pci.c    | 12 ++++++++++++
 sys/dev/ichsmb/ichsmb_pci.c |  4 ++++
 sys/dev/intel/spi_pci.c     |  1 +
 3 files changed, 17 insertions(+)

diff --git a/sys/dev/ichiic/ig4_pci.c b/sys/dev/ichiic/ig4_pci.c
index 49036c6dabc9..52e072e8eae1 100644
--- a/sys/dev/ichiic/ig4_pci.c
+++ b/sys/dev/ichiic/ig4_pci.c
@@ -196,6 +196,12 @@ static int ig4iic_pci_detach(device_t dev);
 #define PCI_CHIP_LUNARLAKE_M_I2C_1      0xa8798086
 #define PCI_CHIP_LUNARLAKE_M_I2C_2      0xa87a8086
 #define PCI_CHIP_LUNARLAKE_M_I2C_3      0xa87b8086
+#define PCI_CHIP_PANTHERLAKE_H_I2C_0    0xe4788086
+#define PCI_CHIP_PANTHERLAKE_H_I2C_1    0xe4798086
+#define PCI_CHIP_PANTHERLAKE_H_I2C_2    0xe4508086
+#define PCI_CHIP_PANTHERLAKE_H_I2C_3    0xe4518086
+#define PCI_CHIP_PANTHERLAKE_H_I2C_4    0xe47a8086
+#define PCI_CHIP_PANTHERLAKE_H_I2C_5    0xe47b8086
 
 struct ig4iic_pci_device {
 	uint32_t	devid;
@@ -336,6 +342,12 @@ static struct ig4iic_pci_device ig4iic_pci_devices[] = {
 	{ PCI_CHIP_LUNARLAKE_M_I2C_1, "Intel Lunar Lake-M I2C Controller-1", IG4_TIGERLAKE},
 	{ PCI_CHIP_LUNARLAKE_M_I2C_2, "Intel Lunar Lake-M I2C Controller-2", IG4_TIGERLAKE},
 	{ PCI_CHIP_LUNARLAKE_M_I2C_3, "Intel Lunar Lake-M I2C Controller-3", IG4_TIGERLAKE},
+	{ PCI_CHIP_PANTHERLAKE_H_I2C_0, "Intel Panther Lake-H I2C Controller-0", IG4_TIGERLAKE},
+	{ PCI_CHIP_PANTHERLAKE_H_I2C_1, "Intel Panther Lake-H I2C Controller-1", IG4_TIGERLAKE},
+	{ PCI_CHIP_PANTHERLAKE_H_I2C_2, "Intel Panther Lake-H I2C Controller-2", IG4_TIGERLAKE},
+	{ PCI_CHIP_PANTHERLAKE_H_I2C_3, "Intel Panther Lake-H I2C Controller-3", IG4_TIGERLAKE},
+	{ PCI_CHIP_PANTHERLAKE_H_I2C_4, "Intel Panther Lake-H I2C Controller-4", IG4_TIGERLAKE},
+	{ PCI_CHIP_PANTHERLAKE_H_I2C_5, "Intel Panther Lake-H I2C Controller-5", IG4_TIGERLAKE},
 };
 
 static int
diff --git a/sys/dev/ichsmb/ichsmb_pci.c b/sys/dev/ichsmb/ichsmb_pci.c
index 7f9409e4452c..7b85fe382a2d 100644
--- a/sys/dev/ichsmb/ichsmb_pci.c
+++ b/sys/dev/ichsmb/ichsmb_pci.c
@@ -119,6 +119,7 @@
 #define	ID_METEORLAKE			0x7e22
 #define	ID_METEORLAKE2			0x7f23
 #define	ID_METEORLAKE3			0xae22
+#define	ID_PANTHERLAKE			0xe422
 
 static const struct pci_device_table ichsmb_devices[] = {
 	{ PCI_DEV(PCI_VENDOR_INTEL, ID_82801AA),
@@ -280,6 +281,9 @@ static const struct pci_device_table ichsmb_devices[] = {
 	{ PCI_DEV(PCI_VENDOR_INTEL, ID_METEORLAKE3),
 	  .driver_data = (uintptr_t)ICHSMB_FEATURE_BLOCK_BUFFER,
 	  PCI_DESCR("Intel Meteor Lake SMBus controller") },
+	{ PCI_DEV(PCI_VENDOR_INTEL, ID_PANTHERLAKE),
+	  .driver_data = (uintptr_t)ICHSMB_FEATURE_BLOCK_BUFFER,
+	  PCI_DESCR("Intel Panther Lake SMBus controller") },
 };
 
 /* Internal functions */
diff --git a/sys/dev/intel/spi_pci.c b/sys/dev/intel/spi_pci.c
index 49fb9c14d268..3780589d03e5 100644
--- a/sys/dev/intel/spi_pci.c
+++ b/sys/dev/intel/spi_pci.c
@@ -58,6 +58,7 @@ static struct intelspi_pci_device {
 	{ 0xa2aa8086, SPI_SUNRISEPOINT, "Intel Kaby Lake-H SPI Controller-1" },
 	{ 0xa3a98086, SPI_SUNRISEPOINT, "Intel Comet Lake-V SPI Controller-0" },
 	{ 0xa3aa8086, SPI_SUNRISEPOINT, "Intel Comet Lake-V SPI Controller-1" },
+	{ 0xe4238086, SPI_SUNRISEPOINT, "Intel Panther Lake-H SPI Controller" },
 };
 
 static int