git: c558eca47970 - main - smartpqi: update to version 4660.0.2002

From: John Hall <jrhall_at_FreeBSD.org>
Date: Fri, 09 Jan 2026 17:40:18 UTC
The branch main has been updated by jrhall:

URL: https://cgit.FreeBSD.org/src/commit/?id=c558eca47970c8467ed0494145f08d1879050bbd

commit c558eca47970c8467ed0494145f08d1879050bbd
Author:     John Hall <jrhall@FreeBSD.org>
AuthorDate: 2025-08-28 21:11:02 +0000
Commit:     John Hall <jrhall@FreeBSD.org>
CommitDate: 2026-01-09 17:39:58 +0000

    smartpqi: update to version 4660.0.2002
    
    This updates the smartpqi driver to Microchip's
    latest available public release.
    
    Reviewed by: imp
    Approved by: imp
    
    Sponsored by: Microchip Technology Inc.
    
    Differential Revision: https://reviews.freebsd.org/D52507
---
 share/man/man4/smartpqi.4               |  86 +++++++-
 sys/dev/smartpqi/smartpqi_cam.c         |  53 ++---
 sys/dev/smartpqi/smartpqi_cmd.c         |   4 +-
 sys/dev/smartpqi/smartpqi_controllers.h | 371 ++++++++++++++++++++++++++++++++
 sys/dev/smartpqi/smartpqi_defines.h     |  43 ++--
 sys/dev/smartpqi/smartpqi_discovery.c   | 167 +++++---------
 sys/dev/smartpqi/smartpqi_event.c       |  10 +-
 sys/dev/smartpqi/smartpqi_helper.c      |  32 ++-
 sys/dev/smartpqi/smartpqi_init.c        |  13 +-
 sys/dev/smartpqi/smartpqi_intr.c        |   3 +-
 sys/dev/smartpqi/smartpqi_ioctl.c       |  12 +-
 sys/dev/smartpqi/smartpqi_main.c        | 320 +++------------------------
 sys/dev/smartpqi/smartpqi_misc.c        |  28 +--
 sys/dev/smartpqi/smartpqi_prototypes.h  |  52 ++---
 sys/dev/smartpqi/smartpqi_queue.c       |  25 +--
 sys/dev/smartpqi/smartpqi_request.c     | 104 ++++-----
 sys/dev/smartpqi/smartpqi_response.c    |  14 +-
 sys/dev/smartpqi/smartpqi_sis.c         |   6 +-
 sys/dev/smartpqi/smartpqi_structures.h  |   5 +-
 19 files changed, 724 insertions(+), 624 deletions(-)

diff --git a/share/man/man4/smartpqi.4 b/share/man/man4/smartpqi.4
index f5fab85d13bd..ef5f903fe422 100644
--- a/share/man/man4/smartpqi.4
+++ b/share/man/man4/smartpqi.4
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2019-2023, Microchip Technology Inc. and its subsidiaries
+.\" Copyright (C) 2019-2025, Microchip Technology Inc. and its subsidiaries
 .\" Copyright (C) 2016-2018, Microsemi Corporation
 .\" Copyright (C) 2016, PMC-Sierra, Inc.
 .\" Written by John Hall <john.hall@microchip.com>
@@ -24,7 +24,7 @@
 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 .\" SUCH DAMAGE.
 .\"
-.Dd August 24, 2023
+.Dd August 28, 2025
 .Dt SMARTPQI 4 amd64
 .Os
 .Sh NAME
@@ -48,7 +48,7 @@ smartpqi_load="YES"
 The
 .Nm
 driver provides support for Microchip Technology Inc. / Adaptec SmartRaid and
-SmartHBA SATA/SAS/NVME PCIe controllers
+SmartHBA SATA/SAS/NVMe PCIe controllers
 .Sh HARDWARE
 Controllers supported by the
 .Nm
@@ -63,6 +63,86 @@ Adaptec SmartRaid and SmartHBA Controllers
 OEM Controllers based on the Microchip Technology Inc. SmartROC
 and SmartIOC Chipsets
 .El
+.Sh DEBUGGING
+Driver diagnostic printing is controlled in
+.Xr loader.conf 5
+by using the global
+.Va hw.smartpqi.debug_level
+tunable.
+.Pp
+The
+.Va debug_level
+variable is set with an integer value.
+The default value is 0x0060 (warn && error).
+.Pp
+The following levels are available:
+.Bl -column "FlagXX" "NameXXXX" "Description" -offset indent
+.It Em Flag Ta Em Name Ta Em Description
+.It 0x0001 Ta init Ta System initialization operations
+.It 0x0002 Ta info Ta Basic information
+.It 0x0004 Ta function Ta Used to show function entry and exit
+.It 0x0008 Ta io Ta Logging data from controller
+.It 0x0010 Ta discovery Ta Device discovery
+.It 0x0020 Ta warning Ta Operational warnings
+.It 0x0040 Ta error Ta Parameter errors and programming bugs
+.It 0x0080 Ta note Ta More detailed information
+.El
+.Sh DEVICE HINTS
+The following tunable values can be set in
+.Pa /boot/device.hints
+to control the behavior of the
+.Nm
+driver.
+These hints are specified as:
+.Bd -literal -offset indent
+hint.smartpqi.<unit>.<variable>=<value>
+.Ed
+.Pp
+The supported variables are:
+.Bl -tag -width ".Va aio_raid1_write_disable"
+.It Va stream_disable
+If set to 0, disables Stream Detection.
+.Pp
+Default is (enabled).
+.It Va sata_unique_wwn_disable
+If set to 0, disables SATA Unique World Wide Number.
+.Pp
+Default is (enabled).
+.It Va aio_raid1_write_disable
+If set to 0, disables acceleration of RAID1 writes
+.Pp
+Default is (enabled).
+.It Va aio_raid5_write_disable
+If set to 0, disables acceleration of RAID5 writes
+.Pp
+Default is (enabled).
+.It Va aio_raid6_write_disable
+If set to 0, disables acceleration of RAID6 writes
+.Pp
+Default is (enabled).
+.It Va queue_depth
+Sets queue depth for the controller. If the queue depth value
+is greater than the maximum supported queue size of the driver or
+controller, it will be set to the lowest size. If the queue
+depth value is lower than the minimum queue depth then this will
+be set to the minimum queue depth.
+.Pp
+Default is driver-determined.
+.It Va sg_count
+Sets the scatter gather (sg) count. If this sg count is greater
+than maximum sg count it will be set to the maximum sg count.
+If this sg count is less than minimum sg count it will be set to
+the minimum sg count.
+.Pp
+Default is driver-determined.
+.El
+.Pp
+For example, to disable Stream Detection on the first controller, add
+the following line to
+.Pa /boot/device.hints :
+.Bd -literal -offset indent
+hint.smartpqi.0.stream_disable="0"
+.Ed
 .Sh FILES
 .Bl -tag -width /boot/kernel/smartpqi.ko -compact
 .It Pa /dev/smartpqi?
diff --git a/sys/dev/smartpqi/smartpqi_cam.c b/sys/dev/smartpqi/smartpqi_cam.c
index ffdd9fd7da79..93043a296c5d 100644
--- a/sys/dev/smartpqi/smartpqi_cam.c
+++ b/sys/dev/smartpqi/smartpqi_cam.c
@@ -1,5 +1,5 @@
 /*-
- * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -71,7 +71,6 @@ update_sim_properties(struct cam_sim *sim, struct ccb_pathinq *cpi)
 	cpi->hba_subvendor = pci_get_subvendor(dev);
 	cpi->hba_subdevice = pci_get_subdevice(dev);
 
-
 	DBG_FUNC("OUT\n");
 }
 
@@ -154,10 +153,6 @@ os_remove_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
 		}
 		xpt_async(AC_LOST_DEVICE, tmppath, NULL);
 		xpt_free_path(tmppath);
-		/* softs->device_list[device->target][device->lun] = NULL; */
-		int index = pqisrc_find_device_list_index(softs,device);
-		if (index >= 0 && index < PQI_MAX_DEVICES)
-			softs->dev_list[index] = NULL;
 		pqisrc_free_device(softs, device);
 	}
 
@@ -335,7 +330,7 @@ os_io_response_success(rcb_t *rcb)
 
 static void
 copy_sense_data_to_csio(struct ccb_scsiio *csio,
-		uint8_t *sense_data, uint16_t sense_data_len)
+		uint8_t const *sense_data, uint16_t sense_data_len)
 {
 	DBG_IO("IN csio = %p\n", csio);
 
@@ -740,7 +735,7 @@ smartpqi_target_rescan(struct pqisrc_softstate *softs)
 		/* if(softs->device_list[target][lun]){ */
 		if(softs->dev_list[index] != NULL) {
 			device = softs->dev_list[index];
-			DBG_INFO("calling smartpqi_lun_rescan with TL = %d:%d\n",device->target,device->lun);
+			DBG_INFO("calling smartpqi_lun_rescan with T%d:L%d\n",device->target,device->lun);
 			smartpqi_lun_rescan(softs, device->target, device->lun);
 		}
 	}
@@ -821,7 +816,6 @@ pqisrc_io_start(struct cam_sim *sim, union ccb *ccb)
 
 	if (index == INVALID_ELEM) {
 		ccb->ccb_h.status = CAM_DEV_NOT_THERE;
-		DBG_INFO("Invalid index/device!!!, Device BTL %u:%d:%d\n", softs->bus_id, target, lun);
 		return ENXIO;
 	}
 
@@ -850,7 +844,7 @@ pqisrc_io_start(struct cam_sim *sim, union ccb *ccb)
 	}
 	/* Check device reset */
 	if (DEVICE_RESET(dvp)) {
-		ccb->ccb_h.status = CAM_SCSI_BUSY | CAM_REQ_INPROG | CAM_BUSY;
+		ccb->ccb_h.status = CAM_BUSY;
 		DBG_WARN("Device %d reset returned busy\n", ccb->ccb_h.target_id);
 		return EBUSY;
 	}
@@ -915,7 +909,7 @@ pqisrc_io_start(struct cam_sim *sim, union ccb *ccb)
 }
 
 static inline int
-pqi_tmf_status_to_bsd_tmf_status(int pqi_status, rcb_t *rcb)
+pqi_tmf_status_to_bsd_tmf_status(int pqi_status, rcb_t const *rcb)
 {
 	if (PQI_STATUS_SUCCESS == pqi_status &&
 			PQI_STATUS_SUCCESS == rcb->status)
@@ -931,7 +925,7 @@ static int
 pqisrc_scsi_abort_task(pqisrc_softstate_t *softs,  union ccb *ccb)
 {
 	rcb_t *rcb = NULL;
-	struct ccb_hdr *ccb_h = &ccb->ccb_h;
+	struct ccb_hdr const *ccb_h = &ccb->ccb_h;
 	rcb_t *prcb = ccb->ccb_h.sim_priv.entries[0].ptr;
 	uint32_t tag;
 	int rval;
@@ -971,7 +965,7 @@ error_tmf:
 static int
 pqisrc_scsi_abort_task_set(pqisrc_softstate_t *softs, union ccb *ccb)
 {
-	struct ccb_hdr *ccb_h = &ccb->ccb_h;
+	struct ccb_hdr const *ccb_h = &ccb->ccb_h;
 	rcb_t *rcb = NULL;
 	uint32_t tag;
 	int rval;
@@ -1013,7 +1007,7 @@ pqisrc_target_reset( pqisrc_softstate_t *softs,  union ccb *ccb)
 {
 
 	/* pqi_scsi_dev_t *devp = softs->device_list[ccb->ccb_h.target_id][ccb->ccb_h.target_lun]; */
-	struct ccb_hdr  *ccb_h = &ccb->ccb_h;
+	struct ccb_hdr const *ccb_h = &ccb->ccb_h;
 	rcb_t *rcb = NULL;
 	uint32_t tag;
 	int rval;
@@ -1069,7 +1063,7 @@ static void
 smartpqi_cam_action(struct cam_sim *sim, union ccb *ccb)
 {
 	struct pqisrc_softstate *softs = cam_sim_softc(sim);
-	struct ccb_hdr  *ccb_h = &ccb->ccb_h;
+	struct ccb_hdr const *ccb_h = &ccb->ccb_h;
 
 	DBG_FUNC("IN\n");
 
@@ -1209,22 +1203,19 @@ smartpqi_async(void *callback_arg, u_int32_t code,
 			}
 			uint32_t t_id = cgd->ccb_h.target_id;
 
-			/* if (t_id <= (PQI_CTLR_INDEX - 1)) { */
-			if (t_id >= PQI_CTLR_INDEX) {
-				if (softs != NULL) {
-					/* pqi_scsi_dev_t *dvp = softs->device_list[t_id][cgd->ccb_h.target_lun]; */
-					int lun = cgd->ccb_h.target_lun;
-					int index = pqisrc_find_btl_list_index(softs,softs->bus_id,t_id,lun);
-					if (index != INVALID_ELEM) {
-						pqi_scsi_dev_t *dvp = softs->dev_list[index];
-						if (dvp == NULL) {
-							DBG_ERR("Target is null, target id=%u\n", t_id);
-							break;
-						}
-						smartpqi_adjust_queue_depth(path, dvp->queue_depth);
-					}
-				}
-			}
+         if (softs != NULL) {
+            /* pqi_scsi_dev_t *dvp = softs->device_list[t_id][cgd->ccb_h.target_lun]; */
+            int lun = cgd->ccb_h.target_lun;
+            int index = pqisrc_find_btl_list_index(softs,softs->bus_id,t_id,lun);
+            if (index != INVALID_ELEM) {
+               pqi_scsi_dev_t const *dvp = softs->dev_list[index];
+               if (dvp == NULL) {
+                  DBG_ERR("Target is null, target id=%u\n", t_id);
+                  break;
+               }
+               smartpqi_adjust_queue_depth(path, dvp->queue_depth);
+            }
+         }
 			break;
 		}
 		default:
diff --git a/sys/dev/smartpqi/smartpqi_cmd.c b/sys/dev/smartpqi/smartpqi_cmd.c
index 8486ac12df79..b71879aa81f6 100644
--- a/sys/dev/smartpqi/smartpqi_cmd.c
+++ b/sys/dev/smartpqi/smartpqi_cmd.c
@@ -1,5 +1,5 @@
 /*-
- * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -35,7 +35,7 @@ pqisrc_submit_cmnd(pqisrc_softstate_t *softs, ib_queue_t *ib_q, void *req)
 {
 	char *slot = NULL;
 	uint32_t offset;
-	iu_header_t *hdr = (iu_header_t *)req;
+	iu_header_t const *hdr = (iu_header_t *)req;
 	/*TODO : Can be fixed a size copying of IU ? */
 	uint32_t iu_len = hdr->iu_length + 4 ; /* header size */
 	int i = 0;
diff --git a/sys/dev/smartpqi/smartpqi_controllers.h b/sys/dev/smartpqi/smartpqi_controllers.h
new file mode 100644
index 000000000000..6356159fd5f7
--- /dev/null
+++ b/sys/dev/smartpqi/smartpqi_controllers.h
@@ -0,0 +1,371 @@
+/*-
+ * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Supported controllers
+ */
+struct pqi_ident
+{
+	u_int16_t		vendor;
+	u_int16_t		device;
+	u_int16_t		subvendor;
+	u_int16_t		subdevice;
+	int			hwif;
+	char			*desc;
+} pqi_identifiers[] = {
+	/* (MSCC PM8205 8x12G based) */
+	{0x9005, 0x028f, 0x103c, 0x600,  PQI_HWIF_SRCV, "P408i-p SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x601,  PQI_HWIF_SRCV, "P408e-p SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x602,  PQI_HWIF_SRCV, "P408i-a SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x603,  PQI_HWIF_SRCV, "P408i-c SR Gen10"},
+	{0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
+	{0x9005, 0x028f, 0x9005, 0x608,  PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
+	{0x9005, 0x028f, 0x103c, 0x609,  PQI_HWIF_SRCV, "P408i-sb SR G10"},
+
+	/* (MSCC PM8225 8x12G based) */
+	{0x9005, 0x028f, 0x103c, 0x650,  PQI_HWIF_SRCV, "E208i-p SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x651,  PQI_HWIF_SRCV, "E208e-p SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x652,  PQI_HWIF_SRCV, "E208i-c SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x654,  PQI_HWIF_SRCV, "E208i-a SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x655,  PQI_HWIF_SRCV, "P408e-m SR Gen10"},
+	{0x9005, 0x028f, 0x9005, 0x659,  PQI_HWIF_SRCV, "2100C8iOXS"},
+
+	/* (MSCC PM8221 8x12G based) */
+	{0x9005, 0x028f, 0x103c, 0x700,  PQI_HWIF_SRCV, "P204i-c SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x701,  PQI_HWIF_SRCV, "P204i-b SR Gen10"},
+	{0x9005, 0x028f, 0x193d, 0x1104, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-2GB"},
+	{0x9005, 0x028f, 0x193d, 0x1106, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-1GB"},
+	{0x9005, 0x028f, 0x193d, 0x1108, PQI_HWIF_SRCV, "UN RAID P4408-Ma-8i-2GB"},
+	{0x9005, 0x028f, 0x193d, 0x1109, PQI_HWIF_SRCV, "UN RAID P4408-Mr-8i-2GB"},
+
+	/* (MSCC PM8204 8x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x800,  PQI_HWIF_SRCV, "SmartRAID 3154-8i"},
+	{0x9005, 0x028f, 0x9005, 0x801,  PQI_HWIF_SRCV, "SmartRAID 3152-8i"},
+	{0x9005, 0x028f, 0x9005, 0x802,  PQI_HWIF_SRCV, "SmartRAID 3151-4i"},
+	{0x9005, 0x028f, 0x9005, 0x803,  PQI_HWIF_SRCV, "SmartRAID 3101-4i"},
+	{0x9005, 0x028f, 0x9005, 0x804,  PQI_HWIF_SRCV, "SmartRAID 3154-8e"},
+	{0x9005, 0x028f, 0x9005, 0x805,  PQI_HWIF_SRCV, "SmartRAID 3102-8i"},
+	{0x9005, 0x028f, 0x9005, 0x806,  PQI_HWIF_SRCV, "SmartRAID 3100"},
+	{0x9005, 0x028f, 0x9005, 0x807,  PQI_HWIF_SRCV, "SmartRAID 3162-8i"},
+	{0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"},
+	{0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"},
+	{0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"},
+	{0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "PM8204-2GB"},
+	{0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "PM8204-4GB"},
+	{0x9005, 0x028f, 0x1ff9, 0x004b, PQI_HWIF_SRCV, "RAID PM8204-2GB"},
+	{0x9005, 0x028f, 0x1ff9, 0x004c, PQI_HWIF_SRCV, "RAID PM8204-4GB"},
+	{0x9005, 0x028f, 0x193d, 0x0462, PQI_HWIF_SRCV, "UN RAID P460-Mr1-8i-4GB"},
+	{0x9005, 0x028f, 0x193d, 0x1105, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-2GB"},
+	{0x9005, 0x028f, 0x193d, 0x1107, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-4GB"},
+	{0x9005, 0x028f, 0x193d, 0x1110, PQI_HWIF_SRCV, "UN RAID P4408-Mr-2"},
+	{0x9005, 0x028f, 0x1d8d, 0x800,	PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8204-8i"},
+	{0x9005, 0x028f, 0x9005, 0x0808, PQI_HWIF_SRCV,	"SmartRAID 3101E-4i"},
+	{0x9005, 0x028f, 0x9005, 0x0809, PQI_HWIF_SRCV, "SmartRAID 3102E-8i"},
+	{0x9005, 0x028f, 0x9005, 0x080a, PQI_HWIF_SRCV, "SmartRAID 3152-8i/N"},
+	{0x9005, 0x028f, 0x1cc4, 0x0101, PQI_HWIF_SRCV, "Ramaxel FBGF-RAD PM8204"},
+	{0x9005, 0x028f, 0x1f3a, 0x0104, PQI_HWIF_SRCV, "PL SmartROC PM8204"},
+	{0x9005, 0x028f, 0x1f51, 0x1043, PQI_HWIF_SRCV, "SmartRAID P7502-8i"},
+	{0x9005, 0x028f, 0x1f51, 0x1045, PQI_HWIF_SRCV, "SmartRAID P7504-8i"},
+	{0x9005, 0x028f, 0x1f51, 0x1011, PQI_HWIF_SRCV, "SmartRAID P7504N-8i"},
+	{0x9005, 0x028f, 0x207d, 0x4140, PQI_HWIF_SRCV, "HRDT TrustRAID D3152s-8i"},
+	{0x9005, 0x028f, 0x207d, 0x4240, PQI_HWIF_SRCV, "HRDT TrustRAID D3154s-8i"},
+
+	/* (MSCC PM8222 8x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x900,  PQI_HWIF_SRCV, "SmartHBA 2100-8i"},
+	{0x9005, 0x028f, 0x9005, 0x901,  PQI_HWIF_SRCV, "SmartHBA 2100-4i"},
+	{0x9005, 0x028f, 0x9005, 0x902,  PQI_HWIF_SRCV, "HBA 1100-8i"},
+	{0x9005, 0x028f, 0x9005, 0x903,  PQI_HWIF_SRCV, "HBA 1100-4i"},
+	{0x9005, 0x028f, 0x9005, 0x904,  PQI_HWIF_SRCV, "SmartHBA 2100-8e"},
+	{0x9005, 0x028f, 0x9005, 0x905,  PQI_HWIF_SRCV, "HBA 1100-8e"},
+	{0x9005, 0x028f, 0x9005, 0x906,  PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"},
+	{0x9005, 0x028f, 0x9005, 0x907,  PQI_HWIF_SRCV, "HBA 1100"},
+	{0x9005, 0x028f, 0x9005, 0x908,  PQI_HWIF_SRCV, "SmartHBA 2100"},
+	{0x9005, 0x028f, 0x9005, 0x90a,  PQI_HWIF_SRCV, "SmartHBA 2100A-8i"},
+	{0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"},
+	{0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"},
+	{0x9005, 0x028f, 0x193d, 0x8462, PQI_HWIF_SRCV, "UN HBA H460-Mr1-8i"},
+	{0x9005, 0x028f, 0x193d, 0xc460, PQI_HWIF_SRCV, "UN RAID P460-M2"},
+	{0x9005, 0x028f, 0x193d, 0xc461, PQI_HWIF_SRCV, "UN RAID P460-B2"},
+	{0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "PM8222-SHBA"},
+	{0x9005, 0x028f, 0x1ff9, 0x004a, PQI_HWIF_SRCV, "PM8222-SHBA"},
+	{0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"},
+	{0x9005, 0x028f, 0x1bd4, 0x004f, PQI_HWIF_SRCV, "PM8222-HBA"},
+	{0x9005, 0x028f, 0x1ff9, 0x004f, PQI_HWIF_SRCV, "PM8222-HBA"},
+	{0x9005, 0x028f, 0x1d8d, 0x908,	PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8222-8i"},
+	{0x9005, 0x028f, 0x1bd4, 0x006C, PQI_HWIF_SRCV, "RS0800M5E8i"},
+	{0x9005, 0x028f, 0x1bd4, 0x006D, PQI_HWIF_SRCV, "RS0800M5H8i"},
+	{0x9005, 0x028f, 0x1ff9, 0x006C, PQI_HWIF_SRCV, "RS0800M5E8i"},
+	{0x9005, 0x028f, 0x1ff9, 0x006D, PQI_HWIF_SRCV, "RS0800M5H8i"},
+	{0x9005, 0x028f, 0x1cc4, 0x0201, PQI_HWIF_SRCV, "Ramaxel FBGF-RAD PM8222"},
+	{0x9005, 0x028f, 0x1f51, 0x1044, PQI_HWIF_SRCV, "SmartHBA P6500-8i"},
+	{0x9005, 0x028f, 0x1f3f, 0x0610, PQI_HWIF_SRCV, "3SNIC SSSRAID 3S610"},
+	{0x9005, 0x028f, 0x207d, 0x4840, PQI_HWIF_SRCV, "HRDT TrustHBA H3100s-8i"},
+
+	/* (SRCx MSCC FVB 24x12G based) */
+	{0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"},
+
+	/* (MSCC PM8241 24x12G based) */
+
+	/* (MSCC PM8242 24x12G based) */
+	{0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"},
+	{0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"},
+	{0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"},
+	{0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"},
+	{0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"},
+	{0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"},
+	{0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "SMART-HBA 8242-24i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0045, PQI_HWIF_SRCV, "SMART-HBA 8242-24i"},
+	{0x9005, 0x028f, 0x1bd4, 0x006B, PQI_HWIF_SRCV, "RS0800M5H24i"},
+	{0x9005, 0x028f, 0x1bd4, 0x0070, PQI_HWIF_SRCV, "RS0800M5E24i"},
+	{0x9005, 0x028f, 0x1ff9, 0x006B, PQI_HWIF_SRCV, "RS0800M5H24i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0070, PQI_HWIF_SRCV, "RS0800M5E24i"},
+
+	/* (MSCC PM8236 16x12G based) */
+	{0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"},
+	{0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"},
+	{0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "RAID 8236-16i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0046, PQI_HWIF_SRCV, "RAID 8236-16i"},
+	{0x9005, 0x028f, 0x1d8d, 0x806,  PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8236-16i"},
+	{0x9005, 0x028f, 0x1cf2, 0x0B27, PQI_HWIF_SRCV, "ZTE SmartROC3100 SDPSA/B-18i 4G"},
+	{0x9005, 0x028f, 0x1cf2, 0x0B45, PQI_HWIF_SRCV, "ZTE SmartROC3100 SDPSA/B_L-18i 2G"},
+	{0x9005, 0x028f, 0x1cf2, 0x5445, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241-18i 2G"},
+	{0x9005, 0x028f, 0x1cf2, 0x5446, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242-18i 4G"},
+	{0x9005, 0x028f, 0x1cf2, 0x5449, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS241-18i 2G"},
+	{0x9005, 0x028f, 0x1cf2, 0x544A, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS242-18i 4G"},
+	{0x9005, 0x028f, 0x1cf2, 0x544D, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241B-18i 2G"},
+	{0x9005, 0x028f, 0x1cf2, 0x544E, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242B-18i 4G"},
+	{0x9005, 0x028f, 0x1bd4, 0x006F, PQI_HWIF_SRCV, "RS0804M5R16i"},
+	{0x9005, 0x028f, 0x1ff9, 0x006F, PQI_HWIF_SRCV, "RS0804M5R16i"},
+	{0x9005, 0x028f, 0x1f51, 0x1010, PQI_HWIF_SRCV, "SmartRAID P7504N-16i"},
+
+
+
+	/* (MSCC PM8237 24x12G based) */
+	{0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"},
+	{0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"},
+
+	/* (MSCC PM8238 16x12G based) */
+	{0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"},
+	{0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"},
+	{0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"},
+	{0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"},
+	{0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "SMART-HBA 8238-16i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0048, PQI_HWIF_SRCV, "SMART-HBA 8238-16i"},
+	{0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"},
+	{0x9005, 0x028f, 0x1d8d, 0x916,  PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8238-16i"},
+	{0x9005, 0x028f, 0x1458, 0x1000, PQI_HWIF_SRCV, "GIGABYTE SmartHBA CLN1832"},
+	{0x9005, 0x028f, 0x1cf2, 0x0B29, PQI_HWIF_SRCV, "ZTE SmartIOC2100 SDPSA/B_I-18i"},
+	{0x9005, 0x028f, 0x1cf2, 0x5447, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243-18i"},
+	{0x9005, 0x028f, 0x1cf2, 0x544B, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RS243-18i"},
+	{0x9005, 0x028f, 0x1cf2, 0x544F, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243B-18i"},
+	{0x9005, 0x028f, 0x1bd4, 0x0071, PQI_HWIF_SRCV, "RS0800M5H16i"},
+	{0x9005, 0x028f, 0x1bd4, 0x0072, PQI_HWIF_SRCV, "RS0800M5E16i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0071, PQI_HWIF_SRCV, "RS0800M5H16i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0072, PQI_HWIF_SRCV, "RS0800M5E16i"},
+	{0x9005, 0x028f, 0x1018, 0x8238, PQI_HWIF_SRCV, "Ramaxel SmartHBA RX8238-16i"},
+
+	/* (MSCC PM8240 24x12G based) */
+	{0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"},
+	{0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"},
+	{0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"},
+	{0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"},
+	{0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "RAID 8240-24i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0047, PQI_HWIF_SRCV, "RAID 8240-24i"},
+	{0x9005, 0x028f, 0x1dfc, 0x3161, PQI_HWIF_SRCV, "NTCOM SAS3 RAID-24i"},
+	{0x9005, 0x028f, 0x1F0C, 0x3161, PQI_HWIF_SRCV, "NT RAID 3100-24i"},
+
+	/* Huawei ID's */
+	{0x9005, 0x028f, 0x19e5, 0xd227, PQI_HWIF_SRCV, "SR465C-M 4G"},
+	{0x9005, 0x028f, 0x19e5, 0xd22a, PQI_HWIF_SRCV, "SR765-M"},
+	{0x9005, 0x028f, 0x19e5, 0xd228, PQI_HWIF_SRCV, "SR455C-M 2G"},
+	{0x9005, 0x028f, 0x19e5, 0xd22c, PQI_HWIF_SRCV, "SR455C-M 4G"},
+	{0x9005, 0x028f, 0x19e5, 0xd229, PQI_HWIF_SRCV, "SR155-M"},
+	{0x9005, 0x028f, 0x19e5, 0xd22b, PQI_HWIF_SRCV, "SR455C-ME 4G"},
+
+	/* (MSCC PM8252 8x12G based) */
+	{0x9005, 0x028f, 0x193d, 0x110b, PQI_HWIF_SRCV, "UN HBA H4508-Mf-8i"},
+	{0x9005, 0x028f, 0x1bd4, 0x0052, PQI_HWIF_SRCV, "MT0801M6E"},
+	{0x9005, 0x028f, 0x1bd4, 0x0054, PQI_HWIF_SRCV, "MT0800M6H"},
+	{0x9005, 0x028f, 0x1bd4, 0x0086, PQI_HWIF_SRCV, "RT0800M7E"},
+	{0x9005, 0x028f, 0x1bd4, 0x0087, PQI_HWIF_SRCV, "RT0800M7H"},
+	{0x9005, 0x028f, 0x1ff9, 0x0052, PQI_HWIF_SRCV, "MT0801M6E"},
+	{0x9005, 0x028f, 0x1ff9, 0x0054, PQI_HWIF_SRCV, "MT0800M6H"},
+	{0x9005, 0x028f, 0x1BD4, 0x00a3, PQI_HWIF_SRCV, "RT0800M6E2i"},
+	{0x9005, 0x028f, 0x1ff9, 0x00a3, PQI_HWIF_SRCV, "RT0800M6E2i"},
+	{0x9005, 0x028f, 0x1ff9, 0x0086, PQI_HWIF_SRCV, "RT0800M7E"},
+	{0x9005, 0x028f, 0x1ff9, 0x0087, PQI_HWIF_SRCV, "RT0800M7H"},
+	{0x9005, 0x028f, 0x1f51, 0x1001, PQI_HWIF_SRCV, "SmartHBA P6600-8i"},
+	{0x9005, 0x028f, 0x1f51, 0x1003, PQI_HWIF_SRCV, "SmartHBA P6600-8e"},
+	{0x9005, 0x028f, 0x9005, 0x1460, PQI_HWIF_SRCV, "HBA 1200"},
+	{0x9005, 0x028f, 0x9005, 0x1461, PQI_HWIF_SRCV, "SmartHBA 2200"},
+	{0x9005, 0x028f, 0x9005, 0x1462, PQI_HWIF_SRCV, "HBA 1200-8i"},
+	{0x9005, 0x028f, 0x1d49, 0x0222, PQI_HWIF_SRCV, "4450-8i HBA"},
+	{0x9005, 0x028f, 0x207d, 0x4044, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-8i"},
+	{0x9005, 0x028f, 0x207d, 0x4054, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-8e"},
+
+	/* (MSCC PM8254 32x12G based) */
+	{0x9005, 0x028f, 0x1bd4, 0x0051, PQI_HWIF_SRCV, "MT0804M6R"},
+	{0x9005, 0x028f, 0x1bd4, 0x0053, PQI_HWIF_SRCV, "MT0808M6R"},
+	{0x9005, 0x028f, 0x1bd4, 0x0088, PQI_HWIF_SRCV, "RT0804M7R"},
+	{0x9005, 0x028f, 0x1bd4, 0x0089, PQI_HWIF_SRCV, "RT0808M7R"},
+	{0x9005, 0x028f, 0x1ff9, 0x0051, PQI_HWIF_SRCV, "MT0804M6R"},
+	{0x9005, 0x028f, 0x1ff9, 0x0053, PQI_HWIF_SRCV, "MT0808M6R"},
+	{0x9005, 0x028f, 0x1ff9, 0x0088, PQI_HWIF_SRCV, "RT0804M7R"},
+	{0x9005, 0x028f, 0x1ff9, 0x0089, PQI_HWIF_SRCV, "RT0808M7R"},
+	{0x9005, 0x028f, 0x1f51, 0x1002, PQI_HWIF_SRCV, "SmartRAID P7604-8i"},
+	{0x9005, 0x028f, 0x1f51, 0x1004, PQI_HWIF_SRCV, "SmartRAID P7604-8e"},
+	{0x9005, 0x028f, 0x1f51, 0x100f, PQI_HWIF_SRCV, "SmartRAID P7604N-8i"},
+	{0x9005, 0x028f, 0x9005, 0x14a0, PQI_HWIF_SRCV, "SmartRAID 3254-8i"},
+	{0x9005, 0x028f, 0x9005, 0x14a1, PQI_HWIF_SRCV, "SmartRAID 3204-8i"},
+	{0x9005, 0x028f, 0x9005, 0x14a2, PQI_HWIF_SRCV, "SmartRAID 3252-8i"},
+	{0x9005, 0x028f, 0x9005, 0x14a4, PQI_HWIF_SRCV, "SmartRAID 3254-8i /e"},
+	{0x9005, 0x028f, 0x9005, 0x14a5, PQI_HWIF_SRCV, "SmartRAID 3252-8i /e"},
+	{0x9005, 0x028f, 0x9005, 0x14a6, PQI_HWIF_SRCV, "SmartRAID 3204-8i /e"},
+	{0x9005, 0x028f, 0x1d49, 0x0624, PQI_HWIF_SRCV, "9450-8i 4GB Flash"},
+
+	/* (MSCC PM8262 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x14c0, PQI_HWIF_SRCV, "SmartHBA 2200-16i"},
+	{0x9005, 0x028f, 0x9005, 0x14c1, PQI_HWIF_SRCV, "HBA 1200-16i"},
+	{0x9005, 0x028f, 0x9005, 0x14c3, PQI_HWIF_SRCV, "HBA 1200-16e"},
+	{0x9005, 0x028f, 0x9005, 0x14c4, PQI_HWIF_SRCV, "HBA 1200-8e"},
+	{0x9005, 0x028f, 0x1f51, 0x1005, PQI_HWIF_SRCV, "SmartHBA P6600-16i"},
+	{0x9005, 0x028f, 0x1f51, 0x1007, PQI_HWIF_SRCV, "SmartHBA P6600-8i8e"},
+	{0x9005, 0x028f, 0x1f51, 0x1009, PQI_HWIF_SRCV, "SmartHBA P6600-16e"},
+	{0x9005, 0x028f, 0x1cf2, 0x54dc, PQI_HWIF_SRCV, "ZTE SmartIOC2200 RM346-16i"},
+	{0x9005, 0x028f, 0x1cf2, 0x0806, PQI_HWIF_SRCV, "ZTE SmartIOC2200 RS346-16i"},
+	{0x9005, 0x028f, 0x1d49, 0x0223, PQI_HWIF_SRCV, "4450-16i HBA"},
+	{0x9005, 0x028f, 0x1d49, 0x0224, PQI_HWIF_SRCV, "4450-8e HBA"},
+	{0x9005, 0x028f, 0x1d49, 0x0225, PQI_HWIF_SRCV, "4450-16e HBA"},
+	{0x9005, 0x028f, 0x1d49, 0x0521, PQI_HWIF_SRCV, "5450-16i"},
+	{0x9005, 0x028f, 0x207d, 0x4084, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-16i"},
+	{0x9005, 0x028f, 0x207d, 0x4094, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-16e"},
+
+	/* (MSCC PM8264 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x14b0, PQI_HWIF_SRCV, "SmartRAID 3254-16i"},
+	{0x9005, 0x028f, 0x9005, 0x14b1, PQI_HWIF_SRCV, "SmartRAID 3258-16i"},
+	{0x9005, 0x028f, 0x1f51, 0x1006, PQI_HWIF_SRCV, "SmartRAID P7608-16i"},
+	{0x9005, 0x028f, 0x1f51, 0x1008, PQI_HWIF_SRCV, "SmartRAID P7608-8i8e"},
+	{0x9005, 0x028f, 0x1f51, 0x100a, PQI_HWIF_SRCV, "SmartRAID P7608-16e"},
+	{0x9005, 0x028f, 0x1cf2, 0x54da, PQI_HWIF_SRCV, "ZTE SmartROC3200 RM344-16i 4G"},
+	{0x9005, 0x028f, 0x1cf2, 0x54db, PQI_HWIF_SRCV, "ZTE SmartROC3200 RM345-16i 8G"},
+	{0x9005, 0x028f, 0x1cf2, 0x0804, PQI_HWIF_SRCV, "ZTE SmartROC3200 RS344-16i 4G"},
+	{0x9005, 0x028f, 0x1cf2, 0x0805, PQI_HWIF_SRCV, "ZTE SmartROC3200 RS345-16i 8G"},
+	{0x9005, 0x028f, 0x1f51, 0x100e, PQI_HWIF_SRCV, "SmartRAID P7604N-16i"},
+	{0x9005, 0x028f, 0x1d49, 0x0625, PQI_HWIF_SRCV, "9450-16i 4GB Flash"},
+	{0x9005, 0x028f, 0x1d49, 0x0626, PQI_HWIF_SRCV, "9450-16i 8GB Flash"},
+
+	/* (MSCC PM8265 16x12G based) */
+	{0x9005, 0x028f, 0x1590, 0x02dc, PQI_HWIF_SRCV, "SR416i-a Gen10+"},
+	{0x9005, 0x028f, 0x9005, 0x1470, PQI_HWIF_SRCV, "SmartRAID 3200"},
+	{0x9005, 0x028f, 0x9005, 0x1471, PQI_HWIF_SRCV, "SmartRAID 3254-16i /e"},
+	{0x9005, 0x028f, 0x9005, 0x1472, PQI_HWIF_SRCV, "SmartRAID 3258-16i /e"},
+	{0x9005, 0x028f, 0x9005, 0x1473, PQI_HWIF_SRCV, "SmartRAID 3284-16io /e/uC"},
+	{0x9005, 0x028f, 0x9005, 0x1474, PQI_HWIF_SRCV, "SmartRAID 3254-16io /e"},
+	{0x9005, 0x028f, 0x9005, 0x1475, PQI_HWIF_SRCV, "SmartRAID 3254-16e /e"},
+
+	/* (MSCC PM8266 16x12G based) */
+	{0x9005, 0x028f, 0x1014, 0x0718, PQI_HWIF_SRCV, "IBM 4-Port 24G SAS"},
+	{0x9005, 0x028f, 0x9005, 0x1490, PQI_HWIF_SRCV, "HBA 1200p Ultra"},
+	{0x9005, 0x028f, 0x9005, 0x1491, PQI_HWIF_SRCV, "SmartHBA 2200p Ultra"},
+	{0x9005, 0x028f, 0x9005, 0x1402, PQI_HWIF_SRCV, "HBA Ultra 1200P-16i"},
+	{0x9005, 0x028f, 0x9005, 0x1441, PQI_HWIF_SRCV, "HBA Ultra 1200P-32i"},
+	{0x9005, 0x028f, 0x1137, 0x0300, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 HBA LFF 32D UCSC-HBAMP1LL32"},
+
+	/* (MSCC PM8268 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x14d0, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-16i"},
+
+	/* (MSCC PM8269 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x1400, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-16i /e"},
+	{0x9005, 0x028f, 0x1ff9, 0x00a1, PQI_HWIF_SRCV, "RT1608M6R16i"},
+
+	/* (MSCC PM8270 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x1410, PQI_HWIF_SRCV, "HBA Ultra 1200P-16e"},
+	{0x9005, 0x028f, 0x9005, 0x1411, PQI_HWIF_SRCV, "HBA 1200 Ultra"},
+	{0x9005, 0x028f, 0x9005, 0x1412, PQI_HWIF_SRCV, "SmartHBA 2200 Ultra"},
+	{0x9005, 0x028f, 0x9005, 0x1463, PQI_HWIF_SRCV, "SmartHBA 2200-8io /e"},
+	{0x9005, 0x028f, 0x9005, 0x14c2, PQI_HWIF_SRCV, "SmartHBA 2200-16io /e"},
+	{0x9005, 0x028f, 0x1337, 0x02fa, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 HBA 16D UCSC-HBA-M1L16"},
+
+	/* (MSCC PM8271 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x14e0, PQI_HWIF_SRCV, "SmartIOC PM8271"},
+
+	/* (MSCC PM8272 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x1420, PQI_HWIF_SRCV, "SmartRAID Ultra 3254-16e"},
+	{0x9005, 0x028f, 0x1d49, 0x0628, PQI_HWIF_SRCV, "9450-16e 4GB Flash"},
+
+	/* (MSCC PM8273 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x1430, PQI_HWIF_SRCV, "SmartRAID Ultra 3254-16e /e"},
+	{0x9005, 0x028f, 0x1137, 0x02f9, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID 4GB FBWC 16D UCSC-RAID-M1L16"},
+	{0x9005, 0x028f, 0x1137, 0x02ff, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID 4GB FBWC 6D UCSX-RAID-M1L6"},
+
+	/* (MSCC PM8274 16x12G based) */
+	{0x9005, 0x028f, 0x1e93, 0x1000, PQI_HWIF_SRCV, "ByteHBA JGH43024-8"},
+	{0x9005, 0x028f, 0x1e93, 0x1001, PQI_HWIF_SRCV, "ByteHBA JGH43034-8"},
+	{0x9005, 0x028f, 0x1e93, 0x1005, PQI_HWIF_SRCV, "ByteHBA JGH43014-8"},
+	{0x9005, 0x028f, 0x1f51, 0x100B, PQI_HWIF_SRCV, "SmartHBA P6600-24i"},
+
+	/* (MSCC PM8275 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x14f0, PQI_HWIF_SRCV, "SmartIOC PM8275"},
+
+	/* (MSCC PM8276 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x1480, PQI_HWIF_SRCV, "SmartRAID 3200 Ultra"},
+	{0x9005, 0x028f, 0x1e93, 0x1002, PQI_HWIF_SRCV, "ByteHBA JGH44014-8"},
+
+	/* (MSCC PM8277 16x12G based) */
+	{0x9005, 0x028f, 0x1137, 0x02f8, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID 4GB FBWC 32D UCSC-RAID-MP1L32"},
+
+	/* (MSCC PM8278 16x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x1440, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-32i"},
+	{0x9005, 0x028f, 0x1d49, 0x0627, PQI_HWIF_SRCV, "9450-32i 8GB Flash"},
+
+	/* (MSCC PM8279 32x12G based) */
+	{0x9005, 0x028f, 0x9005, 0x1450, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-32i /e"},
+	{0x9005, 0x028f, 0x1590, 0x0294, PQI_HWIF_SRCV, "SR932i-p Gen10+"},
+	{0x9005, 0x028f, 0x1590, 0x0381, PQI_HWIF_SRCV, "SR932i-p Gen11"},
+	{0x9005, 0x028f, 0x1590, 0x0382, PQI_HWIF_SRCV, "SR308i-p Gen11"},
+	{0x9005, 0x028f, 0x1590, 0x0383, PQI_HWIF_SRCV, "SR308i-o Gen11"},
+	{0x9005, 0x028f, 0x1590, 0x02db, PQI_HWIF_SRCV, "SR416ie-m Gen11"},
+	{0x9005, 0x028f, 0x1590, 0x032e, PQI_HWIF_SRCV, "SR416i-o Gen11"},
+	{0x9005, 0x028f, 0x9005, 0x1452, PQI_HWIF_SRCV, "SmartRAID 3200p Ultra"},
+	{0x9005, 0x028f, 0x1137, 0x02fe, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID LFF 32D UCSC-RAIDMP1LL32"},
+
+	/* (MSCC HBA/SMARTHBA/CFF SmartRAID - Lenovo 8X12G 16X12G based)  */
+	{0x9005, 0x028f, 0x1d49, 0x0220, PQI_HWIF_SRCV, "4350-8i SAS/SATA HBA"},
+	{0x9005, 0x028f, 0x1d49, 0x0221, PQI_HWIF_SRCV, "4350-16i SAS/SATA HBA"},
+	{0x9005, 0x028f, 0x1d49, 0x0520, PQI_HWIF_SRCV, "5350-8i"},
+	{0x9005, 0x028f, 0x1d49, 0x0522, PQI_HWIF_SRCV, "5350-8i INTR"},
+	{0x9005, 0x028f, 0x1d49, 0x0620, PQI_HWIF_SRCV, "9350-8i 2GB Flash"},
+	{0x9005, 0x028f, 0x1d49, 0x0621, PQI_HWIF_SRCV, "9350-8i 2GB Flash INTR"},
+	{0x9005, 0x028f, 0x1d49, 0x0622, PQI_HWIF_SRCV, "9350-16i 4GB Flash"},
+	{0x9005, 0x028f, 0x1d49, 0x0623, PQI_HWIF_SRCV, "9350-16i 4GB Flash INTR"},
+
+	{0, 0, 0, 0, 0, 0}
+};
+
+struct pqi_ident
+pqi_family_identifiers[] = {
+	{0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"},
+	{0, 0, 0, 0, 0, 0}
+};
diff --git a/sys/dev/smartpqi/smartpqi_defines.h b/sys/dev/smartpqi/smartpqi_defines.h
index bb0bb2b709aa..fe2edf7a74a9 100644
--- a/sys/dev/smartpqi/smartpqi_defines.h
+++ b/sys/dev/smartpqi/smartpqi_defines.h
@@ -1,5 +1,5 @@
 /*-
- * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -927,7 +927,7 @@ typedef struct pqi_pci_info
 typedef struct _driver_info
 {
 	unsigned char 	major_version;
-	unsigned long 	minor_version;
+	unsigned char 	minor_version;
 	unsigned char 	release_version;
 	unsigned long 	build_revision;
 	unsigned long 	max_targets;
@@ -938,9 +938,13 @@ typedef struct _driver_info
 typedef uint8_t *passthru_buf_type_t;
 
 #define PQISRC_DRIVER_MAJOR		__FreeBSD__
-#define PQISRC_DRIVER_MINOR	   4410
+#if __FreeBSD__ <= 14
+#define PQISRC_DRIVER_MINOR	   4660
+#else
+#define PQISRC_DRIVER_MINOR	   0
+#endif
 #define PQISRC_DRIVER_RELEASE	   0
-#define PQISRC_DRIVER_REVISION   2005
+#define PQISRC_DRIVER_REVISION   2002
 
 #define STR(s)                          # s
 #define PQISRC_VERSION(a, b, c, d)      STR(a.b.c-d)
@@ -1234,19 +1238,21 @@ typedef struct sema OS_SEMA_LOCK_T;
 
 /* Debug facility */
 
-#define	PQISRC_FLAGS_MASK		0x0000ffff
-#define	PQISRC_FLAGS_INIT 		0x00000001
-#define	PQISRC_FLAGS_INFO 		0x00000002
-#define	PQISRC_FLAGS_FUNC		0x00000004
-#define	PQISRC_FLAGS_TRACEIO		0x00000008
-#define	PQISRC_FLAGS_DISC		0x00000010
-#define	PQISRC_FLAGS_WARN		0x00000020
-#define	PQISRC_FLAGS_ERROR		0x00000040
-#define	PQISRC_FLAGS_NOTE		0x00000080
+#define	PQISRC_FLAGS_MASK    0x0000000000ff
+#define	PQISRC_FLAGS_INIT    0x0001
+#define	PQISRC_FLAGS_INFO    0x0002
+#define	PQISRC_FLAGS_FUNC    0x0004
+#define	PQISRC_FLAGS_TRACEIO 0x0008
+#define	PQISRC_FLAGS_DISC    0x0010
+#define	PQISRC_FLAGS_WARN    0x0020
+#define	PQISRC_FLAGS_ERROR   0x0040
+#define	PQISRC_FLAGS_NOTE    0x0080
 
-#define PQISRC_LOG_LEVEL  (PQISRC_FLAGS_WARN | PQISRC_FLAGS_ERROR | PQISRC_FLAGS_NOTE)
+#define PQISRC_LOG_LEVEL  (PQISRC_FLAGS_WARN | PQISRC_FLAGS_ERROR)
 
-static int logging_level  = PQISRC_LOG_LEVEL;
+extern unsigned long logging_level;
+
+#define  DBG_SET_LOGGING_LEVEL(value) logging_level = value & PQISRC_FLAGS_MASK
 
 #define	DBG_INIT(fmt,args...)						\
 		do {							\
@@ -1276,13 +1282,6 @@ static int logging_level  = PQISRC_LOG_LEVEL;
 			}						\
 		}while(0);
 
-#define	DBG_TRACEIO(fmt,args...)					\
-		do {							\
-			if (logging_level & PQISRC_FLAGS_TRACEIO) { 	\
-				printf("[TRACEIO]:[ %s ] [ %d ]"fmt,__func__,__LINE__,##args);			\
-			}						\
-		}while(0);
-
 #define	DBG_WARN(fmt,args...)						\
 		do {							\
 			if (logging_level & PQISRC_FLAGS_WARN) { 	\
diff --git a/sys/dev/smartpqi/smartpqi_discovery.c b/sys/dev/smartpqi/smartpqi_discovery.c
index ac37c2233762..a7de5a149810 100644
--- a/sys/dev/smartpqi/smartpqi_discovery.c
+++ b/sys/dev/smartpqi/smartpqi_discovery.c
@@ -1,5 +1,5 @@
 /*-
- * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -189,7 +189,7 @@ pqisrc_set_btl(pqi_scsi_dev_t *device, int bus, int target, int lun)
 *  devices and multi-lun devices */
 boolean_t
 pqisrc_add_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device,
-						uint8_t *scsi3addr)
+						uint8_t const *scsi3addr)
 {
 	/* Add physical devices with targets that need
 	*  targets */
@@ -269,7 +269,7 @@ pqisrc_add_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device,
 		}
 	}
 	DBG_ERR("The device is not a physical, lun or ptraid device"
-		"B %d: T %d: L %d\n", device->bus, device->target,
+		"B%d:T%d:L%d\n", device->bus, device->target,
 		device->lun );
 	return false;
 
@@ -283,7 +283,7 @@ add_device_to_dev_list:
 		softs->dev_list[j] = device;
 		break;
 	}
-	DBG_NOTE("Added device [%d of %d]: B %d: T %d: L %d\n",
+	DBG_NOTE("Added device [%d of %d]: B%d:T%d:L%d\n",
 		j, softs->num_devs, device->bus, device->target,
 		device->lun);
 	return true;
@@ -307,7 +307,6 @@ pqisrc_find_btl_list_index(pqisrc_softstate_t *softs,
 		if(bus == softs->bus_id &&
 			target == temp_device->target &&
 			lun == temp_device->lun){
-			DBG_DISC("Returning device list index %d\n", index);
 			return index;
 
 		}
@@ -322,7 +321,7 @@ pqisrc_find_btl_list_index(pqisrc_softstate_t *softs,
 /* Return a given index for a specific device within the
 *  softs dev_list */
 int
-pqisrc_find_device_list_index(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
+pqisrc_find_device_list_index(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *device)
 {
 
 	int index;
@@ -346,7 +345,7 @@ pqisrc_find_device_list_index(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
 
 /* Delete a given device from the softs dev_list*/
 int
-pqisrc_delete_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
+pqisrc_delete_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *device)
 {
 
 	int index;
@@ -354,8 +353,8 @@ pqisrc_delete_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
 	if (0 <= index && index < MAX_TARGET_BIT) {
 		softs->dev_list[index] = NULL;
 		softs->num_devs--;
-		DBG_NOTE("Removing device : B %d: T %d: L %d positioned at %d\n",
-				device->bus, device->target, device->lun, softs->num_devs);
+		DBG_NOTE("Removing device: B%d:T%d:L%d positioned at %d\n",
+				device->bus, device->target, device->lun, index);
 		return PQI_STATUS_SUCCESS;
 	}
 	if (index == INVALID_ELEM) {
@@ -414,7 +413,7 @@ pqisrc_build_send_raid_request(pqisrc_softstate_t *softs, struct dma_mem device_
 	int ret = PQI_STATUS_SUCCESS;
 
 	ib_queue_t *ib_q = &softs->op_raid_ib_q[PQI_DEFAULT_IB_QUEUE];
-	ob_queue_t *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE];
+	ob_queue_t const *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE];
 
 	rcb_t *rcb = NULL;
 
@@ -740,13 +739,13 @@ pqisrc_get_phys_log_device_list(pqisrc_softstate_t *softs,
 
 	ret = pqisrc_get_physical_logical_luns(softs, SA_REPORT_PHYS, physical_dev_list, phys_data_length);
 	if (ret) {
-		DBG_ERR("report physical LUNs failed");
+		DBG_ERR("report physical LUNs failed\n");
 		return ret;
 	}
 
 	ret = pqisrc_get_physical_logical_luns(softs, SA_REPORT_LOG, logical_dev_list, log_data_length);
 	if (ret) {
-		DBG_ERR("report logical LUNs failed");
+		DBG_ERR("report logical LUNs failed\n");
 		return ret;
 	}
 
@@ -763,7 +762,7 @@ pqisrc_get_phys_log_device_list(pqisrc_softstate_t *softs,
 
 	ret = pqisrc_get_queue_lun_list(softs, PQI_LOG_EXT_QUEUE_ENABLE, queue_dev_list, queue_data_length);
 	if (ret) {
-		DBG_ERR("report logical LUNs failed");
+		DBG_ERR("report logical LUNs failed\n");
 		return ret;
 	}
 
@@ -808,13 +807,13 @@ pqisrc_get_phys_log_device_list(pqisrc_softstate_t *softs,
 }
 
 inline boolean_t
-pqisrc_is_external_raid_device(pqi_scsi_dev_t *device)
+pqisrc_is_external_raid_device(pqi_scsi_dev_t const *device)
 {
 	return device->is_external_raid_device;
 }
 
 static inline boolean_t
-pqisrc_is_external_raid_addr(uint8_t *scsi3addr)
+pqisrc_is_external_raid_addr(uint8_t const *scsi3addr)
 {
 	return scsi3addr[2] != 0;
 }
@@ -940,12 +939,12 @@ out:
 /* Validate the RAID map parameters */
 static int
 pqisrc_raid_map_validation(pqisrc_softstate_t *softs,
-	pqi_scsi_dev_t *device, pqisrc_raid_map_t *raid_map)
+	pqi_scsi_dev_t const *device, pqisrc_raid_map_t *raid_map)
 {
 	char *error_msg;
 	uint32_t raidmap_size;
 	uint32_t r5or6_blocks_per_row;
-/*	unsigned phys_dev_num; */
+	/* unsigned phys_dev_num; */
 
 	DBG_FUNC("IN\n");
 
@@ -1033,7 +1032,7 @@ pqisrc_get_device_raidmap(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
 		if (raidmap_reported_size <= raidmap_alloc_size)
 			break;
 
-		DBG_NOTE("Raid map is larger than 1024 entries, request once again");
+		DBG_NOTE("Raid map is larger than 1024 entries, request once again\n");
 		os_mem_free(softs, (char*)raid_map, raidmap_alloc_size);
 
 		raidmap_alloc_size = raidmap_reported_size;
@@ -1331,7 +1330,7 @@ pqisrc_get_physical_device_info(pqisrc_softstate_t *softs,
 /* Function used to find the entry of the device in a list */
 static device_status_t
 pqisrc_scsi_find_entry(pqisrc_softstate_t *softs,
-	pqi_scsi_dev_t *device_to_find,	pqi_scsi_dev_t **same_device)
+	pqi_scsi_dev_t const *device_to_find,	pqi_scsi_dev_t **same_device)
 {
 	pqi_scsi_dev_t *device;
 	int i;
@@ -1361,7 +1360,7 @@ pqisrc_scsi_find_entry(pqisrc_softstate_t *softs,
 
 /* Update the newly added devices as existed device */
 static void
-pqisrc_exist_device_update(pqisrc_softstate_t *softs,
+pqisrc_exist_device_update(pqisrc_softstate_t const *softs,
 	pqi_scsi_dev_t *device_exist, pqi_scsi_dev_t *new_device)
 {
 	DBG_FUNC("IN\n");
@@ -1395,15 +1394,13 @@ pqisrc_exist_device_update(pqisrc_softstate_t *softs,
 	device_exist->offload_config = new_device->offload_config;
 	device_exist->offload_enabled_pending =
 		new_device->offload_enabled_pending;
-	if (device_exist->offload_to_mirror)
-		os_mem_free(softs,
-			(int *) device_exist->offload_to_mirror,
-			sizeof(*(device_exist->offload_to_mirror)));
+	if (device_exist->offload_to_mirror) {
+		device_exist->temp_offload_to_mirror = device_exist->offload_to_mirror;
+	}
 	device_exist->offload_to_mirror = new_device->offload_to_mirror;
-	if (device_exist->raid_map)
-		os_mem_free(softs,
-			(char *)device_exist->raid_map,
-			sizeof(*device_exist->raid_map));
+	if (device_exist->raid_map) {
+		device_exist->temp_raid_map = device_exist->raid_map;
+	}
 	device_exist->raid_map = new_device->raid_map;
 	/* To prevent these from being freed later. */
 	new_device->raid_map = NULL;
@@ -1416,7 +1413,7 @@ static int
 pqisrc_add_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
 {
 	DBG_FUNC("IN\n");
-	DBG_NOTE("vendor: %s model: %s bus:%d target:%d lun:%d is_physical_device:0x%x expose_device:0x%x volume_offline 0x%x volume_status 0x%x \n",
+	DBG_NOTE("vendor: %s model: %s B%d:T%d:L%d is_physical_device:0x%x expose_device:0x%x volume_offline 0x%x volume_status 0x%x \n",
 		device->vendor, device->model, device->bus, device->target, device->lun, device->is_physical_device, device->expose_device, device->volume_offline, device->volume_status);
 
 	device->invalid = false;
@@ -1439,7 +1436,7 @@ void
 pqisrc_remove_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
 {
 	DBG_FUNC("IN\n");
-	DBG_NOTE("vendor: %s model: %s bus:%d target:%d lun:%d is_physical_device:0x%x expose_device:0x%x volume_offline 0x%x volume_status 0x%x \n",
*** 1701 LINES SKIPPED ***