git: e506af08bb52 - main - aw_gpio: Add support for H616
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Date: Mon, 09 Feb 2026 10:23:39 UTC
The branch main has been updated by thj:
URL: https://cgit.FreeBSD.org/src/commit/?id=e506af08bb52bcf02553a35a385b7ef0b8692589
commit e506af08bb52bcf02553a35a385b7ef0b8692589
Author: Tom Jones <thj@FreeBSD.org>
AuthorDate: 2026-02-09 10:06:33 +0000
Commit: Tom Jones <thj@FreeBSD.org>
CommitDate: 2026-02-09 10:22:20 +0000
aw_gpio: Add support for H616
This adds padconf files for the two gpio ranges on the H616 SOC and adds
the SOC include.
Reviewed by: manu
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D54915
---
sys/arm/allwinner/aw_gpio.c | 24 ++++++++
sys/arm/allwinner/h616/h616_padconf.c | 104 ++++++++++++++++++++++++++++++++
sys/arm/allwinner/h616/h616_r_padconf.c | 30 +++++++++
sys/arm64/conf/NOTES | 1 +
sys/arm64/conf/std.allwinner | 1 +
sys/conf/files.arm64 | 2 +
sys/conf/options.arm64 | 1 +
7 files changed, 163 insertions(+)
diff --git a/sys/arm/allwinner/aw_gpio.c b/sys/arm/allwinner/aw_gpio.c
index c90d61f7b45e..4f5d676c1f56 100644
--- a/sys/arm/allwinner/aw_gpio.c
+++ b/sys/arm/allwinner/aw_gpio.c
@@ -272,6 +272,26 @@ struct aw_gpio_conf h6_r_gpio_conf = {
};
#endif
+/* Defined in h616_padconf.c */
+#ifdef SOC_ALLWINNER_H616
+extern struct allwinner_padconf h616_padconf;
+extern struct allwinner_padconf h616_r_padconf;
+struct aw_gpio_conf h616_gpio_conf = {
+ .padconf = &h616_padconf,
+ .banks = "cfghi",
+ .bank_size = 0x24,
+ .drv_pin_shift = 1,
+ .pul_offset = 0x1C,
+};
+struct aw_gpio_conf h616_r_gpio_conf = {
+ .padconf = &h616_r_padconf,
+ .banks = "l",
+ .bank_size = 0x24,
+ .drv_pin_shift = 1,
+ .pul_offset = 0x1C,
+};
+#endif
+
static struct ofw_compat_data compat_data[] = {
#ifdef SOC_ALLWINNER_A10
{"allwinner,sun4i-a10-pinctrl", (uintptr_t)&a10_gpio_conf},
@@ -313,6 +333,10 @@ static struct ofw_compat_data compat_data[] = {
#ifdef SOC_ALLWINNER_H6
{"allwinner,sun50i-h6-pinctrl", (uintptr_t)&h6_gpio_conf},
{"allwinner,sun50i-h6-r-pinctrl", (uintptr_t)&h6_r_gpio_conf},
+#endif
+#ifdef SOC_ALLWINNER_H616
+ {"allwinner,sun50i-h616-pinctrl", (uintptr_t)&h616_gpio_conf},
+ {"allwinner,sun50i-h6-r-pinctrl", (uintptr_t)&h616_r_gpio_conf},
#endif
{NULL, 0}
};
diff --git a/sys/arm/allwinner/h616/h616_padconf.c b/sys/arm/allwinner/h616/h616_padconf.c
new file mode 100644
index 000000000000..03a616875e59
--- /dev/null
+++ b/sys/arm/allwinner/h616/h616_padconf.c
@@ -0,0 +1,104 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Emmanuel Vadot <manu@freebsd.org>
+ *
+ * Copyright (c) 2026 The FreeBSD Foundation.
+ *
+ * Portions of this file were written by Tom Jones <thj@freebsd.org> under
+ * sponsorship from The FreeBSD Foundation.
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/types.h>
+
+#include <arm/allwinner/allwinner_pinctrl.h>
+
+#include "opt_soc.h"
+
+static const struct allwinner_pins h616_pins[] = {
+ { "PC0", 2, 0, { "gpio-in", "gpio_out", "nand", "mmc2", "spi0", NULL, "pc_eint0" }, 6, 0, 2 },
+ { "PC1", 2, 1, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, NULL, "pc_eint1" }, 6, 1, 2 },
+ { "PC2", 2, 2, { "gpio-in", "gpio_out", "nand", NULL, "spi0", NULL, "pc_eint2" }, 6, 2, 2 },
+ { "PC3", 2, 3, { "gpio-in", "gpio_out", "nand", NULL, "spi0", "boot", "pc_eint3" }, 6, 3, 2 },
+ { "PC4", 2, 4, { "gpio-in", "gpio_out", "nand", NULL, "spi0", "boot", "pc_eint4" }, 6, 4, 2 },
+ { "PC5", 2, 5, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, "boot", "pc_eint5" }, 6, 5, 2 },
+ { "PC6", 2, 6, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, "boot", "pc_eint6" }, 6, 6, 2 },
+ { "PC7", 2, 7, { "gpio-in", "gpio_out", "nand", NULL, "spi0", NULL, "pc_eint7" }, 6, 7, 2 },
+ { "PC8", 2, 8, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, NULL, "pc_eint8" }, 6, 8, 2 },
+ { "PC9", 2, 9, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, NULL, "pc_eint9" }, 6, 9, 2 },
+ { "PC10", 2, 10, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, NULL, "pc_eint10" }, 6, 10, 2 },
+ { "PC11", 2, 11, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, NULL, "pc_eint11" }, 6, 11, 2 },
+ { "PC12", 2, 12, { "gpio-in", "gpio_out", "nand", NULL, NULL, NULL, "pc_eint12" }, 6, 12, 2 },
+ { "PC13", 2, 13, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, NULL, "pc_eint13" }, 6, 13, 2 },
+ { "PC14", 2, 14, { "gpio-in", "gpio_out", "nand", "mmc2", NULL, NULL, "pc_eint14" }, 6, 14, 2 },
+ { "PC15", 2, 15, { "gpio-in", "gpio_out", "nand", "mmc2", "spi0", NULL, "pc_eint15" }, 6, 15, 2 },
+ { "PC16", 2, 16, { "gpio-in", "gpio_out", "nand", "mmc2", "spi0", NULL, "pc_eint16" }, 6, 16, 2 },
+
+ { "PF0", 5, 0, { "gpio-in", "gpio_out", "mmc0", "jtag", NULL, NULL, "pf_eint0" }, 6, 0, 5 },
+ { "PF1", 5, 1, { "gpio-in", "gpio_out", "mmc0", "jtag", NULL, NULL, "pf_eint1" }, 6, 1, 5 },
+ { "PF2", 5, 2, { "gpio-in", "gpio_out", "mmc0", "uart0", NULL, NULL, "pf_eint2" }, 6, 2, 5 },
+ { "PF3", 5, 3, { "gpio-in", "gpio_out", "mmc0", "jtag", NULL, NULL, "pf_eint3" } ,6, 3, 5 },
+ { "PF4", 5, 4, { "gpio-in", "gpio_out", "mmc0", "uart0", NULL, NULL, "pf_eint4" }, 6, 4, 5 },
+ { "PF5", 5, 5, { "gpio-in", "gpio_out", "mmc0", "jtag", NULL, NULL, "pf_eint5" }, 6, 5, 5 },
+ { "PF6", 5, 6, { "gpio-in", "gpio_out", NULL, NULL, NULL, NULL, "pf_eint6" }, 6, 6, 5 },
+
+ { "PG0", 6, 0, { "gpio-in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint0" }, 6, 0, 6 },
+ { "PG1", 6, 1, { "gpio-in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint1" }, 6, 1, 6 },
+ { "PG2", 6, 2, { "gpio-in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint2" }, 6, 2, 6 },
+ { "PG3", 6, 3, { "gpio-in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint3" }, 6, 3, 6 },
+ { "PG4", 6, 4, { "gpio-in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint4" }, 6, 4, 6 },
+ { "PG5", 6, 5, { "gpio-in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint5" }, 6, 5, 6 },
+ { "PG6", 6, 6, { "gpio-in", "gpio_out", "uart1", NULL, "jtag", NULL, "pg_eint6" }, 6, 6, 6 },
+ { "PG7", 6, 7, { "gpio-in", "gpio_out", "uart1", NULL, "jtag", NULL, "pg_eint7" }, 6, 7, 6 },
+ { "PG8", 6, 8, { "gpio-in", "gpio_out", "uart1", "pll_lock_dbg", "jtag", NULL, "pg_eint8" }, 6, 8, 6 },
+ { "PG9", 6, 9, { "gpio-in", "gpio_out", "uart1", NULL, "jtag", "ac_adcy", "pg_eint9" }, 6, 9, 6 },
+ { "PG10", 6, 10, { "gpio-in", "gpio_out", "i2s2", "x32kfout", NULL, "ac_mclk", "pg_eint10" }, 6, 10, 6 },
+ { "PG11", 6, 11, { "gpio-in", "gpio_out", "i2s2", NULL, "bist", "ac_sync", "pg_eint11" }, 6, 11, 6 },
+ { "PG12", 6, 12, { "gpio-in", "gpio_out", "i2s2", NULL, "bist", "ac_adcl", "pg_eint12" }, 6, 12, 6 },
+ { "PG13", 6, 13, { "gpio-in", "gpio_out", "i2s2", "i2s2", "bist", "ac_adcr", "pg_eint13" }, 6, 13, 6 },
+ { "PG14", 6, 14, { "gpio-in", "gpio_out", "i2s2", "i2s2", "bist", "ac_adcx", "pg_eint14" }, 6, 14, 6 },
+ { "PG15", 6, 15, { "gpio-in", "gpio_out", "uart2", NULL, NULL, "spi4", "pg_eint15" }, 6, 15, 6 },
+ { "PG16", 6, 16, { "gpio-in", "gpio_out", "uart2", NULL, NULL, "spi4", "pg_eint16" }, 6, 16, 6 },
+ { "PG17", 6, 17, { "gpio-in", "gpio_out", "uart2", NULL, NULL, "spi3", "pg_eint17" }, 6, 17, 6 },
+ { "PG18", 6, 18, { "gpio-in", "gpio_out", "uart2", NULL, NULL, "spi3", "pg_eint18" }, 6, 18, 6 },
+ { "PG19", 6, 19, { "gpio-in", "gpio_out", NULL, NULL, "pwm1", NULL, "pg_eint19" }, 6, 19, 6 },
+
+ { "PH0", 7, 0, { "gpio-in", "gpio_out", "uart0", NULL, "pwm3", "spi1", "ph_eint0" }, 6, 0, 7 },
+ { "PH1", 7, 1, { "gpio-in", "gpio_out", "uart0", NULL, "pwm4", "spi1", "ph_eint1" }, 6, 1, 7 },
+ { "PH2", 7, 2, { "gpio-in", "gpio_out", "uart5", "owa", "pwm2", "spi2", "ph_eint2" }, 6, 2, 7 },
+ { "PH3", 7, 3, { "gpio-in", "gpio_out", "uart5", NULL, "pwm1", "spi2", "ph_eint3" }, 6, 3, 7 },
+ { "PH4", 7, 4, { "gpio-in", "gpio_out", NULL, "owa", NULL, "spi3", "ph_eint4" }, 6, 4, 7 },
+ { "PH5", 7, 5, { "gpio-in", "gpio_out", "uart2", "i2s3", "spi1", "spi3", "ph_eint5" }, 6, 5, 7 },
+ { "PH6", 7, 6, { "gpio-in", "gpio_out", "uart2", "i2s3", "spi1", "spi4", "ph_eint6" }, 6, 6, 7 },
+ { "PH7", 7, 7, { "gpio-in", "gpio_out", "uart2", "i2s3", "spi1", "spi4", "ph_eint7" }, 6, 7, 7 },
+ { "PH8", 7, 8, { "gpio-in", "gpio_out", "uart2", "i2s3", "spi1", "i2s3", "ph_eint8" }, 6, 8, 7 },
+ { "PH9", 7, 9, { "gpio-in", "gpio_out", NULL, "i2s3", "spi1", "i2s3", "ph_eint9" }, 6, 9, 7 },
+ { "PH10", 7, 10, { "gpio-in", "gpio_out", NULL, "cir_rx", "tcon_trig1", NULL, "ph_eint10" }, 6, 10, 7 },
+
+ { "PI0", 9, 0, { "gpio-in", "gpio_out", "rgmii", "dmic_clk", "i2s0", "hdmi" , "pi_eint0" }, 6, 0, 9 },
+ { "PI1", 9, 1, { "gpio-in", "gpio_out", "rgmii", "dmic_data0", "i2s0", "hdmi" , "pi_eint1" }, 6, 1, 9 },
+ { "PI2", 9, 2, { "gpio-in", "gpio_out", "rgmii", "dmic_data1", "i2s0", "hdmi" , "pi_eint2" }, 6, 2, 9 },
+ { "PI3", 9, 3, { "gpio-in", "gpio_out", "rgmii", "dmic_data2", "i2s0", "i2s0" , "pi_eint3" }, 6, 3, 9 },
+ { "PI4", 9, 4, { "gpio-in", "gpio_out", "rgmii", "dmic_data3", "i2s0", "i2s0" , "pi_eint4" }, 6, 4, 9 },
+ { "PI5", 9, 5, { "gpio-in", "gpio_out", "rgmii", "uart2", "ts0", "spi0" , "pi_eint5" }, 6, 5, 9 },
+ { "PI6", 9, 6, { "gpio-in", "gpio_out", "rgmii", "uart2", "ts0", "spi0" , "pi_eint6" }, 6, 6, 9 },
+ { "PI7", 9, 7, { "gpio-in", "gpio_out", "rgmii", "uart2", "ts0", "spi1" , "pi_eint7" }, 6, 7, 9 },
+ { "PI8", 9, 8, { "gpio-in", "gpio_out", "rgmii", "uart2", "ts0", "spi1" , "pi_eint8" }, 6, 8, 9 },
+ { "PI9", 9, 9, { "gpio-in", "gpio_out", "rgmii", "uart3", "ts0", "spi2" , "pi_eint9" }, 6, 9, 9 },
+ { "PI10", 9, 10, { "gpio-in", "gpio_out", "rgmii", "uart3", "ts0", "spi2" , "pi_eint10" }, 6, 10, 9 },
+ { "PI11", 9, 11, { "gpio-in", "gpio_out", "rgmii", "uart3", "ts0", "pwm1" , "pi_eint11" }, 6, 11, 9 },
+ { "PI12", 9, 12, { "gpio-in", "gpio_out", "rgmii", "uart3", "ts0", "pwm2" , "pi_eint12" }, 6, 12, 9 },
+ { "PI13", 9, 13, { "gpio-in", "gpio_out", "rgmii", "uart4", "ts0", "pwm3" , "pi_eint13" }, 6, 13, 9 },
+ { "PI14", 9, 14, { "gpio-in", "gpio_out", "mdc", "uart4", "ts0", "pwm4" , "pi_eint14" }, 6, 14, 9 },
+ { "PI15", 9, 15, { "gpio-in", "gpio_out", "mdio", "uart4", "ts0", "clk_fanout0" , "pi_eint15" }, 6, 15, 9 },
+ { "PI16", 9, 16, { "gpio-in", "gpio_out", "ephy_25m", "uart4", "ts0", "clk_fanout1" , "pi_eint16" }, 6, 16, 9 },
+};
+
+const struct allwinner_padconf h616_padconf = {
+ .npins = nitems(h616_pins),
+ .pins = h616_pins,
+};
diff --git a/sys/arm/allwinner/h616/h616_r_padconf.c b/sys/arm/allwinner/h616/h616_r_padconf.c
new file mode 100644
index 000000000000..ab199b69bebe
--- /dev/null
+++ b/sys/arm/allwinner/h616/h616_r_padconf.c
@@ -0,0 +1,30 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Emmanuel Vadot <manu@freebsd.org>
+ *
+ * Copyright (c) 2026 The FreeBSD Foundation.
+ *
+ * Portions of this file were written by Tom Jones <thj@freebsd.org> under
+ * sponsorship from The FreeBSD Foundation.
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/types.h>
+
+#include <arm/allwinner/allwinner_pinctrl.h>
+
+#include "opt_soc.h"
+
+static const struct allwinner_pins h616_r_pins[] = {
+ { "PL0" , 0, 0, { "gpio-in", "gpio_out", NULL, "spi0", NULL, NULL, NULL }, 0, 0, 0 },
+ { "PL1" , 0, 1, { "gpio-in", "gpio_out", NULL, "spi0", NULL, NULL, NULL }, 0, 0, 0 },
+};
+
+const struct allwinner_padconf h616_r_padconf = {
+ .npins = nitems(h616_r_pins),
+ .pins = h616_r_pins,
+};
diff --git a/sys/arm64/conf/NOTES b/sys/arm64/conf/NOTES
index 102066025e8f..c0dac0a746f1 100644
--- a/sys/arm64/conf/NOTES
+++ b/sys/arm64/conf/NOTES
@@ -34,6 +34,7 @@ options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default
options SOC_ALLWINNER_A64
options SOC_ALLWINNER_H5
options SOC_ALLWINNER_H6
+options SOC_ALLWINNER_H616
options SOC_BRCM_BCM2837
options SOC_BRCM_BCM2838
options SOC_BRCM_NS2
diff --git a/sys/arm64/conf/std.allwinner b/sys/arm64/conf/std.allwinner
index 345322cebb0f..360f2269c59b 100644
--- a/sys/arm64/conf/std.allwinner
+++ b/sys/arm64/conf/std.allwinner
@@ -6,6 +6,7 @@
options SOC_ALLWINNER_A64
options SOC_ALLWINNER_H5
options SOC_ALLWINNER_H6
+options SOC_ALLWINNER_H616
# Timer drivers
device aw_timer
diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64
index 2efdb21f66ad..405916c5eaec 100644
--- a/sys/conf/files.arm64
+++ b/sys/conf/files.arm64
@@ -575,6 +575,8 @@ arm/allwinner/h3/h3_padconf.c optional soc_allwinner_h5 fdt
arm/allwinner/h3/h3_r_padconf.c optional soc_allwinner_h5 fdt
arm/allwinner/h6/h6_padconf.c optional soc_allwinner_h6 fdt
arm/allwinner/h6/h6_r_padconf.c optional soc_allwinner_h6 fdt
+arm/allwinner/h616/h616_padconf.c optional soc_allwinner_h616 fdt
+arm/allwinner/h616/h616_r_padconf.c optional soc_allwinner_h616 fdt
# Altera/Intel
arm64/intel/stratix10-soc-fpga-mgr.c optional soc_intel_stratix10 fdt
diff --git a/sys/conf/options.arm64 b/sys/conf/options.arm64
index 5e6f25cd8db8..1428edba2fbe 100644
--- a/sys/conf/options.arm64
+++ b/sys/conf/options.arm64
@@ -29,6 +29,7 @@ VMM opt_global.h
SOC_ALLWINNER_A64 opt_soc.h
SOC_ALLWINNER_H5 opt_soc.h
SOC_ALLWINNER_H6 opt_soc.h
+SOC_ALLWINNER_H616 opt_soc.h
SOC_APPLE_T8103 opt_soc.h
SOC_BRCM_BCM2837 opt_soc.h
SOC_BRCM_BCM2838 opt_soc.h