git: 7f885581d5bb - main - powerpc/pmap: Mark more CPUs as lockless TLBIE

The branch main has been updated by jhibbits:

URL: https://cgit.FreeBSD.org/src/commit/?id=7f885581d5bb3eff191661f321d3a097acb0f39d

commit 7f885581d5bb3eff191661f321d3a097acb0f39d
Author:     Justin Hibbits <jhibbits@FreeBSD.org>
AuthorDate: 2026-02-03 02:50:15 +0000
Commit:     Justin Hibbits <jhibbits@FreeBSD.org>
CommitDate: 2026-02-03 04:33:20 +0000

    powerpc/pmap: Mark more CPUs as lockless TLBIE
    
    Add POWER10 and POWER11 to the list of lockless TLBIE capable CPUs.
    According to Linux, anything POWER5 and later should be able to do this,
    but that hasn't been tested with FreeBSD.  POWER10 and POWER11, being
    derived after the POWER9, implicitly have this capability per the ISA
    spec.
    
    MFC after:      1 week
---
 sys/powerpc/aim/moea64_native.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sys/powerpc/aim/moea64_native.c b/sys/powerpc/aim/moea64_native.c
index 20beccbdf935..0ea44b1097b6 100644
--- a/sys/powerpc/aim/moea64_native.c
+++ b/sys/powerpc/aim/moea64_native.c
@@ -568,9 +568,9 @@ moea64_bootstrap_native(vm_offset_t kernelstart, vm_offset_t kernelend)
 	case IBMPOWER8:
 	case IBMPOWER8E:
 	case IBMPOWER8NVL:
-		moea64_need_lock = false;
-		break;
 	case IBMPOWER9:
+	case IBMPOWER10:
+	case IBMPOWER11:
 		moea64_need_lock = false;
 		break;
 	case IBMPOWER4: