From nobody Sun Aug 30 01:37:47 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4hXZWJ298Vz6ptKN for ; Sun, 30 Aug 2026 01:37:48 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR2" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4hXZWH6TQQz3sSj for ; Sun, 30 Aug 2026 01:37:47 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1788053868; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=x0Z4FXkL0EdD3xjQyuKZtt+Ht2KVBmPOBInUsABFIiI=; b=rPc2TUBKpTcxsxwh57tkIkn2h/Yai083z0yNhx2Qhm8TJ/835C4E6AdYwSvbWnGs3P2aPW LYAPkdeevhC84Eayt7YZ/VKZxqC1aZ/JjBugQAIb8FKRBQNbRo6jhs0jxRBUCOIYIY6dmZ 20NyILtKYOzOPO9YQKqlkbrfuh2rsUmQMLaJc3GMQ2uBNphUWrXyaTNzMjHpZgE35QMzfG PJBXaOFBhhEQYTC332hdWIDkyzspJwtM5/626ffMsV1SDB8EJyPvfU9keWjcScXKeTfgkP UJkoLA/IE1EvcHxVOrSCCSisFWKB8++++SGpqyXOaAKAzeonA/k2ILcl6Fx0eA== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1788053868; a=rsa-sha256; cv=none; b=Fne5923b0IZKliv4M+BjPQk1YJds/xF6vBTHjRtwJM/Vn2gDJ8OpfZGyiED+/4ugSWl9w6 Cu+e9PPZHtGvrjbWQiHGDOCKuAfgpfvmBfVPxY9DIug0jL2xdYdPaW2Mjdp6+37FPlUZCZ +6VLAf+wVf9O0PAztjayTBchk+Atsq3J2Ou6QtskuzgkqXwhSe8vLPGTGutMi7GWjPiXHt quyzYqlfIaZw/JJcsnsnyfAoklZjEOsPMccaPXMvycVRh9DKXYYRTrLWN4WQNgmhRV0jkP 933qslG5Ex/k8MoAr0zjgQE0mECamO58puGyUSkP4VTAXBfKoEtDUkuznz5/og== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1788053868; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=x0Z4FXkL0EdD3xjQyuKZtt+Ht2KVBmPOBInUsABFIiI=; b=V7siPXJxdcynSNK0KTCLeWq8eZGZc4iCtHQl9bEPgTWDnUeTV2pamL2e7dSNzAvCQ3PNz0 M+kcZhpPQeXIwVNVjUgok2RSr1wgtsiI18LgiwwUnN0HHdDNE7yvgvf8kBehRZEOxQ9/gy eGqCvrVIwmQj6zQMztJwPGlWAUhtY7ZIIFSRc4AhG/JYCkLkT0kCz43NGJ6gnLqAsrHqDv tM9EvkehUqbFKU55CTy4oPuNZi0xpVNEn0pKCwuWWVckDXryFS36MHTedMDDzmZSOW8Jjy gy20mwcbCXsm+QKIsHDO5zvgitD6FpuRKRgJWhkDtWqCkUzFzqFInNSi7sD4ew== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4hXZWH50v6z14Rc for ; Sun, 30 Aug 2026 01:37:47 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 3f419 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Sun, 30 Aug 2026 01:37:47 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Kevin Bowling Subject: git: 8b4ba2a11f40 - stable/15 - e1000: Report corrected I350 ECC errors List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: kbowling X-Git-Repository: src X-Git-Refname: refs/heads/stable/15 X-Git-Reftype: branch X-Git-Commit: 8b4ba2a11f4003735852f5e1371b21a3a727bd5f Auto-Submitted: auto-generated Date: Sun, 30 Aug 2026 01:37:47 +0000 Message-Id: <6a93896b.3f419.656140c7@gitrepo.freebsd.org> The branch stable/15 has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=8b4ba2a11f4003735852f5e1371b21a3a727bd5f commit 8b4ba2a11f4003735852f5e1371b21a3a727bd5f Author: Kevin Bowling AuthorDate: 2026-08-12 23:35:43 +0000 Commit: Kevin Bowling CommitDate: 2026-08-30 01:16:22 +0000 e1000: Report corrected I350 ECC errors I350 does not interrupt for corrected internal ECC errors. Instead, the PCIe, DMA, packet buffer, loopback, and management memories expose sticky status bits in their region-specific status registers. Sample those bits with the regular hardware statistics update, preserve the RX and TX packet buffer ECC enable state while clearing RW1C indications, and expose counters grouped by memory region. Each counter records observed indication bits rather than exact error counts because repeated corrections between samples collapse into one sticky bit. On an I350 (8086:1521 revision 1), the ECC enables remained set. All corrected-error status registers remained clear across boot, interface down/up, three FER recovery resets, and bidirectional line-rate traffic. The device has no documented corrected error injector. Therefore, the per-region paths were validated against the register definitions rather than an injected SRAM error. Sponsored by: BBOX.io (cherry picked from commit 8367882d531313eea68966b07ddf917e39690b77) --- sys/dev/e1000/e1000_defines.h | 8 +++++ sys/dev/e1000/e1000_regs.h | 3 ++ sys/dev/e1000/if_em.c | 79 +++++++++++++++++++++++++++++++++++++++++++ sys/dev/e1000/if_em.h | 1 + 4 files changed, 91 insertions(+) diff --git a/sys/dev/e1000/e1000_defines.h b/sys/dev/e1000/e1000_defines.h index da06481be7de..761ce02d06af 100644 --- a/sys/dev/e1000/e1000_defines.h +++ b/sys/dev/e1000/e1000_defines.h @@ -543,9 +543,17 @@ #define E1000_PCIEECCSTS_TX_WR_DATA 0x00000010 #define E1000_PCIEECCSTS_RETRY_BUF 0x00000020 #define E1000_PCIEECCSTS_I210_CORR_MASK 0x00000030 +#define E1000_PCIEECCSTS_I350_OTHER_MASK 0x0000000F +#define E1000_PCIEECCSTS_I350_CORR_MASK 0x0000003F +#define E1000_DTPARS_CORR_MASK 0x0000005B #define E1000_DTPARS_FATAL_MASK 0x00000020 +#define E1000_DRPARS_CORR_MASK 0x0000000D #define E1000_DRPARS_FATAL_MASK 0x00000002 +#define E1000_DDECCS_CORR_MASK 0x0000000F + +#define E1000_PBECCSTS_I350_ENABLE_MASK 0x00030000 +#define E1000_PBECCSTS_I350_CORR_MASK 0x14000000 #define E1000_LANPERRSTS_RETX_BUF 0x00000200 #define E1000_LANPERRSTS_I350_NO_RESET_MASK 0x00008400 diff --git a/sys/dev/e1000/e1000_regs.h b/sys/dev/e1000/e1000_regs.h index 3323f982eefa..5b09183f836d 100644 --- a/sys/dev/e1000/e1000_regs.h +++ b/sys/dev/e1000/e1000_regs.h @@ -694,8 +694,11 @@ #define E1000_PCIEMISC 0x05BB8 /* PCIE misc config register */ /* Memory error status registers */ +#define E1000_RPBECCSTS 0x0245C /* Rx Packet Buffer ECC Status - RW */ +#define E1000_TPBECCSTS 0x0345C /* Tx Packet Buffer ECC Status - RW */ #define E1000_DTPARS 0x03F10 /* DMA Tx Parity and ECC Status - RW1C */ #define E1000_DRPARS 0x03F14 /* DMA Rx Parity and ECC Status - RW1C */ +#define E1000_DDECCS 0x03F18 /* DMA Host ECC Status - RW1C */ #define E1000_PCIEERRSTS 0x05BA8 /* PCIe Parity Status - RW1C */ #define E1000_PCIEECCSTS 0x05BAC /* PCIe ECC Status - RW1C */ #define E1000_LANPERRSTS 0x05F58 /* LAN Port Parity Status - RW1C */ diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c index 23d7cf731d8f..db58194d94bf 100644 --- a/sys/dev/e1000/if_em.c +++ b/sys/dev/e1000/if_em.c @@ -1979,6 +1979,62 @@ em_update_i210_ecc_stats(struct e1000_softc *sc) E1000_WRITE_REG(hw, E1000_PCIEECCSTS, pcieeccsts); } +static void +em_update_i350_ecc_stats(struct e1000_softc *sc) +{ + struct e1000_hw *hw; + u32 pbeccsts, status; + + hw = &sc->hw; + status = E1000_READ_REG(hw, E1000_DTPARS) & + E1000_DTPARS_CORR_MASK; + if (status != 0) { + sc->corrected_error_dma_count += bitcount32(status); + E1000_WRITE_REG(hw, E1000_DTPARS, status); + } + status = E1000_READ_REG(hw, E1000_DRPARS) & + E1000_DRPARS_CORR_MASK; + if (status != 0) { + sc->corrected_error_dma_count += bitcount32(status); + E1000_WRITE_REG(hw, E1000_DRPARS, status); + } + status = E1000_READ_REG(hw, E1000_DDECCS) & + E1000_DDECCS_CORR_MASK; + if (status != 0) { + sc->corrected_error_dma_count += bitcount32(status); + E1000_WRITE_REG(hw, E1000_DDECCS, status); + } + + pbeccsts = E1000_READ_REG(hw, E1000_RPBECCSTS); + status = pbeccsts & E1000_PBECCSTS_I350_CORR_MASK; + if (status != 0) { + sc->corrected_error_packet_buffer_count += bitcount32(status); + /* Preserve the enable bits while clearing RW1C status. */ + E1000_WRITE_REG(hw, E1000_RPBECCSTS, + pbeccsts & (E1000_PBECCSTS_I350_ENABLE_MASK | + E1000_PBECCSTS_I350_CORR_MASK)); + } + pbeccsts = E1000_READ_REG(hw, E1000_TPBECCSTS); + status = pbeccsts & E1000_PBECCSTS_I350_CORR_MASK; + if (status != 0) { + sc->corrected_error_packet_buffer_count += bitcount32(status); + E1000_WRITE_REG(hw, E1000_TPBECCSTS, + pbeccsts & (E1000_PBECCSTS_I350_ENABLE_MASK | + E1000_PBECCSTS_I350_CORR_MASK)); + } + + status = E1000_READ_REG(hw, E1000_PCIEECCSTS) & + E1000_PCIEECCSTS_I350_CORR_MASK; + if (status & E1000_PCIEECCSTS_TX_WR_DATA) + sc->corrected_error_pcie_tx_data_count++; + if (status & E1000_PCIEECCSTS_RETRY_BUF) + sc->corrected_error_pcie_retry_count++; + sc->corrected_error_pcie_other_count += bitcount32(status & + E1000_PCIEECCSTS_I350_OTHER_MASK); + if (status != 0) + E1000_WRITE_REG(hw, E1000_PCIEECCSTS, status); +} + /* * Fatal internal-memory errors stop part or all of the MAC. Capture the * read-clear indication before handing recovery to the iflib admin task. @@ -5480,6 +5536,8 @@ em_update_stats_counters(struct e1000_softc *sc) if (em_has_pch_ecc(&sc->hw)) em_update_pch_ecc_stats(sc, E1000_READ_REG(&sc->hw, E1000_PBECCSTS)); + else if (em_has_i350_memory_errors(&sc->hw)) + em_update_i350_ecc_stats(sc); else if (em_has_i210_memory_errors(&sc->hw)) em_update_i210_ecc_stats(sc); } @@ -5841,6 +5899,27 @@ em_add_hw_stats(struct e1000_softc *sc) "corrected_pcie_retry", CTLFLAG_RD, &sc->corrected_error_pcie_retry_count, "Corrected PCIe retry-buffer memory indications"); + } else { + SYSCTL_ADD_UQUAD(ctx, memerr_list, OID_AUTO, + "corrected_dma", CTLFLAG_RD, + &sc->corrected_error_dma_count, + "Corrected DMA memory indications"); + SYSCTL_ADD_UQUAD(ctx, memerr_list, OID_AUTO, + "corrected_packet_buffer", CTLFLAG_RD, + &sc->corrected_error_packet_buffer_count, + "Corrected packet-buffer memory indications"); + SYSCTL_ADD_UQUAD(ctx, memerr_list, OID_AUTO, + "corrected_pcie_tx_data", CTLFLAG_RD, + &sc->corrected_error_pcie_tx_data_count, + "Corrected PCIe transmit-data memory indications"); + SYSCTL_ADD_UQUAD(ctx, memerr_list, OID_AUTO, + "corrected_pcie_retry", CTLFLAG_RD, + &sc->corrected_error_pcie_retry_count, + "Corrected PCIe retry-buffer memory indications"); + SYSCTL_ADD_UQUAD(ctx, memerr_list, OID_AUTO, + "corrected_pcie_other", CTLFLAG_RD, + &sc->corrected_error_pcie_other_count, + "Other corrected PCIe memory indications"); } } } diff --git a/sys/dev/e1000/if_em.h b/sys/dev/e1000/if_em.h index 50972e964fba..2ae2c3a8c92d 100644 --- a/sys/dev/e1000/if_em.h +++ b/sys/dev/e1000/if_em.h @@ -634,6 +634,7 @@ struct e1000_softc { u64 corrected_error_dma_count; u64 corrected_error_pcie_tx_data_count; u64 corrected_error_pcie_retry_count; + u64 corrected_error_pcie_other_count; u64 corrected_error_packet_buffer_count; u64 uncorrected_error_packet_buffer_count;