git: 53e471161604 - main - e1000: fix reset for 82580

From: Kevin Bowling <kbowling_at_FreeBSD.org>
Date: Tue, 11 Aug 2026 20:59:52 UTC
The branch main has been updated by kbowling:

URL: https://cgit.FreeBSD.org/src/commit/?id=53e4711616041a668ab61f2ce86c9fa139ab67a9

commit 53e4711616041a668ab61f2ce86c9fa139ab67a9
Author:     Barbara Skobiej <barbara.skobiej@intel.com>
AuthorDate: 2025-02-06 16:08:45 +0000
Commit:     Kevin Bowling <kbowling@FreeBSD.org>
CommitDate: 2026-08-11 20:59:31 +0000

    e1000: fix reset for 82580
    
    DPDK commit message
    
    net/e1000/base: fix reset for 82580
    
    Fix setting device reset status bit in e1000_reset_hw_82580() function
    for 82580 by first reading the register value, and then setting the
    device reset bit.
    
    Fixes: af75078fece3 ("first public release")
    Cc: stable@dpdk.org
    
    Signed-off-by: Barbara Skobiej <barbara.skobiej@intel.com>
    Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
    Acked-by: Bruce Richardson <bruce.richardson@intel.com>
    
    Obtained from:  DPDK (88a1eb79ef)
    MFC after:      2 weeks
---
 sys/dev/e1000/e1000_82575.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/sys/dev/e1000/e1000_82575.c b/sys/dev/e1000/e1000_82575.c
index f8b512266acf..ee6bbd5a1b9d 100644
--- a/sys/dev/e1000/e1000_82575.c
+++ b/sys/dev/e1000/e1000_82575.c
@@ -2230,7 +2230,7 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw)
 	s32 ret_val = E1000_SUCCESS;
 	/* BH SW mailbox bit in SW_FW_SYNC */
 	u16 swmbsw_mask = E1000_SW_SYNCH_MB;
-	u32 ctrl;
+	u32 ctrl, status;
 	bool global_device_reset = hw->dev_spec._82575.global_device_reset;
 
 	DEBUGFUNC("e1000_reset_hw_82580");
@@ -2295,7 +2295,9 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw)
 	}
 
 	/* clear global device reset status bit */
-	E1000_WRITE_REG(hw, E1000_STATUS, E1000_STAT_DEV_RST_SET);
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	E1000_WRITE_REG(hw, E1000_STATUS,
+	    status | E1000_STAT_DEV_RST_SET);
 
 	/* Clear any pending interrupt events. */
 	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);